Lines Matching +full:sm8450 +full:- +full:dispcc

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller for SM8450
10   - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14   domains on SM8450.
16   See also:: include/dt-bindings/clock/qcom,sm8450-dispcc.h
21       - qcom,sm8450-dispcc
26       - description: Board XO source
27       - description: Board Always On XO source
28       - description: Display's AHB clock
29       - description: sleep clock
30       - description: Byte clock from DSI PHY0
31       - description: Pixel clock from DSI PHY0
32       - description: Byte clock from DSI PHY1
33       - description: Pixel clock from DSI PHY1
34       - description: Link clock from DP PHY0
35       - description: VCO DIV clock from DP PHY0
36       - description: Link clock from DP PHY1
37       - description: VCO DIV clock from DP PHY1
38       - description: Link clock from DP PHY2
39       - description: VCO DIV clock from DP PHY2
40       - description: Link clock from DP PHY3
41       - description: VCO DIV clock from DP PHY3
43   '#clock-cells':
46   '#reset-cells':
49   '#power-domain-cells':
55   power-domains:
60   required-opps:
66   - compatible
67   - reg
68   - clocks
69   - '#clock-cells'
70   - '#reset-cells'
71   - '#power-domain-cells'
76   - |
77     #include <dt-bindings/clock/qcom,gcc-sm8450.h>
78     #include <dt-bindings/clock/qcom,rpmh.h>
79     #include <dt-bindings/power/qcom,rpmhpd.h>
80     clock-controller@af00000 {
81       compatible = "qcom,sm8450-dispcc";
91       #clock-cells = <1>;
92       #reset-cells = <1>;
93       #power-domain-cells = <1>;
94       power-domains = <&rpmhpd RPMHPD_MMCX>;
95       required-opps = <&rpmhpd_opp_low_svs>;