Lines Matching +full:gcc +full:- +full:sm8350

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sm8350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM8350
10   - Robert Foss <robert.foss@linaro.org>
16   See also:: include/dt-bindings/clock/qcom,gpucc-sm8350.h
21       - qcom,sm8350-gpucc
25       - description: Board XO source
26       - description: GPLL0 main branch source
27       - description: GPLL0 div branch source
29   '#clock-cells':
32   '#reset-cells':
35   '#power-domain-cells':
42   - compatible
43   - reg
44   - clocks
45   - '#clock-cells'
46   - '#reset-cells'
47   - '#power-domain-cells'
52   - |
53     #include <dt-bindings/clock/qcom,gcc-sm8350.h>
54     #include <dt-bindings/clock/qcom,rpmh.h>
57         #address-cells = <2>;
58         #size-cells = <2>;
60         clock-controller@3d90000 {
61             compatible = "qcom,sm8350-gpucc";
64                      <&gcc GCC_GPU_GPLL0_CLK_SRC>,
65                      <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
66             #clock-cells = <1>;
67             #reset-cells = <1>;
68             #power-domain-cells = <1>;