Lines Matching +full:isp +full:- +full:0

9 - compatible: should be one of the following.
10   - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.
11   - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.
13 - reg: physical base address of the controller and length of memory mapped
16 - #clock-cells: should be 1.
22 dt-bindings/clock/exynos4.h header and can be used in device
27 	clock: clock-controller@10030000 {
28 		compatible = "samsung,exynos4210-clock";
29 		reg = <0x10030000 0x20000>;
30 		#clock-cells = <1>;
35 	   about 'clocks' and 'clock-names' property.
38 		compatible = "samsung,exynos4210-uart";
39 		reg = <0x13820000 0x100>;
40 		interrupts = <0 54 0>;
42 		clock-names = "uart", "clk_uart_baud0";
45 Exynos4412 SoC contains some additional clocks for FIMC-ISP (Camera ISP)
46 subsystem. Registers for those clocks are located in the ISP power domain.
53 - compatible: should be "samsung,exynos4412-isp-clock".
55 - reg: physical base address of the ISP clock controller and length of memory
58 - #clock-cells: should be 1.
60 - clocks: list of the clock controller input clock identifiers,
64 - clock-names: list of the clock controller input clock names,
65   as described in clock-bindings.txt, should be "aclk200" and
68 - power-domains: a phandle to ISP power domain node as described by
73 	clock: clock-controller@10030000 {
74 		compatible = "samsung,exynos4412-clock";
75 		reg = <0x10030000 0x18000>;
76 		#clock-cells = <1>;
79 	isp_clock: clock-controller@10048000 {
80 		compatible = "samsung,exynos4412-isp-clock";
81 		reg = <0x10048000 0x1000>;
82 		#clock-cells = <1>;
83 		power-domains = <&pd_isp>;
85 		clock-names = "aclk200", "aclk400_mcuisp";