Lines Matching +full:nsp +full:- +full:genpll
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,iproc-clocks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
15 An SoC from the iProc family may have several PLLs, e.g., ARMPLL, GENPLL,
25 - brcm,bcm63138-armpll
26 - brcm,cygnus-armpll
27 - brcm,cygnus-genpll
28 - brcm,cygnus-lcpll0
29 - brcm,cygnus-mipipll
30 - brcm,cygnus-asiu-clk
31 - brcm,cygnus-audiopll
32 - brcm,hr2-armpll
33 - brcm,nsp-armpll
34 - brcm,nsp-genpll
35 - brcm,nsp-lcpll0
36 - brcm,ns2-genpll-scr
37 - brcm,ns2-genpll-sw
38 - brcm,ns2-lcpll-ddr
39 - brcm,ns2-lcpll-ports
40 - brcm,sr-genpll0
41 - brcm,sr-genpll1
42 - brcm,sr-genpll2
43 - brcm,sr-genpll3
44 - brcm,sr-genpll4
45 - brcm,sr-genpll5
46 - brcm,sr-genpll6
47 - brcm,sr-lcpll0
48 - brcm,sr-lcpll1
49 - brcm,sr-lcpll-pcie
54 - description: base register
55 - description: power register
56 - description: ASIU or split status register
63 '#clock-cells':
66 clock-output-names:
71 - if:
76 - brcm,cygnus-armpll
77 - brcm,nsp-armpll
80 '#clock-cells':
84 '#clock-cells':
87 - clock-output-names
88 - if:
93 - brcm,cygnus-armpll
94 - brcm,cygnus-genpll
95 - brcm,cygnus-lcpll0
96 - brcm,cygnus-mipipll
97 - brcm,cygnus-asiu-clk
98 - brcm,cygnus-audiopll
101 clock-output-names:
105 "include/dt-bindings/clock/bcm-cygnus.h"
108 ----- --------------- ----- --
117 genpll crystal 0 BCM_CYGNUS_GENPLL
118 axi21 genpll 1 BCM_CYGNUS_GENPLL_AXI21_CLK
119 250mhz genpll 2 BCM_CYGNUS_GENPLL_250MHZ_CLK
120 ihost_sys genpll 3 BCM_CYGNUS_GENPLL_IHOST_SYS_CLK
121 enet_sw genpll 4 BCM_CYGNUS_GENPLL_ENET_SW_CLK
122 audio_125 genpll 5 BCM_CYGNUS_GENPLL_AUDIO_125_CLK
123 can genpll 6 BCM_CYGNUS_GENPLL_CAN_CLK
145 - if:
150 - brcm,hr2-armpll
153 clock-output-names:
158 ----- ------ ----- --
162 - if:
167 - brcm,nsp-armpll
168 - brcm,nsp-genpll
169 - brcm,nsp-lcpll0
172 clock-output-names:
176 "include/dt-bindings/clock/bcm-nsp.h"
179 ----- ------ ----- --
184 genpll crystal 0 BCM_NSP_GENPLL
185 phy genpll 1 BCM_NSP_GENPLL_PHY_CLK
186 ethernetclk genpll 2 BCM_NSP_GENPLL_ENET_SW_CLK
187 usbclk genpll 3 BCM_NSP_GENPLL_USB_PHY_REF_CLK
188 iprocfast genpll 4 BCM_NSP_GENPLL_IPROCFAST_CLK
189 sata1 genpll 5 BCM_NSP_GENPLL_SATA1_CLK
190 sata2 genpll 6 BCM_NSP_GENPLL_SATA2_CLK
196 - if:
201 - brcm,ns2-genpll-scr
202 - brcm,ns2-genpll-sw
203 - brcm,ns2-lcpll-ddr
204 - brcm,ns2-lcpll-ports
207 clock-output-names:
211 "include/dt-bindings/clock/bcm-ns2.h"
214 ----- ------ ----- --
248 - if:
253 - brcm,sr-genpll0
254 - brcm,sr-genpll1
255 - brcm,sr-genpll2
256 - brcm,sr-genpll3
257 - brcm,sr-genpll4
258 - brcm,sr-genpll5
259 - brcm,sr-genpll6
260 - brcm,sr-lcpll0
261 - brcm,sr-lcpll1
262 - brcm,sr-lcpll-pcie
265 clock-output-names:
269 "include/dt-bindings/clock/bcm-sr.h"
272 ----- ------ ----- --
328 - if:
332 const: brcm,cygnus-genpll
335 clock-output-names:
337 - const: genpll
338 - const: axi21
339 - const: 250mhz
340 - const: ihost_sys
341 - const: enet_sw
342 - const: audio_125
343 - const: can
344 - if:
348 const: brcm,nsp-lcpll0
351 clock-output-names:
353 - const: lcpll0
354 - const: pcie_phy
355 - const: sdio
356 - const: ddr_phy
357 - if:
361 const: brcm,nsp-genpll
364 clock-output-names:
366 - const: genpll
367 - const: phy
368 - const: ethernetclk
369 - const: usbclk
370 - const: iprocfast
371 - const: sata1
372 - const: sata2
375 - reg
376 - clocks
377 - '#clock-cells'
382 - |
384 #clock-cells = <0>;
385 compatible = "fixed-clock";
386 clock-frequency = <25000000>;
389 genpll@301d000 {
390 #clock-cells = <1>;
391 compatible = "brcm,cygnus-genpll";
394 clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",
397 - |
399 #clock-cells = <0>;
400 compatible = "fixed-clock";
401 clock-frequency = <25000000>;
405 #clock-cells = <1>;
406 compatible = "brcm,cygnus-asiu-clk";
409 clock-output-names = "keypad", "adc/touch", "pwm";
411 - |
413 #clock-cells = <0>;
414 compatible = "brcm,nsp-armpll";