Lines Matching +full:0 +full:x1b000000 +full:- +full:0 +full:x1b800000
4 external memory (such as NAND or other memory-mapped peripherals) whereas
18 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
27 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
28 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
29 CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
31 The APQ8060 Qualcomm Application Processor User Guide, 80-N7150-14 Rev. A,
51 - compatible: should be one of:
52 "qcom,msm8660-ebi2"
53 "qcom,apq8060-ebi2"
54 - #address-cells: should be <2>: the first cell is the chipselect,
56 - #size-cells: should be <1>
57 - ranges: should be set to:
58 ranges = <0 0x0 0x1a800000 0x00800000>,
59 <1 0x0 0x1b000000 0x00800000>,
60 <2 0x0 0x1b800000 0x00800000>,
61 <3 0x0 0x1d000000 0x08000000>,
62 <4 0x0 0x1c800000 0x00800000>,
63 <5 0x0 0x1c000000 0x00800000>;
64 - reg: two ranges of registers: EBI2 config and XMEM config areas
65 - reg-names: should be "ebi2", "xmem"
66 - clocks: two clocks, EBI_2X and EBI
67 - clock-names: should be "ebi2x", "ebi2"
70 - Nodes inside the EBI2 will be considered device nodes.
77 - qcom,xmem-recovery-cycles: recovery cycles is the time the memory continues to
78 drive the data bus after OE is de-asserted, in order to avoid contention on
80 CS or read followed by write on the same CS. Valid values 0 thru 15. Minimum
81 value is actually 1, so a value of 0 will still yield 1 recovery cycle.
82 - qcom,xmem-write-hold-cycles: write hold cycles, these are extra cycles
84 WE is asserted until CS is asserted. With a hold of 1 (value = 0), the CS
85 stays active for 1 extra cycle etc. Valid values 0 thru 15.
86 - qcom,xmem-write-delta-cycles: initial latency for write cycles inserted for
87 the first write to a page or burst memory. Valid values 0 thru 255.
88 - qcom,xmem-read-delta-cycles: initial latency for read cycles inserted for the
89 first read to a page or burst memory. Valid values 0 thru 255.
90 - qcom,xmem-write-wait-cycles: number of wait cycles for every write access, 0=1
91 cycle. Valid values 0 thru 15.
92 - qcom,xmem-read-wait-cycles: number of wait cycles for every read access, 0=1
93 cycle. Valid values 0 thru 15.
96 - qcom,xmem-address-hold-enable: this is a boolean property stating that we
99 - qcom,xmem-adv-to-oe-recovery-cycles: the number of cycles elapsed before an OE
101 2 means 2 cycles between ADV and OE. Valid values 0, 1, 2 or 3.
102 - qcom,xmem-read-hold-cycles: the length in cycles of the first segment of a
104 assertion to OE assertion. Valid values 0 thru 15.
110 compatible = "qcom,apq8060-ebi2";
111 #address-cells = <2>;
112 #size-cells = <1>;
113 ranges = <0 0x0 0x1a800000 0x00800000>,
114 <1 0x0 0x1b000000 0x00800000>,
115 <2 0x0 0x1b800000 0x00800000>,
116 <3 0x0 0x1d000000 0x08000000>,
117 <4 0x0 0x1c800000 0x00800000>,
118 <5 0x0 0x1c000000 0x00800000>;
119 reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>;
120 reg-names = "ebi2", "xmem";
122 clock-names = "ebi2x", "ebi2";
124 pinctrl-names = "default";
125 pinctrl-0 = <&foo_ebi2_pins>;
127 foo-ebi2@2,0 {
129 reg = <2 0x0 0x100>;
131 qcom,xmem-recovery-cycles = <0>;
132 qcom,xmem-write-hold-cycles = <3>;
133 qcom,xmem-write-delta-cycles = <31>;
134 qcom,xmem-read-delta-cycles = <28>;
135 qcom,xmem-write-wait-cycles = <9>;
136 qcom,xmem-read-wait-cycles = <9>;