Lines Matching +full:sata +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Faraday Technology FTIDE010 PATA controller
10 - Linus Walleij <linus.walleij@linaro.org>
13 This controller is the first Faraday IDE interface block, used in the
15 platform. The controller can do PIO modes 0 through 4, Multi-word DMA
19 SATA bridge in order to support SATA. This is why a phandle to that
20 controller is compulsory on that platform.
22 The timing properties are unique per-SoC, not per-board.
27 - const: faraday,ftide010
28 - items:
29 - const: cortina,gemini-pata
30 - const: faraday,ftide010
41 clock-names:
44 sata:
46 phandle to the Gemini PATA to SATA bridge, if available
50 - compatible
51 - reg
52 - interrupts
55 - $ref: pata-common.yaml#
57 - if:
61 const: cortina,gemini-pata
65 - sata
70 - |
71 #include <dt-bindings/interrupt-controller/irq.h>
72 #include <dt-bindings/clock/cortina,gemini-clock.h>
75 compatible = "cortina,gemini-pata", "faraday,ftide010";
79 clock-names = "PCLK";
80 sata = <&sata>;
81 #address-cells = <1>;
82 #size-cells = <0>;
83 ide-port@0 {
86 ide-port@1 {