Lines Matching +full:rx +full:- +full:ts +full:- +full:max
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Baikal-T1 SoC AHCI SATA controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
14 DWC AHCI SATA v4.10a IP-core.
17 - $ref: snps,dwc-ahci-common.yaml#
21 const: baikal,bt1-ahci
25 - description: Peripheral APB bus clock
26 - description: Application AXI BIU clock
27 - description: SATA Ports reference clock
29 clock-names:
31 - const: pclk
32 - const: aclk
33 - const: ref
37 - description: Application AXI BIU domain reset
38 - description: SATA Ports clock domain reset
40 reset-names:
42 - const: arst
43 - const: ref
45 ports-implemented:
49 "^sata-port@[0-1]$":
50 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
57 snps,tx-ts-max:
64 snps,rx-ts-max:
67 Due to having AXI3 bus interface utilized the maximum Rx DMA
74 - compatible
75 - reg
76 - interrupts
77 - clocks
78 - clock-names
79 - resets
84 - |
86 compatible = "baikal,bt1-ahci";
88 #address-cells = <1>;
89 #size-cells = <0>;
94 clock-names = "pclk", "aclk", "ref";
97 reset-names = "arst", "ref";
99 ports-implemented = <0x3>;
101 sata-port@0 {
104 snps,tx-ts-max = <4>;
105 snps,rx-ts-max = <4>;
108 sata-port@1 {
111 snps,tx-ts-max = <4>;
112 snps,rx-ts-max = <4>;