Lines Matching +full:ahci +full:- +full:port

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Serial ATA AHCI controllers
10   - Hans de Goede <hdegoede@redhat.com>
11   - Damien Le Moal <dlemoal@kernel.org>
14   This document defines device tree properties for a common AHCI SATA
18   document doesn't constitute a DT-node binding by itself but merely
19   defines a set of common properties for the AHCI-compatible devices.
24   - $ref: sata-common.yaml#
29       Generic AHCI registers space conforming to the Serial ATA AHCI
32   reg-names:
35       const: ahci
39       Generic AHCI state change interrupt. Can be implemented either as a
41       indicating the particular port events.
45   ahci-supply:
46     description: Power regulator for AHCI controller
48   target-supply:
51   phy-supply:
58   phy-names:
59     const: sata-phy
61   hba-cap:
65       Spin-up or Mechanical Presence Switch support. It can be used to
69   ports-implemented:
76   "^sata-port@[0-9a-f]+$":
77     $ref: '#/$defs/ahci-port'
79       It is optionally possible to describe the ports as sub-nodes so
80       to enable each port independently when dealing with multiple PHYs.
83   - reg
84   - interrupts
89   ahci-port:
90     $ref: /schemas/ata/sata-common.yaml#/$defs/sata-port
95           AHCI SATA port identifier. By design AHCI controller can't have
102         description: Individual AHCI SATA port PHY
105       phy-names:
106         description: AHCI SATA port PHY ID
107         const: sata-phy
109       target-supply:
110         description: Power regulator for SATA port target device
112       hba-port-cap:
115           Bitfield of the HBA port-specific platform capabilities like Hot
116           plugging, eSATA, FIS-based Switching, etc (see AHCI specification
121       - reg