Lines Matching +full:syscon +full:- +full:clk

8 - compatible: Should be one of:
9 	- "mediatek,mt8183-ipu_conn", "syscon"
10 	- "mediatek,mt8183-ipu_adl", "syscon"
11 	- "mediatek,mt8183-ipu_core0", "syscon"
12 	- "mediatek,mt8183-ipu_core1", "syscon"
13 - #clock-cells: Must be 1
15 The ipu controller uses the common clk binding from
16 Documentation/devicetree/bindings/clock/clock-bindings.txt
17 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
21 ipu_conn: syscon@19000000 {
22 	compatible = "mediatek,mt8183-ipu_conn", "syscon";
24 	#clock-cells = <1>;
27 ipu_adl: syscon@19010000 {
28 	compatible = "mediatek,mt8183-ipu_adl", "syscon";
30 	#clock-cells = <1>;
33 ipu_core0: syscon@19180000 {
34 	compatible = "mediatek,mt8183-ipu_core0", "syscon";
36 	#clock-cells = <1>;
39 ipu_core1: syscon@19280000 {
40 	compatible = "mediatek,mt8183-ipu_core1", "syscon";
42 	#clock-cells = <1>;