Lines Matching full:idle
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
7 title: ARM idle states binding description
20 range of dynamic idle states that a processor can enter at run-time, can be
22 enter/exit specific idle states on a given processor.
35 PM implementation to put the processor in different idle states (which include
36 states listed above; "off" state is not an idle state since it does not have
39 Idle state parameters (e.g. entry latency) are platform specific and need to
43 The device tree binding definition for ARM idle states is the subject of this
47 2 - idle-states definitions
50 Idle states are characterized for a specific system through a set of
52 triggered upon idle states entry and exit.
55 properties required to enter and exit an idle state:
57 ..__[EXEC]__|__[PREP]__|__[ENTRY]__|__[IDLE]__|__[EXIT]__|__[EXEC]__..
67 Diagram 1: CPU idle state execution phases
71 PREP: Preparation phase before committing the hardware to idle mode
78 ENTRY: The hardware is committed to idle mode. This period must run
79 to completion up to IDLE before anything else can happen.
81 IDLE: This is the actual energy-saving idle period. This may last
87 entry-latency: Worst case latency required to enter the idle state. The
91 idle state to be worthwhile energywise.
99 An idle CPU requires the expected min-residency time to select the most
100 appropriate idle state based on the expected expiry time of the next IRQ
105 of an idle state, e.g.:
120 idle state, and possibly to prevent that to guarantee reliable device
153 and denotes the energy costs incurred while entering and leaving the idle
156 shallower slope and essentially represents the energy consumption of the idle
159 min-residency is defined for a given idle state as the minimum expected
165 For sake of simplicity, let's consider a system with two idle states IDLE1,
191 Graph 2: idle states min-residency example
193 In graph 2 above, that takes into account idle states entry/exit energy
194 costs, it is clear that if the idle state residency time (i.e. time till next
195 wake-up IRQ) is less than IDLE2-min-residency, IDLE1 is the better idle state
202 idle state IDLE2 implies that after a suitable time, IDLE2 becomes more energy
206 shallower states in a system with multiple idle states) is defined
210 The definitions provided in this section underpin the idle states
214 3 - idle-states node
217 ARM processor idle states are defined within the idle-states node, which is
219 processor idle states, defined as device tree nodes, are listed.
221 On ARM systems, it is a container of processor idle states nodes. If the
223 just supports idle_standby, an idle-states node is not required.
246 const: idle-states
256 node[6] that is responsible for setting up CPU idle management in the OS
264 Each state node represents an idle state description and must be defined
267 The idle state entered by executing the wfi instruction (idle_standby
273 idle-states node. Please refer to the entry-method bindings
278 const: arm,idle-state
288 Worst case latency in microseconds required to enter the idle state.
292 Worst case latency in microseconds required to exit the idle state.
299 and entry, for this idle state to be considered worthwhile energy wise
315 idle-state-name:
318 A string used as a descriptive name for the idle state.
340 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
349 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
358 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
367 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
376 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
385 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
394 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
403 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
412 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
421 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
430 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
439 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
448 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
457 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
466 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
475 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
479 idle-states {
483 compatible = "arm,idle-state";
491 compatible = "arm,idle-state";
501 compatible = "arm,idle-state";
510 compatible = "arm,idle-state";
520 compatible = "arm,idle-state";
528 compatible = "arm,idle-state";
538 compatible = "arm,idle-state";
548 compatible = "arm,idle-state";
570 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
577 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
584 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
591 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
598 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
605 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
612 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
619 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
622 idle-states {
624 compatible = "arm,idle-state";
633 compatible = "arm,idle-state";
642 compatible = "arm,idle-state";
651 compatible = "arm,idle-state";