Lines Matching +full:smp +full:- +full:offset
2 ----------------------------------------------------
5 - compatible = "hisilicon,hi3660";
9 - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
13 - compatible = "hisilicon,hi3670";
17 - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
21 - compatible = "hisilicon,hi3798cv200";
25 - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
29 - compatible = "hisilicon,hi3620-hi4511";
33 - compatible = "hisilicon,hi6220";
37 - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
41 - compatible = "hisilicon,hip01-ca9x2";
45 - compatible = "hisilicon,hip04-d01";
49 - compatible = "hisilicon,hip05-d02";
53 - compatible = "hisilicon,hip06-d03";
57 - compatible = "hisilicon,hip07-d05";
62 - compatible : "hisilicon,sysctrl"
63 - reg : Register address and size
66 - smp-offset : offset in sysctrl for notifying slave cpu booting
71 - resume-offset : offset in sysctrl for notifying cpu0 when resume
72 - reboot-offset : offset in sysctrl for system reboot
77 sysctrl: system-controller@fc802000 {
80 smp-offset = <0x31c>;
81 resume-offset = <0x308>;
82 reboot-offset = <0x4>;
85 -----------------------------------------------------------------------
92 - compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon"
93 and "simple-mfd".
94 - reg: Register address and size of Peripheral Controller.
95 - #address-cells: Should be 1.
96 - #size-cells: Should be 1.
100 perictrl: peripheral-controller@8a20000 {
101 compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
102 "simple-mfd";
104 #address-cells = <1>;
105 #size-cells = <1>;
108 -----------------------------------------------------------------------
112 - compatible : "hisilicon,hi6220-sysctrl"
113 - reg : Register address and size
114 - #clock-cells: should be set to 1, many clock registers are defined
119 the register offset of some core modules are different.
124 compatible = "hisilicon,hi6220-sysctrl", "syscon";
126 #clock-cells = <1>;
133 - compatible : "hisilicon,hi6220-aoctrl"
134 - reg : Register address and size
135 - #clock-cells: should be set to 1, many clock registers are defined
144 compatible = "hisilicon,hi6220-aoctrl", "syscon";
146 #clock-cells = <1>;
153 - compatible : "hisilicon,hi6220-mediactrl"
154 - reg : Register address and size
155 - #clock-cells: should be set to 1, many clock registers are defined
164 compatible = "hisilicon,hi6220-mediactrl", "syscon";
166 #clock-cells = <1>;
173 - compatible : "hisilicon,hi6220-pmctrl"
174 - reg : Register address and size
175 - #clock-cells: should be set to 1, some clock registers are define
184 compatible = "hisilicon,hi6220-pmctrl", "syscon";
186 #clock-cells = <1>;
193 - compatible : "hisilicon,hi6220-sramctrl", "syscon"
194 - reg : Register address and size
203 compatible = "hisilicon,hi6220-sramctrl", "syscon";
207 -----------------------------------------------------------------------
211 - compatible : "hisilicon,hip01-sysctrl"
212 - reg : Register address and size
217 registers located at different offset.
221 /* for hip01-ca9x2 */
222 sysctrl: system-controller@10000000 {
223 compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
225 reboot-offset = <0x4>;
228 -----------------------------------------------------------------------
229 Hisilicon HiP05/HiP06 PCIe-SAS sub system controller
232 - compatible : "hisilicon,pcie-sas-subctrl", "syscon";
233 - reg : Register address and size
235 The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in
239 /* for HiP05 PCIe-SAS sub system */
241 compatible = "hisilicon,pcie-sas-subctrl", "syscon";
248 - compatible : "hisilicon,peri-subctrl", "syscon";
249 - reg : Register address and size
258 compatible = "hisilicon,peri-subctrl", "syscon";
265 - compatible : "hisilicon,dsa-subctrl", "syscon";
266 - reg : Register address and size
274 compatible = "hisilicon,dsa-subctrl", "syscon";
278 -----------------------------------------------------------------------
282 - compatible : "hisilicon,cpuctrl"
283 - reg : Register address and size
288 -----------------------------------------------------------------------
292 - compatible: "hisilicon,pctrl"
293 - reg: Address and size of pctrl.
303 -----------------------------------------------------------------------
307 - compatible: "hisilicon,hip04-fabric";
308 - reg: Address and size of Fabric
310 -----------------------------------------------------------------------
311 Bootwrapper boot method (software protocol on SMP):
314 - compatible: "hisilicon,hip04-bootwrapper";
315 - boot-method: Address and size of boot method.