Lines Matching +full:firmware +full:- +full:phandle
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4 Firmware implementing the SCPI described in ARM document number ARM DUI 0922B
10 - compatible : should be
12 * "arm,scpi-pre-1.0" : For implementations complying to all
14 - mboxes: List of phandle and mailbox channel specifiers
15 All the channels reserved by remote SCP firmware for use by
17 - shmem : List of phandle pointing to the shared memory(SHM) area between the
27 ------------------------------------------------------------
34 - compatible : should be "arm,scpi-clocks"
35 All the clocks provided by SCP firmware via SCPI message
36 protocol much be listed as sub-nodes under this node.
38 Sub-nodes
41 - compatible : shall include one of the following
42 "arm,scpi-dvfs-clocks" - all the clocks that are variable and index based.
44 limits but only discrete points within the range. The firmware
46 index associated with it. The firmware also manages the
48 "arm,scpi-variable-clocks" - all the clocks that are variable and provide full
49 range within the specified range. The firmware provides the
53 - #clock-cells : Should be 1. Contains the Clock ID value used by SCPI commands.
54 - clock-output-names : shall be the corresponding names of the outputs.
55 - clock-indices: The identifying number for the clocks(i.e.clock_id) in the
57 into the clock-output-names array.
60 -------------------------------
65 The properties should follow the generic mmio-sram description found in [3]
67 Each sub-node represents the reserved area for SCPI.
69 Required sub-node properties:
70 - reg : The base offset and size of the reserved area with the SRAM
71 - compatible : should be "arm,scp-shmem" for Non-secure SRAM based
75 --------------------------------------------------------------
79 - compatible : should be "arm,scpi-sensors".
80 - #thermal-sensor-cells: should be set to 1. This property follows the
84 as used by the firmware. Refer to platform details
88 ------------------------------------------------------------
96 - #power-domain-cells : Should be 1. Contains the device or the power
98 - num-domains: Total number of power domains provided by SCPI. This is
106 - power-domains : A phandle and PM domain specifier as defined by bindings of
107 the power controller specified by phandle.
110 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
113 [4] Documentation/devicetree/bindings/power/power-domain.yaml
118 compatible = "arm,juno-sram-ns", "mmio-sram";
121 #address-cells = <1>;
122 #size-cells = <1>;
125 cpu_scp_lpri: scp-shmem@0 {
126 compatible = "arm,juno-scp-shmem";
130 cpu_scp_hpri: scp-shmem@200 {
131 compatible = "arm,juno-scp-shmem";
138 #mbox-cells = <1>;
147 compatible = "arm,scpi-clocks";
150 compatible = "arm,scpi-dvfs-clocks";
151 #clock-cells = <1>;
152 clock-indices = <0>, <1>, <2>;
153 clock-output-names = "atlclk", "aplclk","gpuclk";
156 compatible = "arm,scpi-variable-clocks";
157 #clock-cells = <1>;
158 clock-indices = <3>, <4>;
159 clock-output-names = "pxlclk0", "pxlclk1";
164 compatible = "arm,scpi-sensors";
165 #thermal-sensor-cells = <1>;
168 scpi_devpd: scpi-power-domains {
169 compatible = "arm,scpi-power-domains";
170 num-domains = <2>;
171 #power-domain-cells = <1>;
185 power-domains = <&scpi_devpd 1>;
188 thermal-zones {
190 polling-delay-passive = <100>;
191 polling-delay = <1000>;
194 thermal-sensors = <&scpi_sensors0 3>;
199 In the above example, the #clock-cells is set to 1 as required.
201 1 and 2 as clock-indices. scpi_clk has 2 output clocks namely: pxlclk0
202 and pxlclk1 with 3 and 4 as clock-indices.
212 The thermal-sensors property in the soc_thermal node uses the
213 temperature sensor provided by SCP firmware to setup a thermal
215 as used by the firmware.
217 The num-domains property in scpi-power-domains domain specifies that