Lines Matching +full:secure +full:- +full:reg +full:- +full:access

2 ----------------------------------------------------------
17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
28 - arm,smc-id : SMC id required when using smc or hvc transports
32 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
34 - interrupts : when using smc or hvc transports, this optional
39 - interrupt-names : if "interrupts" is present, interrupt-names must also
49 Each protocol supported shall have a sub-node with corresponding compatible
52 mboxes, mbox-names and shmem shall be present in the sub-node corresponding
56 ------------------------------------------------------------
61 - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands.
64 ------------------------------------------------------------
70 - #power-domain-cells : Should be 1. Contains the device or the power
74 ------------------------------------------------------------
85 - reg : shall identify an existent SCMI Voltage Domain.
88 --------------------------------------------------------------
89 SCMI provides an API to access the various sensors on the SoC.
92 - #thermal-sensor-cells: should be set to 1. This property follows the
100 ------------------------------------------------------------
106 - #reset-cells : Should be 1. Contains the reset domain ID value used
110 -------------------------------
115 The properties should follow the generic mmio-sram description found in [4]
117 Each sub-node represents the reserved area for SCMI.
119 Required sub-node properties:
120 - reg : The base offset and size of the reserved area with the SRAM
121 - compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
125 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
126 [2] Documentation/devicetree/bindings/power/power-domain.yaml
135 compatible = "mmio-sram";
136 reg = <0x0 0x50000000 0x0 0x10000>;
138 #address-cells = <1>;
139 #size-cells = <1>;
142 cpu_scp_lpri: scp-shmem@0 {
143 compatible = "arm,scmi-shmem";
144 reg = <0x0 0x200>;
147 cpu_scp_hpri: scp-shmem@200 {
148 compatible = "arm,scmi-shmem";
149 reg = <0x200 0x200>;
155 #mbox-cells = <1>;
156 reg = <0x0 0x40000000 0x0 0x10000>;
166 mbox-names = "tx", "rx";
168 #address-cells = <1>;
169 #size-cells = <0>;
172 reg = <0x11>;
173 #power-domain-cells = <1>;
177 reg = <0x13>;
178 #clock-cells = <1>;
182 reg = <0x14>;
183 #clock-cells = <1>;
187 reg = <0x15>;
188 #thermal-sensor-cells = <1>;
192 reg = <0x16>;
193 #reset-cells = <1>;
197 reg = <0x17>;
201 reg = <0x0>;
202 regulator-max-microvolt = <3300000>;
206 reg = <0x9>;
207 regulator-min-microvolt = <500000>;
208 regulator-max-microvolt = <4200000>;
219 reg = <0 0>;
225 reg = <0 0x7ff60000 0 0x1000>;
227 power-domains = <&scmi_devpd 1>;
231 thermal-zones {
233 polling-delay-passive = <100>;
234 polling-delay = <1000>;
236 thermal-sensors = <&scmi_sensors0 3>;