Lines Matching refs:kidx
1914 u8 kidx = dpk->cur_idx[path];
1916 dpk->bp[path][kidx].band = chan->band_type;
1917 dpk->bp[path][kidx].ch = chan->channel;
1918 dpk->bp[path][kidx].bw = chan->band_width;
1925 dpk->bp[path][kidx].band == 0 ? "2G" :
1926 dpk->bp[path][kidx].band == 1 ? "5G" : "6G",
1927 dpk->bp[path][kidx].ch,
1928 dpk->bp[path][kidx].bw == 0 ? "20M" :
1929 dpk->bp[path][kidx].bw == 1 ? "40M" : "80M");
2064 enum rtw89_rf_path path, u8 kidx)
2068 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) {
2090 if (dpk->bp[path][kidx].band == RTW89_BAND_6G && dpk->bp[path][kidx].ch >= 161)
2101 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160)
2106 static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)
2110 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160) {
2113 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) {
2116 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) {
2124 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160 ? "160M" :
2125 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" :
2126 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M");
2129 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)
2144 dpk->corr_idx[path][kidx] = corr_idx;
2145 dpk->corr_val[path][kidx] = corr_val;
2159 dpk->dc_i[path][kidx] = dc_i;
2160 dpk->dc_q[path][kidx] = dc_q;
2230 enum rtw89_rf_path path, u8 kidx)
2287 enum rtw89_rf_path path, u8 kidx)
2296 return _dpk_sync_check(rtwdev, path, kidx);
2324 enum rtw89_rf_path path, u8 kidx, u8 init_xdbm, u8 loss_only)
2339 is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx);
2357 if (dpk->bp[path][kidx].band == RTW89_BAND_2G)
2366 tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx);
2454 enum rtw89_rf_path path, u8 kidx)
2469 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_5 ||
2470 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_10 ||
2471 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_20)
2473 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ||
2474 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80)
2536 enum rtw89_rf_path path, u8 kidx)
2543 R_DPD_CH0A + (path << 8) + (kidx << 2),
2547 R_DPD_CH0A + (path << 8) + (kidx << 2),
2551 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_MDPD, kidx);
2556 static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)
2563 para = rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8),
2566 dpk->bp[path][kidx].txagc_dpk = FIELD_GET(_DPK_PARA_TXAGC, para);
2567 dpk->bp[path][kidx].ther_dpk = FIELD_GET(_DPK_PARA_THER, para);
2570 dpk->cur_k_set, dpk->bp[path][kidx].ther_dpk, dpk->bp[path][kidx].txagc_dpk);
2574 enum rtw89_rf_path path, u8 kidx, bool is_execute)
2584 rtw89_phy_write32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8),
2587 dpk->bp[path][kidx].gs =
2588 rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8),
2621 enum rtw89_rf_path path, u8 kidx)
2627 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2),
2630 dpk->bp[path][kidx].mdpd_en = BIT(dpk->cur_k_set);
2631 dpk->bp[path][kidx].path_ok = true;
2634 path, kidx, dpk->bp[path][kidx].mdpd_en);
2636 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2),
2637 B_DPD_MEN, dpk->bp[path][kidx].mdpd_en);
2639 _dpk_gain_normalize_8852c(rtwdev, phy, path, kidx, false);
2646 u8 kidx = dpk->cur_idx[path];
2651 "[DPK] ========= S%d[%d] DPK Start =========\n", path, kidx);
2655 _dpk_rf_setting(rtwdev, gain, path, kidx);
2658 _dpk_kip_preset_8852c(rtwdev, phy, path, kidx);
2661 _dpk_tpg_sel(rtwdev, path, kidx);
2663 is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false);
2667 _dpk_idl_mpa(rtwdev, phy, path, kidx);
2668 _dpk_para_query(rtwdev, path, kidx);
2669 _dpk_on(rtwdev, phy, path, kidx);
2674 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx,
2683 u8 kidx = dpk->cur_idx[path];
2685 dpk->bp[path][kidx].path_ok = false;
2826 u8 val, kidx = dpk->cur_idx[path];
2828 val = dpk->is_dpk_enable && !off && dpk->bp[path][kidx].path_ok ?
2829 dpk->bp[path][kidx].mdpd_en : 0;
2831 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2),
2835 kidx, dpk->is_dpk_enable && !off ? "enable" : "disable");
2841 u8 path, kidx;
2849 kidx = dpk->cur_idx[path];
2852 path, kidx, dpk->bp[path][kidx].ch);
2876 if (dpk->bp[path][kidx].ch != 0 && cur_ther != 0)
2877 delta_ther = dpk->bp[path][kidx].ther_dpk - cur_ther;
2883 delta_ther, cur_ther, dpk->bp[path][kidx].ther_dpk);
2886 txagc_rf - dpk->bp[path][kidx].txagc_dpk, txagc_rf,
2887 dpk->bp[path][kidx].txagc_dpk);
2900 rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2),