Lines Matching +full:106 +full:- +full:db
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
522 ether_addr_copy(efuse->addr, map->e.mac_addr);
523 efuse->rfe_type = map->rfe_type;
524 efuse->xtal_cap = map->xtal_k;
530 struct rtw89_tssi_info *tssi = &rtwdev->tssi;
531 struct rtw8852a_tssi_offset *ofst[] = {&map->path_a_tssi, &map->path_b_tssi};
534 tssi->thermal[RF_PATH_A] = map->path_a_therm;
535 tssi->thermal[RF_PATH_B] = map->path_b_therm;
538 memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi,
539 sizeof(ofst[i]->cck_tssi));
544 i, j, tssi->tssi_cck[i][j]);
546 memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi,
547 sizeof(ofst[i]->bw40_tssi));
548 memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM,
549 ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g));
554 i, j, tssi->tssi_mcs[i][j]);
561 struct rtw89_efuse *efuse = &rtwdev->efuse;
566 efuse->country_code[0] = map->country_code[0];
567 efuse->country_code[1] = map->country_code[1];
570 switch (rtwdev->hci.type) {
575 return -ENOTSUPP;
578 rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type);
585 struct rtw89_tssi_info *tssi = &rtwdev->tssi;
587 u32 addr = rtwdev->chip->phycap_addr;
595 ofst = tssi_trim_addr[i] - addr - j;
596 tssi->tssi_trim[i][j] = phycap_map[ofst];
604 memset(tssi->tssi_trim, 0, sizeof(tssi->tssi_trim));
613 i, j, tssi->tssi_trim[i][j],
614 tssi_trim_addr[i] - j);
620 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim;
622 u32 addr = rtwdev->chip->phycap_addr;
626 info->thermal_trim[i] = phycap_map[thm_trim_addr[i] - addr];
630 i, info->thermal_trim[i]);
632 if (info->thermal_trim[i] != 0xff)
633 info->pg_thermal_trim = true;
644 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim;
647 if (!info->pg_thermal_trim) {
655 val = __thm_setting(info->thermal_trim[i]);
668 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim;
670 u32 addr = rtwdev->chip->phycap_addr;
674 info->pa_bias_trim[i] = phycap_map[pabias_trim_addr[i] - addr];
678 i, info->pa_bias_trim[i]);
680 if (info->pa_bias_trim[i] != 0xff)
681 info->pg_pa_bias_trim = true;
687 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim;
691 if (!info->pg_pa_bias_trim) {
699 pabias_2g = FIELD_GET(GENMASK(3, 0), info->pa_bias_trim[i]);
700 pabias_5g = FIELD_GET(GENMASK(7, 4), info->pa_bias_trim[i]);
735 switch (chan->band_width) {
748 switch (chan->band_width) {
765 if (chan->channel > 14)
789 ch_element = central_ch - 1;
792 ch_element = central_ch - 1 + 2;
794 ch_element = central_ch - 1 - 2;
797 return -EINVAL;
814 rtw89_warn(rtwdev, "Invalid RF_0x18 for Path-%d\n", path);
833 return 106;
871 if (!rtwdev->dbcc_en) {
961 rtw89_warn(rtwdev, "Invalid RF_0x18 for Path-%d\n", path);
1057 if (!rtwdev->dbcc_en)
1165 if (rtwdev->hal.cv <= CHIP_CCV) {
1200 bool cck_en = chan->channel <= 14;
1201 u8 pri_ch_idx = chan->pri_ch_idx;
1204 rtw8852a_ctrl_sco_cck(rtwdev, chan->channel,
1205 chan->primary_channel,
1206 chan->band_width);
1208 rtw8852a_ctrl_ch(rtwdev, chan->channel, phy_idx);
1209 rtw8852a_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx);
1216 rtw8852a_spur_elimination(rtwdev, chan->channel);
1218 chan->primary_channel);
1257 if (!rtwdev->dbcc_en) {
1285 rtw89_chip_stop_sch_tx(rtwdev, mac_idx, &p->tx_en,
1299 rtw89_chip_resume_sch_tx(rtwdev, mac_idx, p->tx_en);
1305 struct rtw89_efuse *efuse = &rtwdev->efuse;
1307 switch (efuse->rfe_type) {
1314 rtwdev->fem.epa_2g = true;
1315 rtwdev->fem.elna_2g = true;
1321 rtwdev->fem.epa_5g = true;
1322 rtwdev->fem.elna_5g = true;
1331 rtwdev->is_tssi_mode[RF_PATH_A] = false;
1332 rtwdev->is_tssi_mode[RF_PATH_B] = false;
1384 tssi_ofst_cw = (u32)((s16)tssi_16dbm_cw + (ref << 1) - (16 << 3));
1400 if (pw_ofst < -16 || pw_ofst > 15) {
1410 val_2t = max(val_1t - 3, -16);
1502 if (tx_info->mode == CONT_TX)
1505 else if (tx_info->mode == PKTS_TX)
1514 enum rtw8852a_pmac_mode mode = tx_info->mode;
1515 u32 pkt_cnt = tx_info->tx_cnt;
1516 u16 period = tx_info->period;
1518 if (mode == CONT_TX && !tx_info->is_cck) {
1541 if (!tx_info->en_pmac_tx) {
1544 if (chan->band_type == RTW89_BAND_2G)
1591 if (!rtwdev->dbcc_en) {
1655 if (rtwdev->is_tssi_mode[rf_path]) {
1672 const struct rtw89_btc_ver *ver = rtwdev->btc.ver;
1673 union rtw89_btc_module_info *md = &rtwdev->btc.mdinfo;
1675 if (ver->fcxinit == 7) {
1676 md->md_v7.rfe_type = rtwdev->efuse.rfe_type;
1677 md->md_v7.kt_ver = rtwdev->hal.cv;
1678 md->md_v7.bt_solo = 0;
1679 md->md_v7.switch_type = BTC_SWITCH_INTERNAL;
1681 if (md->md_v7.rfe_type > 0)
1682 md->md_v7.ant.num = (md->md_v7.rfe_type % 2 ? 2 : 3);
1684 md->md_v7.ant.num = 2;
1686 md->md_v7.ant.diversity = 0;
1687 md->md_v7.ant.isolation = 10;
1689 if (md->md_v7.ant.num == 3) {
1690 md->md_v7.ant.type = BTC_ANT_DEDICATED;
1691 md->md_v7.bt_pos = BTC_BT_ALONE;
1693 md->md_v7.ant.type = BTC_ANT_SHARED;
1694 md->md_v7.bt_pos = BTC_BT_BTG;
1696 rtwdev->btc.btg_pos = md->md_v7.ant.btg_pos;
1697 rtwdev->btc.ant_type = md->md_v7.ant.type;
1699 md->md.rfe_type = rtwdev->efuse.rfe_type;
1700 md->md.cv = rtwdev->hal.cv;
1701 md->md.bt_solo = 0;
1702 md->md.switch_type = BTC_SWITCH_INTERNAL;
1704 if (md->md.rfe_type > 0)
1705 md->md.ant.num = (md->md.rfe_type % 2 ? 2 : 3);
1707 md->md.ant.num = 2;
1709 md->md.ant.diversity = 0;
1710 md->md.ant.isolation = 10;
1712 if (md->md.ant.num == 3) {
1713 md->md.ant.type = BTC_ANT_DEDICATED;
1714 md->md.bt_pos = BTC_BT_ALONE;
1716 md->md.ant.type = BTC_ANT_SHARED;
1717 md->md.bt_pos = BTC_BT_BTG;
1719 rtwdev->btc.btg_pos = md->md.ant.btg_pos;
1720 rtwdev->btc.ant_type = md->md.ant.type;
1750 struct rtw89_btc *btc = &rtwdev->btc;
1751 const struct rtw89_chip_info *chip = rtwdev->chip;
1760 /* set WL Tx response = Hi-Pri */
1761 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true);
1762 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true);
1769 if (btc->ant_type == BTC_ANT_SHARED) {
1774 /* set path-A(S0) Tx/Rx no-mask if GNT_WL=0 && BT_S1=tx group */
1777 } else { /* set WL Tx stb if GNT_WL = 0 && BT_S1 = ss group for 3-ant */
1790 btc->cx.wl.status.map.init_ok = true;
1891 return clamp_t(s8, val + 6, -100, 0) + 100;
1895 {255, 0, 0, 7}, /* 0 -> original */
1896 {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */
1897 {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */
1898 {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */
1899 {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */
1900 {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */
1907 {255, 0, 0, 7}, /* 0 -> original */
1908 {255, 2, 0, 7}, /* 1 -> reserved for shared-antenna */
1909 {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */
1910 {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */
1911 {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */
1912 {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */
1941 struct rtw89_btc *btc = &rtwdev->btc;
1942 const struct rtw89_btc_ver *ver = btc->ver;
1943 struct rtw89_btc_cx *cx = &btc->cx;
1946 if (ver->fcxbtcrpt != 1)
1950 cx->cnt_bt[BTC_BCNT_HIPRI_TX] = FIELD_GET(B_AX_STATIS_BT_HI_TX_MASK, val);
1951 cx->cnt_bt[BTC_BCNT_HIPRI_RX] = FIELD_GET(B_AX_STATIS_BT_HI_RX_MASK, val);
1954 cx->cnt_bt[BTC_BCNT_LOPRI_TX] = FIELD_GET(B_AX_STATIS_BT_LO_TX_1_MASK, val);
1955 cx->cnt_bt[BTC_BCNT_LOPRI_RX] = FIELD_GET(B_AX_STATIS_BT_LO_RX_1_MASK, val);
1957 /* clock-gate off before reset counter*/
1971 /* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */
1984 /* level=0 Default: TIA 1/0= (LNA2,TIAN6) = (7,1)/(5,1) = 21dB/12dB
1985 * level=1 Fix LNA2=5: TIA 1/0= (LNA2,TIAN6) = (5,0)/(5,1) = 18dB/12dB
1986 * To improve BT ACI in co-rx
2011 struct rtw89_btc *btc = &rtwdev->btc;
2017 btc->dm.wl_lna2 = 0;
2019 case 1: /* for FDD free-run */
2021 btc->dm.wl_lna2 = 0;
2023 case 2: /* for BTG Co-Rx*/
2025 btc->dm.wl_lna2 = 1;
2029 rtw8852a_set_wl_lna2(rtwdev, btc->dm.wl_lna2);
2036 u16 chan = phy_ppdu->chan_idx;
2043 status->freq = ieee80211_channel_to_frequency(chan, band);
2044 status->band = band;
2052 u8 *rx_power = phy_ppdu->rssi;
2054 status->signal = RTW89_RSSI_RAW_TO_DBM(max(rx_power[RF_PATH_A], rx_power[RF_PATH_B]));
2055 for (path = 0; path < rtwdev->chip->rf_path_num; path++) {
2056 status->chains |= BIT(path);
2057 status->chain_signal[path] = RTW89_RSSI_RAW_TO_DBM(rx_power[path]);
2059 if (phy_ppdu->valid)