Lines Matching +full:trim +full:- +full:data +full:- +full:valid
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2022-2023 Realtek Corporation
78 9, /* CH 0-11 pre-cost */
79 32, /* H2C pre-cost */
80 64, /* WP CH 0-7 pre-cost */
81 24, /* WP CH 8-11 pre-cost */
82 1, /* CH 0-11 full condition */
84 1, /* WP CH 0-7 full condition */
85 1, /* WP CH 8-11 full condition */
311 {255, 0, 0, 7}, /* 0 -> original */
312 {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */
313 {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */
314 {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */
315 {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */
316 {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */
323 {255, 0, 0, 7}, /* 0 -> original */
324 {255, 2, 0, 7}, /* 1 -> reserved for shared-antenna */
325 {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */
326 {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */
327 {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */
328 {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */
388 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) in rtw8851b_pwr_on_func()
434 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) in rtw8851b_pwr_on_func()
438 if (rtwdev->hal.cv == CHIP_CAV) { in rtw8851b_pwr_on_func()
441 rtwdev->hal.cv = val8; in rtw8851b_pwr_on_func()
446 if (rtwdev->hal.cv != CHIP_CAV) { in rtw8851b_pwr_on_func()
520 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) in rtw8851b_pwr_off_func()
522 else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB) in rtw8851b_pwr_off_func()
525 if (rtwdev->hal.cv == CHIP_CAV) { in rtw8851b_pwr_off_func()
532 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { in rtw8851b_pwr_off_func()
534 } else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB) { in rtw8851b_pwr_off_func()
547 struct rtw89_tssi_info *tssi = &rtwdev->tssi; in rtw8851b_efuse_parsing_tssi()
548 struct rtw8851b_tssi_offset *ofst[] = {&map->path_a_tssi}; in rtw8851b_efuse_parsing_tssi()
551 tssi->thermal[RF_PATH_A] = map->path_a_therm; in rtw8851b_efuse_parsing_tssi()
554 memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi, in rtw8851b_efuse_parsing_tssi()
555 sizeof(ofst[i]->cck_tssi)); in rtw8851b_efuse_parsing_tssi()
560 i, j, tssi->tssi_cck[i][j]); in rtw8851b_efuse_parsing_tssi()
562 memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi, in rtw8851b_efuse_parsing_tssi()
563 sizeof(ofst[i]->bw40_tssi)); in rtw8851b_efuse_parsing_tssi()
564 memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM, in rtw8851b_efuse_parsing_tssi()
565 ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g)); in rtw8851b_efuse_parsing_tssi()
570 i, j, tssi->tssi_mcs[i][j]); in rtw8851b_efuse_parsing_tssi()
574 static bool _decode_efuse_gain(u8 data, s8 *high, s8 *low) in _decode_efuse_gain() argument
577 *high = sign_extend32(u8_get_bits(data, GENMASK(7, 4)), 3); in _decode_efuse_gain()
579 *low = sign_extend32(u8_get_bits(data, GENMASK(3, 0)), 3); in _decode_efuse_gain()
581 return data != 0xff; in _decode_efuse_gain()
587 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; in rtw8851b_efuse_parsing_gain_offset()
588 bool valid = false; in rtw8851b_efuse_parsing_gain_offset() local
590 valid |= _decode_efuse_gain(map->rx_gain_2g_cck, in rtw8851b_efuse_parsing_gain_offset()
591 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK], in rtw8851b_efuse_parsing_gain_offset()
593 valid |= _decode_efuse_gain(map->rx_gain_2g_ofdm, in rtw8851b_efuse_parsing_gain_offset()
594 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM], in rtw8851b_efuse_parsing_gain_offset()
596 valid |= _decode_efuse_gain(map->rx_gain_5g_low, in rtw8851b_efuse_parsing_gain_offset()
597 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW], in rtw8851b_efuse_parsing_gain_offset()
599 valid |= _decode_efuse_gain(map->rx_gain_5g_mid, in rtw8851b_efuse_parsing_gain_offset()
600 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID], in rtw8851b_efuse_parsing_gain_offset()
602 valid |= _decode_efuse_gain(map->rx_gain_5g_high, in rtw8851b_efuse_parsing_gain_offset()
603 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH], in rtw8851b_efuse_parsing_gain_offset()
606 gain->offset_valid = valid; in rtw8851b_efuse_parsing_gain_offset()
612 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw8851b_read_efuse()
617 efuse->country_code[0] = map->country_code[0]; in rtw8851b_read_efuse()
618 efuse->country_code[1] = map->country_code[1]; in rtw8851b_read_efuse()
622 switch (rtwdev->hci.type) { in rtw8851b_read_efuse()
624 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8851b_read_efuse()
627 ether_addr_copy(efuse->addr, map->u.mac_addr); in rtw8851b_read_efuse()
630 return -EOPNOTSUPP; in rtw8851b_read_efuse()
633 efuse->rfe_type = map->rfe_type; in rtw8851b_read_efuse()
634 efuse->xtal_cap = map->xtal_k; in rtw8851b_read_efuse()
636 rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); in rtw8851b_read_efuse()
643 struct rtw89_tssi_info *tssi = &rtwdev->tssi; in rtw8851b_phycap_parsing_tssi()
645 u32 addr = rtwdev->chip->phycap_addr; in rtw8851b_phycap_parsing_tssi()
653 ofst = tssi_trim_addr[i] - addr - j; in rtw8851b_phycap_parsing_tssi()
654 tssi->tssi_trim[i][j] = phycap_map[ofst]; in rtw8851b_phycap_parsing_tssi()
662 memset(tssi->tssi_trim, 0, sizeof(tssi->tssi_trim)); in rtw8851b_phycap_parsing_tssi()
664 "[TSSI][TRIM] no PG, set all trim info to 0\n"); in rtw8851b_phycap_parsing_tssi()
670 "[TSSI] path=%d idx=%d trim=0x%x addr=0x%x\n", in rtw8851b_phycap_parsing_tssi()
671 i, j, tssi->tssi_trim[i][j], in rtw8851b_phycap_parsing_tssi()
672 tssi_trim_addr[i] - j); in rtw8851b_phycap_parsing_tssi()
678 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8851b_phycap_parsing_thermal_trim()
680 u32 addr = rtwdev->chip->phycap_addr; in rtw8851b_phycap_parsing_thermal_trim()
684 info->thermal_trim[i] = phycap_map[thm_trim_addr[i] - addr]; in rtw8851b_phycap_parsing_thermal_trim()
687 "[THERMAL][TRIM] path=%d thermal_trim=0x%x\n", in rtw8851b_phycap_parsing_thermal_trim()
688 i, info->thermal_trim[i]); in rtw8851b_phycap_parsing_thermal_trim()
690 if (info->thermal_trim[i] != 0xff) in rtw8851b_phycap_parsing_thermal_trim()
691 info->pg_thermal_trim = true; in rtw8851b_phycap_parsing_thermal_trim()
702 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8851b_thermal_trim()
705 if (!info->pg_thermal_trim) { in rtw8851b_thermal_trim()
707 "[THERMAL][TRIM] no PG, do nothing\n"); in rtw8851b_thermal_trim()
713 val = __thm_setting(info->thermal_trim[i]); in rtw8851b_thermal_trim()
717 "[THERMAL][TRIM] path=%d thermal_setting=0x%x\n", in rtw8851b_thermal_trim()
726 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8851b_phycap_parsing_pa_bias_trim()
728 u32 addr = rtwdev->chip->phycap_addr; in rtw8851b_phycap_parsing_pa_bias_trim()
732 info->pa_bias_trim[i] = phycap_map[pabias_trim_addr[i] - addr]; in rtw8851b_phycap_parsing_pa_bias_trim()
735 "[PA_BIAS][TRIM] path=%d pa_bias_trim=0x%x\n", in rtw8851b_phycap_parsing_pa_bias_trim()
736 i, info->pa_bias_trim[i]); in rtw8851b_phycap_parsing_pa_bias_trim()
738 if (info->pa_bias_trim[i] != 0xff) in rtw8851b_phycap_parsing_pa_bias_trim()
739 info->pg_pa_bias_trim = true; in rtw8851b_phycap_parsing_pa_bias_trim()
745 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8851b_pa_bias_trim()
749 if (!info->pg_pa_bias_trim) { in rtw8851b_pa_bias_trim()
751 "[PA_BIAS][TRIM] no PG, do nothing\n"); in rtw8851b_pa_bias_trim()
757 pabias_2g = u8_get_bits(info->pa_bias_trim[i], GENMASK(3, 0)); in rtw8851b_pa_bias_trim()
758 pabias_5g = u8_get_bits(info->pa_bias_trim[i], GENMASK(7, 4)); in rtw8851b_pa_bias_trim()
761 "[PA_BIAS][TRIM] path=%d 2G=0x%x 5G=0x%x\n", in rtw8851b_pa_bias_trim()
774 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; in rtw8851b_phycap_parsing_gain_comp()
775 u32 phycap_addr = rtwdev->chip->phycap_addr; in rtw8851b_phycap_parsing_gain_comp()
776 bool valid = false; in rtw8851b_phycap_parsing_gain_comp() local
778 u8 data; in rtw8851b_phycap_parsing_gain_comp() local
785 data = phycap_map[comp_addrs[path][i] - phycap_addr]; in rtw8851b_phycap_parsing_gain_comp()
786 valid |= _decode_efuse_gain(data, NULL, in rtw8851b_phycap_parsing_gain_comp()
787 &gain->comp[path][i]); in rtw8851b_phycap_parsing_gain_comp()
790 gain->comp_valid = valid; in rtw8851b_phycap_parsing_gain_comp()
795 u32 phycap_addr = rtwdev->chip->phycap_addr; in rtw8851b_phycap_parsing_adc_td()
796 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw8851b_phycap_parsing_adc_td()
799 efuse->adc_td = phycap_map[addr_adc_td - phycap_addr] & GENMASK(4, 0); in rtw8851b_phycap_parsing_adc_td()
821 /* 2 continual 32-bit registers for 32 GPIOs, and each GPIO occupies 2 bits */ in rtw8851b_set_bb_gpio()
828 /* 4 continual 32-bit registers for 32 GPIOs, and each GPIO occupies 4 bits */ in rtw8851b_set_bb_gpio()
857 rtw89_write8_mask(rtwdev, def->addr, def->mask, def->data); in rtw8851b_set_mac_gpio()
862 u8 rfe_type = rtwdev->efuse.rfe_type; in rtw8851b_rfe_gpio()
891 switch (chan->band_width) { in rtw8851b_set_channel_mac()
902 switch (chan->band_width) { in rtw8851b_set_channel_mac()
919 if (chan->channel > 14) { in rtw8851b_set_channel_mac()
942 u8 ch_element = primary_ch - 1; in rtw8851b_ctrl_sco_cck()
1012 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw8851b_set_gain_error()
1026 val = gain->lna_gain[gain_band][path][i]; in rtw8851b_set_gain_error()
1037 val = gain->tia_gain[gain_band][path][i]; in rtw8851b_set_gain_error()
1048 struct rtw89_phy_efuse_gain *efuse_gain = &rtwdev->efuse_gain; in rtw8851b_set_gain_offset()
1055 if (!efuse_gain->comp_valid) in rtw8851b_set_gain_offset()
1059 tmp = efuse_gain->comp[path][subband]; in rtw8851b_set_gain_offset()
1065 if (!efuse_gain->offset_valid) in rtw8851b_set_gain_offset()
1070 offset_a = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; in rtw8851b_set_gain_offset()
1072 tmp = -((offset_a << 2) + (efuse_gain->offset_base[RTW89_PHY_0] >> 2)); in rtw8851b_set_gain_offset()
1076 offset_ofdm = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; in rtw8851b_set_gain_offset()
1077 offset_cck = -efuse_gain->offset[RF_PATH_A][0]; in rtw8851b_set_gain_offset()
1079 tmp = (offset_ofdm << 4) + efuse_gain->offset_base[RTW89_PHY_0]; in rtw8851b_set_gain_offset()
1083 tmp = (offset_ofdm << 4) + efuse_gain->rssi_base[RTW89_PHY_0]; in rtw8851b_set_gain_offset()
1088 tmp = (offset_cck << 3) + (efuse_gain->offset_base[RTW89_PHY_0] >> 1); in rtw8851b_set_gain_offset()
1098 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw8851b_set_rxsc_rpl_comp()
1102 val = u32_encode_bits(gain->rpl_ofst_20[band][RF_PATH_A], B_P0_RPL1_20_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1103 u32_encode_bits(gain->rpl_ofst_40[band][RF_PATH_A][0], B_P0_RPL1_40_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1104 u32_encode_bits(gain->rpl_ofst_40[band][RF_PATH_A][1], B_P0_RPL1_41_MASK); in rtw8851b_set_rxsc_rpl_comp()
1109 val = u32_encode_bits(gain->rpl_ofst_40[band][RF_PATH_A][2], B_P0_RTL2_42_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1110 u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][0], B_P0_RTL2_80_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1111 u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][1], B_P0_RTL2_81_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1112 u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][10], B_P0_RTL2_8A_MASK); in rtw8851b_set_rxsc_rpl_comp()
1116 val = u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][2], B_P0_RTL3_82_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1117 u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][3], B_P0_RTL3_83_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1118 u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][4], B_P0_RTL3_84_MASK) | in rtw8851b_set_rxsc_rpl_comp()
1119 u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][9], B_P0_RTL3_89_MASK); in rtw8851b_set_rxsc_rpl_comp()
1128 u8 subband = chan->subband_type; in rtw8851b_ctrl_ch()
1129 u8 central_ch = chan->channel; in rtw8851b_ctrl_ch()
1143 if (chan->band_type == RTW89_BAND_6G) in rtw8851b_ctrl_ch()
1174 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw8851b_bw_setting()
1177 switch (efuse->adc_td) { in rtw8851b_bw_setting()
1309 u8 center_chan = chan->channel; in rtw8851b_spur_freq()
1311 switch (chan->band_type) { in rtw8851b_spur_freq()
1344 freq_diff = (spur_freq - chan->freq) * 1000000; in rtw8851b_set_csi_tone_idx()
1374 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, in rtw8851b_set_nbi_tone_idx()
1375 nbi->notch1_en.mask, 0); in rtw8851b_set_nbi_tone_idx()
1376 rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, in rtw8851b_set_nbi_tone_idx()
1377 nbi->notch2_en.mask, 0); in rtw8851b_set_nbi_tone_idx()
1381 fc = chan->freq; in rtw8851b_set_nbi_tone_idx()
1382 if (chan->band_width == RTW89_CHANNEL_WIDTH_160) { in rtw8851b_set_nbi_tone_idx()
1383 fc = (spur_freq > fc) ? fc + 40 : fc - 40; in rtw8851b_set_nbi_tone_idx()
1385 chan->channel < chan->primary_channel) || in rtw8851b_set_nbi_tone_idx()
1387 chan->channel > chan->primary_channel)) in rtw8851b_set_nbi_tone_idx()
1391 freq_diff = (spur_freq - fc) * 1000000; in rtw8851b_set_nbi_tone_idx()
1395 if (chan->band_width == RTW89_CHANNEL_WIDTH_20) { in rtw8851b_set_nbi_tone_idx()
1398 u16 tone_para = (chan->band_width == RTW89_CHANNEL_WIDTH_40) ? in rtw8851b_set_nbi_tone_idx()
1406 if (chan->band_width == RTW89_CHANNEL_WIDTH_160 && notch2_chk) { in rtw8851b_set_nbi_tone_idx()
1407 rtw89_phy_write32_mask(rtwdev, nbi->notch2_idx.addr, in rtw8851b_set_nbi_tone_idx()
1408 nbi->notch2_idx.mask, nbi_tone_idx); in rtw8851b_set_nbi_tone_idx()
1409 rtw89_phy_write32_mask(rtwdev, nbi->notch2_frac_idx.addr, in rtw8851b_set_nbi_tone_idx()
1410 nbi->notch2_frac_idx.mask, nbi_frac_tone_idx); in rtw8851b_set_nbi_tone_idx()
1411 rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, in rtw8851b_set_nbi_tone_idx()
1412 nbi->notch2_en.mask, 0); in rtw8851b_set_nbi_tone_idx()
1413 rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, in rtw8851b_set_nbi_tone_idx()
1414 nbi->notch2_en.mask, 1); in rtw8851b_set_nbi_tone_idx()
1415 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, in rtw8851b_set_nbi_tone_idx()
1416 nbi->notch1_en.mask, 0); in rtw8851b_set_nbi_tone_idx()
1418 rtw89_phy_write32_mask(rtwdev, nbi->notch1_idx.addr, in rtw8851b_set_nbi_tone_idx()
1419 nbi->notch1_idx.mask, nbi_tone_idx); in rtw8851b_set_nbi_tone_idx()
1420 rtw89_phy_write32_mask(rtwdev, nbi->notch1_frac_idx.addr, in rtw8851b_set_nbi_tone_idx()
1421 nbi->notch1_frac_idx.mask, nbi_frac_tone_idx); in rtw8851b_set_nbi_tone_idx()
1422 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, in rtw8851b_set_nbi_tone_idx()
1423 nbi->notch1_en.mask, 0); in rtw8851b_set_nbi_tone_idx()
1424 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, in rtw8851b_set_nbi_tone_idx()
1425 nbi->notch1_en.mask, 1); in rtw8851b_set_nbi_tone_idx()
1426 rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, in rtw8851b_set_nbi_tone_idx()
1427 nbi->notch2_en.mask, 0); in rtw8851b_set_nbi_tone_idx()
1433 if (chan->band_type == RTW89_BAND_2G && in rtw8851b_set_cfr()
1434 chan->band_width == RTW89_CHANNEL_WIDTH_20 && in rtw8851b_set_cfr()
1435 (chan->channel == 1 || chan->channel == 13)) { in rtw8851b_set_cfr()
1459 u8 pri_ch = chan->pri_ch_idx; in rtw8851b_5m_mask()
1463 switch (chan->band_width) { in rtw8851b_5m_mask()
1598 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; in rtw8851b_bb_sethw()
1609 gain->offset_base[RTW89_PHY_0] = in rtw8851b_bb_sethw()
1611 gain->rssi_base[RTW89_PHY_0] = in rtw8851b_bb_sethw()
1618 u8 band = chan->band_type, chan_idx; in rtw8851b_set_channel_bb()
1619 bool cck_en = chan->channel <= 14; in rtw8851b_set_channel_bb()
1620 u8 pri_ch_idx = chan->pri_ch_idx; in rtw8851b_set_channel_bb()
1623 rtw8851b_ctrl_sco_cck(rtwdev, chan->primary_channel); in rtw8851b_set_channel_bb()
1626 rtw8851b_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); in rtw8851b_set_channel_bb()
1631 if (chan->band_type == RTW89_BAND_5G) { in rtw8851b_set_channel_bb()
1643 chan_idx = rtw89_encode_chan_idx(rtwdev, chan->primary_channel, band); in rtw8851b_set_channel_bb()
1693 rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8851b_set_channel_help()
1698 rtw8851b_bb_reset_en(rtwdev, chan->band_type, phy_idx, false); in rtw8851b_set_channel_help()
1703 rtw8851b_bb_reset_en(rtwdev, chan->band_type, phy_idx, true); in rtw8851b_set_channel_help()
1704 rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); in rtw8851b_set_channel_help()
1710 rtwdev->is_tssi_mode[RF_PATH_A] = false; in rtw8851b_rfk_init()
1711 rtwdev->is_tssi_mode[RF_PATH_B] = false; in rtw8851b_rfk_init()
1724 enum rtw89_chanctx_idx chanctx_idx = rtwvif_link->chanctx_idx; in rtw8851b_rfk_channel()
1725 enum rtw89_phy_idx phy_idx = rtwvif_link->phy_idx; in rtw8851b_rfk_channel()
1750 rtw8851b_wifi_scan_notify(rtwdev, start, rtwvif_link->phy_idx, in rtw8851b_rfk_scan()
1751 rtwvif_link->chanctx_idx); in rtw8851b_rfk_scan()
1778 tssi_ofst_cw = (u32)((s16)tssi_16dbm_cw + (ref << 1) - (16 << 3)); in rtw8851b_bb_cal_txpwr_ref()
1847 u8 ch = chan->channel; in rtw8851b_bb_set_tx_shape_dfir()
1881 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw8851b_set_tx_shape()
1882 u8 band = chan->band_type; in rtw8851b_set_tx_shape()
1884 u8 tx_shape_cck = (*rfe_parms->tx_shape.lmt)[band][RTW89_RS_CCK][regd]; in rtw8851b_set_tx_shape()
1885 u8 tx_shape_ofdm = (*rfe_parms->tx_shape.lmt)[band][RTW89_RS_OFDM][regd]; in rtw8851b_set_tx_shape()
1917 if (pw_ofst < -16 || pw_ofst > 15) { in rtw8851b_set_txpwr_ul_tb_offset()
1928 pw_ofst = max_t(s8, pw_ofst - 3, -16); in rtw8851b_set_txpwr_ul_tb_offset()
1965 if (chan->band_type == RTW89_BAND_2G) { in rtw8851b_ctrl_nbtg_bt_tx()
2004 if (chan->band_type == RTW89_BAND_2G) { in rtw8851b_ctrl_btg_bt_rx()
2041 rtw8851b_set_gain_offset(rtwdev, chan->subband_type, RTW89_PHY_0); in rtw8851b_bb_ctrl_rx_path()
2054 if (rtwdev->hal.rx_nss == 1) { in rtw8851b_bb_cfg_txrx_path()
2066 if (rtwdev->is_tssi_mode[rf_path]) { in rtw8851b_get_thermal()
2083 const struct rtw89_btc_ver *ver = rtwdev->btc.ver; in rtw8851b_btc_set_rfe()
2084 union rtw89_btc_module_info *md = &rtwdev->btc.mdinfo; in rtw8851b_btc_set_rfe()
2086 if (ver->fcxinit == 7) { in rtw8851b_btc_set_rfe()
2087 md->md_v7.rfe_type = rtwdev->efuse.rfe_type; in rtw8851b_btc_set_rfe()
2088 md->md_v7.kt_ver = rtwdev->hal.cv; in rtw8851b_btc_set_rfe()
2089 md->md_v7.bt_solo = 0; in rtw8851b_btc_set_rfe()
2090 md->md_v7.switch_type = BTC_SWITCH_INTERNAL; in rtw8851b_btc_set_rfe()
2091 md->md_v7.ant.isolation = 10; in rtw8851b_btc_set_rfe()
2092 md->md_v7.kt_ver_adie = rtwdev->hal.acv; in rtw8851b_btc_set_rfe()
2094 if (md->md_v7.rfe_type == 0) in rtw8851b_btc_set_rfe()
2097 /* rfe_type 3*n+1: 1-Ant(shared), in rtw8851b_btc_set_rfe()
2098 * 3*n+2: 2-Ant+Div(non-shared), in rtw8851b_btc_set_rfe()
2099 * 3*n+3: 2-Ant+no-Div(non-shared) in rtw8851b_btc_set_rfe()
2101 md->md_v7.ant.num = (md->md_v7.rfe_type % 3 == 1) ? 1 : 2; in rtw8851b_btc_set_rfe()
2102 /* WL-1ss at S0, btg at s0 (On 1 WL RF) */ in rtw8851b_btc_set_rfe()
2103 md->md_v7.ant.single_pos = RF_PATH_A; in rtw8851b_btc_set_rfe()
2104 md->md_v7.ant.btg_pos = RF_PATH_A; in rtw8851b_btc_set_rfe()
2105 md->md_v7.ant.stream_cnt = 1; in rtw8851b_btc_set_rfe()
2107 if (md->md_v7.ant.num == 1) { in rtw8851b_btc_set_rfe()
2108 md->md_v7.ant.type = BTC_ANT_SHARED; in rtw8851b_btc_set_rfe()
2109 md->md_v7.bt_pos = BTC_BT_BTG; in rtw8851b_btc_set_rfe()
2110 md->md_v7.wa_type = 1; in rtw8851b_btc_set_rfe()
2111 md->md_v7.ant.diversity = 0; in rtw8851b_btc_set_rfe()
2113 md->md_v7.ant.type = BTC_ANT_DEDICATED; in rtw8851b_btc_set_rfe()
2114 md->md_v7.bt_pos = BTC_BT_ALONE; in rtw8851b_btc_set_rfe()
2115 md->md_v7.switch_type = BTC_SWITCH_EXTERNAL; in rtw8851b_btc_set_rfe()
2116 md->md_v7.wa_type = 0; in rtw8851b_btc_set_rfe()
2117 if (md->md_v7.rfe_type % 3 == 2) in rtw8851b_btc_set_rfe()
2118 md->md_v7.ant.diversity = 1; in rtw8851b_btc_set_rfe()
2120 rtwdev->btc.btg_pos = md->md_v7.ant.btg_pos; in rtw8851b_btc_set_rfe()
2121 rtwdev->btc.ant_type = md->md_v7.ant.type; in rtw8851b_btc_set_rfe()
2123 md->md.rfe_type = rtwdev->efuse.rfe_type; in rtw8851b_btc_set_rfe()
2124 md->md.cv = rtwdev->hal.cv; in rtw8851b_btc_set_rfe()
2125 md->md.bt_solo = 0; in rtw8851b_btc_set_rfe()
2126 md->md.switch_type = BTC_SWITCH_INTERNAL; in rtw8851b_btc_set_rfe()
2127 md->md.ant.isolation = 10; in rtw8851b_btc_set_rfe()
2128 md->md.kt_ver_adie = rtwdev->hal.acv; in rtw8851b_btc_set_rfe()
2130 if (md->md.rfe_type == 0) in rtw8851b_btc_set_rfe()
2133 /* rfe_type 3*n+1: 1-Ant(shared), in rtw8851b_btc_set_rfe()
2134 * 3*n+2: 2-Ant+Div(non-shared), in rtw8851b_btc_set_rfe()
2135 * 3*n+3: 2-Ant+no-Div(non-shared) in rtw8851b_btc_set_rfe()
2137 md->md.ant.num = (md->md.rfe_type % 3 == 1) ? 1 : 2; in rtw8851b_btc_set_rfe()
2138 /* WL-1ss at S0, btg at s0 (On 1 WL RF) */ in rtw8851b_btc_set_rfe()
2139 md->md.ant.single_pos = RF_PATH_A; in rtw8851b_btc_set_rfe()
2140 md->md.ant.btg_pos = RF_PATH_A; in rtw8851b_btc_set_rfe()
2141 md->md.ant.stream_cnt = 1; in rtw8851b_btc_set_rfe()
2143 if (md->md.ant.num == 1) { in rtw8851b_btc_set_rfe()
2144 md->md.ant.type = BTC_ANT_SHARED; in rtw8851b_btc_set_rfe()
2145 md->md.bt_pos = BTC_BT_BTG; in rtw8851b_btc_set_rfe()
2146 md->md.wa_type = 1; in rtw8851b_btc_set_rfe()
2147 md->md.ant.diversity = 0; in rtw8851b_btc_set_rfe()
2149 md->md.ant.type = BTC_ANT_DEDICATED; in rtw8851b_btc_set_rfe()
2150 md->md.bt_pos = BTC_BT_ALONE; in rtw8851b_btc_set_rfe()
2151 md->md.switch_type = BTC_SWITCH_EXTERNAL; in rtw8851b_btc_set_rfe()
2152 md->md.wa_type = 0; in rtw8851b_btc_set_rfe()
2153 if (md->md.rfe_type % 3 == 2) in rtw8851b_btc_set_rfe()
2154 md->md.ant.diversity = 1; in rtw8851b_btc_set_rfe()
2156 rtwdev->btc.btg_pos = md->md.ant.btg_pos; in rtw8851b_btc_set_rfe()
2157 rtwdev->btc.ant_type = md->md.ant.type; in rtw8851b_btc_set_rfe()
2165 group--; /* Tx-group=1, Rx-group=2 */ in rtw8851b_set_trx_mask()
2167 if (rtwdev->btc.ant_type == BTC_ANT_SHARED) /* 1-Ant */ in rtw8851b_set_trx_mask()
2180 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw8851b_btc_init_cfg()
2181 struct rtw89_btc *btc = &rtwdev->btc; in rtw8851b_btc_init_cfg()
2182 union rtw89_btc_module_info *md = &btc->mdinfo; in rtw8851b_btc_init_cfg()
2183 const struct rtw89_btc_ver *ver = btc->ver; in rtw8851b_btc_init_cfg()
2189 /* set WL Tx response = Hi-Pri */ in rtw8851b_btc_init_cfg()
2190 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true); in rtw8851b_btc_init_cfg()
2191 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true); in rtw8851b_btc_init_cfg()
2193 if (ver->fcxinit == 7) { in rtw8851b_btc_init_cfg()
2194 str_cnt = md->md_v7.ant.stream_cnt; in rtw8851b_btc_init_cfg()
2195 ant_sing_pos = md->md_v7.ant.single_pos; in rtw8851b_btc_init_cfg()
2197 str_cnt = md->md.ant.stream_cnt; in rtw8851b_btc_init_cfg()
2198 ant_sing_pos = md->md.ant.single_pos; in rtw8851b_btc_init_cfg()
2201 /* for 1-Ant && 1-ss case: only 1-path */ in rtw8851b_btc_init_cfg()
2211 /* set rf gnt-debug off */ in rtw8851b_btc_init_cfg()
2214 /* set DEBUG_LUT_RFMODE_MASK = 1 to start trx-mask-setup */ in rtw8851b_btc_init_cfg()
2217 /* if GNT_WL=0 && BT=SS_group --> WL Tx/Rx = THRU */ in rtw8851b_btc_init_cfg()
2220 /* if GNT_WL=0 && BT=Rx_group --> WL-Rx = THRU + WL-Tx = MASK */ in rtw8851b_btc_init_cfg()
2223 /* if GNT_WL = 0 && BT = Tx_group --> in rtw8851b_btc_init_cfg()
2224 * Shared-Ant && BTG-path:WL mask(0x55f), others:WL THRU(0x5ff) in rtw8851b_btc_init_cfg()
2226 if (btc->ant_type == BTC_ANT_SHARED && btc->btg_pos == path) in rtw8851b_btc_init_cfg()
2231 /* set DEBUG_LUT_RFMODE_MASK = 0 to stop trx-mask-setup */ in rtw8851b_btc_init_cfg()
2241 btc->cx.wl.status.map.init_ok = true; in rtw8851b_btc_init_cfg()
2279 s16 data:9; member
2287 s16 data:9; member
2317 val = arg.all_time.data; in rtw8851b_btc_set_wl_txpwr_ctrl()
2330 val = arg.gnt_bt.data; in rtw8851b_btc_set_wl_txpwr_ctrl()
2343 val = clamp_t(s8, val, -100, 0) + 100; in rtw8851b_btc_get_bt_rssi()
2357 struct rtw89_btc *btc = &rtwdev->btc; in rtw8851b_btc_wl_s1_standby()
2359 rtw89_write_rf(rtwdev, btc->btg_pos, RR_LUTWE, RFREG_MASK, 0x80000); in rtw8851b_btc_wl_s1_standby()
2360 rtw89_write_rf(rtwdev, btc->btg_pos, RR_LUTWA, RFREG_MASK, 0x1); in rtw8851b_btc_wl_s1_standby()
2361 rtw89_write_rf(rtwdev, btc->btg_pos, RR_LUTWD1, RFREG_MASK, 0x110); in rtw8851b_btc_wl_s1_standby()
2363 /* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */ in rtw8851b_btc_wl_s1_standby()
2365 rtw89_write_rf(rtwdev, btc->btg_pos, RR_LUTWD0, RFREG_MASK, 0x179c); in rtw8851b_btc_wl_s1_standby()
2367 rtw89_write_rf(rtwdev, btc->btg_pos, RR_LUTWD0, RFREG_MASK, 0x208); in rtw8851b_btc_wl_s1_standby()
2369 rtw89_write_rf(rtwdev, btc->btg_pos, RR_LUTWE, RFREG_MASK, 0x0); in rtw8851b_btc_wl_s1_standby()
2379 /* To improve BT ACI in co-rx in rtw8851b_btc_set_wl_rx_gain()
2383 struct rtw89_btc *btc = &rtwdev->btc; in rtw8851b_btc_set_wl_rx_gain()
2390 btc->dm.wl_lna2 = 0; in rtw8851b_btc_set_wl_rx_gain()
2392 case 1: /* for FDD free-run */ in rtw8851b_btc_set_wl_rx_gain()
2393 btc->dm.wl_lna2 = 0; in rtw8851b_btc_set_wl_rx_gain()
2395 case 2: /* for BTG Co-Rx*/ in rtw8851b_btc_set_wl_rx_gain()
2396 btc->dm.wl_lna2 = 1; in rtw8851b_btc_set_wl_rx_gain()
2400 if (btc->dm.wl_lna2 == 0) { in rtw8851b_btc_set_wl_rx_gain()
2409 val = rf->data; in rtw8851b_btc_set_wl_rx_gain()
2410 /* bit[10] = 1 if non-shared-ant for 8851b */ in rtw8851b_btc_set_wl_rx_gain()
2411 if (btc->ant_type == BTC_ANT_DEDICATED) in rtw8851b_btc_set_wl_rx_gain()
2414 rtw89_write_rf(rtwdev, btc->btg_pos, rf->addr, LNA2_51B_MA, val); in rtw8851b_btc_set_wl_rx_gain()
2422 u16 chan = phy_ppdu->chan_idx; in rtw8851b_fill_freq_with_ppdu()
2430 status->freq = ieee80211_channel_to_frequency(ch, band); in rtw8851b_fill_freq_with_ppdu()
2431 status->band = band; in rtw8851b_fill_freq_with_ppdu()
2439 u8 *rx_power = phy_ppdu->rssi; in rtw8851b_query_ppdu()
2441 if (!status->signal) in rtw8851b_query_ppdu()
2442 status->signal = RTW89_RSSI_RAW_TO_DBM(rx_power[RF_PATH_A]); in rtw8851b_query_ppdu()
2444 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in rtw8851b_query_ppdu()
2445 status->chains |= BIT(path); in rtw8851b_query_ppdu()
2446 status->chain_signal[path] = RTW89_RSSI_RAW_TO_DBM(rx_power[path]); in rtw8851b_query_ppdu()
2448 if (phy_ppdu->valid) in rtw8851b_query_ppdu()