Lines Matching +full:5 +full:- +full:bit

1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020  Realtek Corporation
9 #define B_AX_AUTOLOAD_SUS BIT(5)
13 #define B_AX_PWC_EV2EF_B15 BIT(15)
14 #define B_AX_PWC_EV2EF_B14 BIT(14)
15 #define B_AX_ISO_EB2CORE BIT(8)
18 #define B_AX_FEN_BB_GLB_RSTN BIT(1)
19 #define B_AX_FEN_BBRSTB BIT(0)
22 #define B_AX_SOP_ASWRM BIT(31)
23 #define B_AX_SOP_PWMM_DSWR BIT(29)
24 #define B_AX_XTAL_OFF_A_DIE BIT(22)
25 #define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(18)
26 #define B_AX_RDY_SYSPWR BIT(17)
27 #define B_AX_EN_WLON BIT(16)
28 #define B_AX_APDM_HPDN BIT(15)
29 #define B_AX_PSUS_OFF_CAPC_EN BIT(14)
30 #define B_AX_AFSM_PCIE_SUS_EN BIT(12)
31 #define B_AX_AFSM_WLSUS_EN BIT(11)
32 #define B_AX_APFM_SWLPS BIT(10)
33 #define B_AX_APFM_OFFMAC BIT(9)
34 #define B_AX_APFN_ONMAC BIT(8)
37 #define B_AX_CPU_CLK_EN BIT(14)
40 #define B_AX_SYM_CTRL_SPS_PWMFREQ BIT(10)
43 #define B_AX_SYM_PADPDN_WL_PTA_1P3 BIT(6)
44 #define B_AX_SYM_PADPDN_WL_RFC_1P3 BIT(5)
47 #define B_AX_R_DIS_PRST BIT(6)
48 #define B_AX_WLOCK_1C_BIT6 BIT(5)
51 #define B_AX_AON_OFF_PC_EN BIT(23)
55 #define B_AX_EF_RDT BIT(27)
58 #define B_AX_EF_PD_DIS BIT(11)
59 #define B_AX_EF_POR BIT(10)
64 #define B_AX_EF_RDY BIT(29)
65 #define B_AX_EF_COMP_RESULT BIT(28)
70 #define B_AX_EF_ENT BIT(31)
71 #define B_AX_EF_BURST BIT(19)
73 #define B_AX_EF_TROW_EN BIT(15)
74 #define B_AX_EF_ERR_FLAG BIT(14)
75 #define B_AX_EF_DSB_EN BIT(11)
76 #define B_AX_PCIE_CALIB_EN_V1 BIT(12)
77 #define B_AX_WDT_WAKE_PCIE_EN BIT(10)
78 #define B_AX_WDT_WAKE_USB_EN BIT(9)
81 #define B_AX_BOOT_MODE BIT(19)
82 #define B_AX_WL_EECS_EXT_32K_SEL BIT(18)
83 #define B_AX_WL_SEC_BONDING_OPT_STS BIT(17)
84 #define B_AX_SECSIC_SEL BIT(16)
85 #define B_AX_ENHTP BIT(14)
86 #define B_AX_BT_AOD_GPIO3 BIT(13)
87 #define B_AX_ENSIC BIT(12)
88 #define B_AX_SIC_SWRST BIT(11)
89 #define B_AX_PO_WIFI_PTA_PINS BIT(10)
90 #define B_AX_PO_BT_PTA_PINS BIT(9)
91 #define B_AX_ENUARTTX BIT(8)
97 #define B_AX_ENBT BIT(5)
98 #define B_AX_EROM_EN BIT(4)
99 #define B_AX_ENUARTRX BIT(2)
104 #define B_AX_DBG_SEL1_16BIT BIT(27)
107 #define B_AX_DBG_SEL0_16BIT BIT(11)
111 #define B_AX_PCIE_DIS_L2_CTRL_LDO_HCI BIT(15)
112 #define B_AX_PCIE_DIS_WLSUS_AFT_PDN BIT(14)
113 #define B_AX_PCIE_FORCE_PWR_NGAT BIT(13)
114 #define B_AX_PCIE_CALIB_EN_V1 BIT(12)
115 #define B_AX_PCIE_AUXCLK_GATE BIT(11)
116 #define B_AX_LTE_MUX_CTRL_PATH BIT(26)
119 #define BIT_WAKE_CTRL_V1 BIT(23)
120 #define BIT_WAKE_CTRL BIT(5)
123 #define B_AX_IBX_EN_VALUE BIT(15)
124 #define B_AX_IB_EN_VALUE BIT(14)
125 #define B_AX_FORCED_IB_EN BIT(4)
126 #define B_AX_EN_REGBG BIT(3)
127 #define B_AX_R_AX_BG_LPF BIT(2)
134 #define B_AX_AXIDMA_EN BIT(3)
135 #define B_AX_APB_WRAP_EN BIT(2)
136 #define B_AX_WCPU_EN BIT(1)
137 #define B_AX_PLATFORM_EN BIT(0)
140 #define B_AX_LPSOP_ASWRM BIT(17)
141 #define B_AX_LPSOP_DSWRM BIT(9)
142 #define B_AX_DIS_WLBT_LPSEN_LOPC BIT(1)
146 #define B_AX_TOGGLE BIT(31)
149 #define B_MAC_AX_BTGS1_NOTIFY BIT(0)
157 #define B_AX_SYSON_DIS_PMCR_AX_WRMSK BIT(2)
161 #define B_AX_PCIE_MIO_BYIOREG BIT(13)
162 #define B_AX_PCIE_MIO_RE BIT(12)
176 #define B_AX_PAD_HCI_SEL_V2_MASK GENMASK(5, 3)
185 #define B_AX_HALT_H2C_TRIGGER BIT(0)
190 #define B_AX_WCPU_FWDL_STS_MASK GENMASK(7, 5)
191 #define B_AX_FWDL_PATH_RDY BIT(2)
192 #define B_AX_H2C_PATH_RDY BIT(1)
193 #define B_AX_WCPU_FWDL_EN BIT(0)
197 #define PS_RPWM_TOGGLE BIT(15)
198 #define PS_RPWM_ACK BIT(14)
200 #define PS_RPWM_NOTIFY_WAKE BIT(8)
212 #define B_AX_EN_32K BIT(31)
231 #define B_AX_FPWMDELAY BIT(3)
234 #define B_AX_PD_REGU_L BIT(16)
242 #define B_AX_WL_XTAL_SI_CMD_POLL BIT(31)
243 #define B_AX_BT_XTAL_SI_ERR_FLAG BIT(30)
244 #define B_AX_WL_XTAL_GNT BIT(29)
245 #define B_AX_BT_XTAL_GNT BIT(28)
254 #define B_AX_XTAL_SI_ADDR_NOT_CHK BIT(0)
257 #define B_AX_XTAL_SC_LPS BIT(31)
282 #define B_AX_LED1_PULL_LOW_EN BIT(18)
283 #define B_AX_EESK_PULL_LOW_EN BIT(17)
284 #define B_AX_EECS_PULL_LOW_EN BIT(16)
287 #define B_AX_GPIO16_PULL_LOW_EN_V1 BIT(19)
288 #define B_AX_GPIO10_PULL_LOW_EN BIT(10)
291 #define B_AX_AFC_AFEDIG BIT(17)
292 #define B_AX_WLRF1_CTRL_7 BIT(15)
293 #define B_AX_WLRF1_CTRL_1 BIT(9)
294 #define B_AX_WLRF_CTRL_7 BIT(7)
295 #define B_AX_WLRF_CTRL_1 BIT(1)
301 #define B_AX_SDIO_HCISYS_PWR_STE_MASK GENMASK(5, 4)
306 #define B_AX_C3_L1_MASK GENMASK(5, 4)
311 #define B_AX_S1_LDO2PWRCUT_F BIT(23)
315 #define B_AX_DBG_WOW_CPU_IO_RX_EN BIT(8)
330 #define B_AX_STOP_AXI_MST BIT(17)
331 #define B_AX_HAXI_RST_KEEP_REG BIT(16)
332 #define B_AX_RXHCI_EN_V1 BIT(15)
333 #define B_AX_RXBD_MODE_V1 BIT(14)
335 #define B_AX_TXHCI_EN_V1 BIT(7)
336 #define B_AX_FLUSH_AXI_MST BIT(4)
337 #define B_AX_RST_BDRAM BIT(3)
341 #define B_AX_STOP_WPDMA BIT(19)
342 #define B_AX_STOP_CH12 BIT(18)
343 #define B_AX_STOP_CH9 BIT(17)
344 #define B_AX_STOP_CH8 BIT(16)
345 #define B_AX_STOP_ACH7 BIT(15)
346 #define B_AX_STOP_ACH6 BIT(14)
347 #define B_AX_STOP_ACH5 BIT(13)
348 #define B_AX_STOP_ACH4 BIT(12)
349 #define B_AX_STOP_ACH3 BIT(11)
350 #define B_AX_STOP_ACH2 BIT(10)
351 #define B_AX_STOP_ACH1 BIT(9)
352 #define B_AX_STOP_ACH0 BIT(8)
355 #define B_AX_HAXIIO_BUSY BIT(20)
356 #define B_AX_WPDMA_BUSY BIT(19)
357 #define B_AX_CH12_BUSY BIT(18)
358 #define B_AX_CH9_BUSY BIT(17)
359 #define B_AX_CH8_BUSY BIT(16)
360 #define B_AX_ACH7_BUSY BIT(15)
361 #define B_AX_ACH6_BUSY BIT(14)
362 #define B_AX_ACH5_BUSY BIT(13)
363 #define B_AX_ACH4_BUSY BIT(12)
364 #define B_AX_ACH3_BUSY BIT(11)
365 #define B_AX_ACH2_BUSY BIT(10)
366 #define B_AX_ACH1_BUSY BIT(9)
367 #define B_AX_ACH0_BUSY BIT(8)
372 #define B_AX_MRD_TIMEOUT_EN BIT(10)
373 #define B_AX_ASFF_FULL_NO_STK BIT(1)
374 #define B_AX_EN_STUCK_DBG BIT(0)
377 #define B_AX_STOP_CH11 BIT(1)
378 #define B_AX_STOP_CH10 BIT(0)
381 #define B_AX_CH11_BUSY BIT(1)
382 #define B_AX_CH10_BUSY BIT(0)
385 #define B_AX_RPQ_BUSY BIT(1)
386 #define B_AX_RXQ_BUSY BIT(0)
389 #define B_AX_LTR_IDX_DRV_VLD BIT(16)
391 #define B_AX_LTR_IDX_FW_VLD BIT(13)
393 #define B_AX_LTR_IDX_HW_VLD BIT(10)
395 #define B_AX_LTR_REQ_DRV BIT(7)
396 #define B_AX_LTR_IDX_DRV_MASK GENMASK(6, 5)
398 #define B_AX_LTR_DRV_DEC_EN BIT(4)
399 #define B_AX_LTR_FW_DEC_EN BIT(3)
400 #define B_AX_LTR_HW_DEC_EN BIT(2)
466 #define B_AX_WDT_PTFM_INT_EN BIT(5)
467 #define B_AX_CPWM_INT_EN BIT(2)
468 #define B_AX_GT3_INT_EN BIT(1)
469 #define B_AX_C2H_INT_EN BIT(0)
471 #define B_AX_C2H_INT BIT(0)
482 #define B_AX_H2CREG_TRIGGER BIT(0)
484 #define B_AX_C2HREG_TRIGGER BIT(0)
488 #define B_AX_HCI_RXDMA_EN BIT(1)
489 #define B_AX_HCI_TXDMA_EN BIT(0)
494 #define B_AX_DMAC_CRPRT BIT(31)
495 #define B_AX_MAC_FUNC_EN BIT(30)
496 #define B_AX_DMAC_FUNC_EN BIT(29)
497 #define B_AX_MPDU_PROC_EN BIT(28)
498 #define B_AX_WD_RLS_EN BIT(27)
499 #define B_AX_DLE_WDE_EN BIT(26)
500 #define B_AX_TXPKT_CTRL_EN BIT(25)
501 #define B_AX_STA_SCH_EN BIT(24)
502 #define B_AX_DLE_PLE_EN BIT(23)
503 #define B_AX_PKT_BUF_EN BIT(22)
504 #define B_AX_DMAC_TBL_EN BIT(21)
505 #define B_AX_PKT_IN_EN BIT(20)
506 #define B_AX_DLE_CPUIO_EN BIT(19)
507 #define B_AX_DISPATCHER_EN BIT(18)
508 #define B_AX_BBRPT_EN BIT(17)
509 #define B_AX_MAC_SEC_EN BIT(16)
510 #define B_AX_DMACREG_GCKEN BIT(15)
511 #define B_AX_MAC_UN_EN BIT(15)
512 #define B_AX_H_AXIDMA_EN BIT(14)
515 #define B_AX_WD_RLS_CLK_EN BIT(27)
516 #define B_AX_DLE_WDE_CLK_EN BIT(26)
517 #define B_AX_TXPKT_CTRL_CLK_EN BIT(25)
518 #define B_AX_STA_SCH_CLK_EN BIT(24)
519 #define B_AX_DLE_PLE_CLK_EN BIT(23)
520 #define B_AX_PKT_IN_CLK_EN BIT(20)
521 #define B_AX_DLE_CPUIO_CLK_EN BIT(19)
522 #define B_AX_DISPATCHER_CLK_EN BIT(18)
523 #define B_AX_BBRPT_CLK_EN BIT(17)
524 #define B_AX_MAC_SEC_CLK_EN BIT(16)
525 #define B_AX_AXIDMA_CLK_EN BIT(9)
532 #define PCI_LTR_IDLE_TIMER_800US 5
550 #define B_AX_LTR_WD_NOEMP_CHK BIT(6)
551 #define B_AX_APP_LTR_ACT BIT(5)
552 #define B_AX_APP_LTR_IDLE BIT(4)
553 #define B_AX_LTR_EN BIT(1)
554 #define B_AX_LTR_WD_NOEMP_CHK_V1 BIT(1)
555 #define B_AX_LTR_HW_EN BIT(0)
569 #define B_AX_PLE_EMPTY_QTA_DMAC_CPUIO BIT(26)
570 #define B_AX_PLE_EMPTY_QTA_DMAC_MPDU_TX BIT(25)
571 #define B_AX_PLE_EMPTY_QTA_DMAC_WLAN_CPU BIT(24)
572 #define B_AX_PLE_EMPTY_QTA_DMAC_H2C BIT(23)
573 #define B_AX_PLE_EMPTY_QTA_DMAC_B1_TXPL BIT(22)
574 #define B_AX_PLE_EMPTY_QTA_DMAC_B0_TXPL BIT(21)
575 #define B_AX_WDE_EMPTY_QTA_DMAC_CPUIO BIT(20)
576 #define B_AX_WDE_EMPTY_QTA_DMAC_PKTIN BIT(19)
577 #define B_AX_WDE_EMPTY_QTA_DMAC_DATA_CPU BIT(18)
578 #define B_AX_WDE_EMPTY_QTA_DMAC_WLAN_CPU BIT(17)
579 #define B_AX_WDE_EMPTY_QTA_DMAC_HIF BIT(16)
580 #define B_AX_WDE_EMPTY_QUE_DMAC_PKTIN BIT(10)
581 #define B_AX_PLE_EMPTY_QUE_DMAC_SEC_TX BIT(9)
582 #define B_AX_PLE_EMPTY_QUE_DMAC_MPDU_TX BIT(8)
583 #define B_AX_WDE_EMPTY_QUE_OTHERS BIT(7)
584 #define B_AX_WDE_EMPTY_QUE_CMAC0_WMM1 BIT(4)
585 #define B_AX_WDE_EMPTY_QUE_CMAC0_WMM0 BIT(3)
586 #define B_AX_WDE_EMPTY_QUE_CMAC1_MBH BIT(2)
587 #define B_AX_WDE_EMPTY_QUE_CMAC0_MBH BIT(1)
588 #define B_AX_WDE_EMPTY_QUE_CMAC0_ALL_AC BIT(0)
591 #define B_AX_PLE_EMPTY_QTA_DMAC_WDRLS BIT(20)
592 #define B_AX_PLE_EMPTY_QTA_CMAC1_DMA_BBRPT BIT(19)
593 #define B_AX_PLE_EMPTY_QTA_CMAC1_DMA_RX BIT(18)
594 #define B_AX_PLE_EMPTY_QTA_CMAC0_DMA_RX BIT(17)
595 #define B_AX_PLE_EMPTY_QTA_DMAC_C2H BIT(16)
596 #define B_AX_PLE_EMPTY_QUE_DMAC_PLRLS BIT(5)
597 #define B_AX_PLE_EMPTY_QUE_DMAC_CPUIO BIT(4)
598 #define B_AX_PLE_EMPTY_QUE_DMAC_SEC_RX BIT(3)
599 #define B_AX_PLE_EMPTY_QUE_DMAC_MPDU_RX BIT(2)
600 #define B_AX_PLE_EMPTY_QUE_DMAC_HDP BIT(1)
601 #define B_AX_WDE_EMPTY_QUE_DMAC_WDRLS BIT(0)
604 #define B_AX_DLE_CPUIO_ERR_INT_EN BIT(10)
605 #define B_AX_APB_BRIDGE_ERR_INT_EN BIT(9)
606 #define B_AX_DISPATCH_ERR_INT_EN BIT(8)
607 #define B_AX_PKTIN_ERR_INT_EN BIT(7)
608 #define B_AX_PLE_DLE_ERR_INT_EN BIT(6)
609 #define B_AX_TXPKTCTRL_ERR_INT_EN BIT(5)
610 #define B_AX_WDE_DLE_ERR_INT_EN BIT(4)
611 #define B_AX_STA_SCHEDULER_ERR_INT_EN BIT(3)
612 #define B_AX_MPDU_ERR_INT_EN BIT(2)
613 #define B_AX_WSEC_ERR_INT_EN BIT(1)
614 #define B_AX_WDRLS_ERR_INT_EN BIT(0)
619 #define B_AX_HAXIDMA_ERR_FLAG BIT(14)
620 #define B_AX_PAXIDMA_ERR_FLAG BIT(13)
621 #define B_AX_HCI_BUF_ERR_FLAG BIT(12)
622 #define B_AX_BBRPT_ERR_FLAG BIT(11)
623 #define B_AX_DLE_CPUIO_ERR_FLAG BIT(10)
624 #define B_AX_APB_BRIDGE_ERR_FLAG BIT(9)
625 #define B_AX_DISPATCH_ERR_FLAG BIT(8)
626 #define B_AX_PKTIN_ERR_FLAG BIT(7)
627 #define B_AX_PLE_DLE_ERR_FLAG BIT(6)
628 #define B_AX_TXPKTCTRL_ERR_FLAG BIT(5)
629 #define B_AX_WDE_DLE_ERR_FLAG BIT(4)
630 #define B_AX_STA_SCHEDULER_ERR_FLAG BIT(3)
631 #define B_AX_MPDU_ERR_FLAG BIT(2)
632 #define B_AX_WSEC_ERR_FLAG BIT(1)
633 #define B_AX_WDRLS_ERR_FLAG BIT(0)
636 #define B_AX_PL_PAGE_128B_SEL BIT(9)
637 #define B_AX_WD_PAGE_64B_SEL BIT(8)
642 #define B_AX_HOST_ADDR_INFO_8B_SEL BIT(0)
645 #define B_AX_HDT_RX_WRITE_UNDERFLOW_INT_EN BIT(31)
646 #define B_AX_HDT_RX_WRITE_OVERFLOW_INT_EN BIT(30)
647 #define B_AX_HDT_CHKSUM_FSM_ERR_INT_EN BIT(29)
648 #define B_AX_HDT_SHIFT_DMA_CFG_ERR_INT_EN BIT(28)
649 #define B_AX_HDT_DMA_PROCESS_ERR_INT_EN BIT(27)
650 #define B_AX_HDT_TOTAL_LEN_ERR_INT_EN BIT(26)
651 #define B_AX_HDT_SHIFT_EN_ERR_INT_EN BIT(25)
652 #define B_AX_HDT_RXAGG_CFG_ERR_INT_EN BIT(24)
653 #define B_AX_HDT_OUTPUT_ERR_INT_EN BIT(21)
654 #define B_AX_HDT_RES_ERR_INT_EN BIT(20)
655 #define B_AX_HDT_BURST_NUM_ERR_INT_EN BIT(19)
656 #define B_AX_HDT_NULLPKT_ERR_INT_EN BIT(18)
657 #define B_AX_HDT_FLOW_CTRL_ERR_INT_EN BIT(17)
658 #define B_AX_HDT_PLD_CMD_UNDERFLOW_INT_EN BIT(16)
659 #define B_AX_HDT_PLD_CMD_OVERLOW_INT_EN BIT(15)
660 #define B_AX_HDT_TX_WRITE_UNDERFLOW_INT_EN BIT(14)
661 #define B_AX_HDT_TX_WRITE_OVERFLOW_INT_EN BIT(13)
662 #define B_AX_HDT_TCP_CHK_ERR_INT_EN BIT(12)
663 #define B_AX_HDT_TXPKTSIZE_ERR_INT_EN BIT(11)
664 #define B_AX_HDT_PRE_COST_ERR_INT_EN BIT(10)
665 #define B_AX_HDT_WD_CHK_ERR_INT_EN BIT(9)
666 #define B_AX_HDT_CHANNEL_DMA_ERR_INT_EN BIT(8)
667 #define B_AX_HDT_OFFSET_UNMATCH_INT_EN BIT(7)
668 #define B_AX_HDT_PAYLOAD_UNDERFLOW_INT_EN BIT(6)
669 #define B_AX_HDT_PAYLOAD_OVERFLOW_INT_EN BIT(5)
670 #define B_AX_HDT_PERMU_UNDERFLOW_INT_EN BIT(4)
671 #define B_AX_HDT_PERMU_OVERFLOW_INT_EN BIT(3)
672 #define B_AX_HDT_PKT_FAIL_DBG_INT_EN BIT(2)
673 #define B_AX_HDT_CHANNEL_ID_ERR_INT_EN BIT(1)
674 #define B_AX_HDT_CHANNEL_DIFF_ERR_INT_EN BIT(0)
710 #define B_AX_HR_WRFF_UNDERFLOW_ERR_INT_EN BIT(31)
711 #define B_AX_HR_WRFF_OVERFLOW_ERR_INT_EN BIT(30)
712 #define B_AX_HR_CHKSUM_FSM_ERR_INT_EN BIT(29)
713 #define B_AX_HR_SHIFT_DMA_CFG_ERR_INT_EN BIT(28)
714 #define B_AX_HR_DMA_PROCESS_ERR_INT_EN BIT(27)
715 #define B_AX_HR_TOTAL_LEN_UNDER_ERR_INT_EN BIT(26)
716 #define B_AX_HR_SHIFT_EN_ERR_INT_EN BIT(25)
717 #define B_AX_HR_AGG_CFG_ERR_INT_EN BIT(24)
718 #define B_AX_HR_DMA_RD_CNT_DEQ_ERR_INT_EN BIT(23)
719 #define B_AX_HR_PLD_LEN_ZERO_ERR_INT_EN BIT(22)
720 #define B_AX_HT_ILL_CH_ERR_INT_EN BIT(20)
721 #define B_AX_HT_ADDR_INFO_LEN_ERR_INT_EN BIT(18)
722 #define B_AX_HT_WD_LEN_OVER_ERR_INT_EN BIT(17)
723 #define B_AX_HT_PLD_CMD_UNDERFLOW_ERR_INT_EN BIT(16)
724 #define B_AX_HT_PLD_CMD_OVERFLOW_ERR_INT_EN BIT(15)
725 #define B_AX_HT_WRFF_UNDERFLOW_ERR_INT_EN BIT(14)
726 #define B_AX_HT_WRFF_OVERFLOW_ERR_INT_EN BIT(13)
727 #define B_AX_HT_CHKSUM_FSM_ERR_INT_EN BIT(12)
728 #define B_AX_HT_TXPKTSIZE_ERR_INT_EN BIT(11)
729 #define B_AX_HT_PRE_SUB_ERR_INT_EN BIT(10)
730 #define B_AX_HT_WD_CHKSUM_ERR_INT_EN BIT(9)
731 #define B_AX_HT_CHANNEL_DMA_ERR_INT_EN BIT(8)
732 #define B_AX_HT_OFFSET_UNMATCH_ERR_INT_EN BIT(7)
733 #define B_AX_HT_PAYLOAD_UNDER_ERR_INT_EN BIT(6)
734 #define B_AX_HT_PAYLOAD_OVER_ERR_INT_EN BIT(5)
735 #define B_AX_HT_PERMU_FF_UNDERFLOW_ERR_INT_EN BIT(4)
736 #define B_AX_HT_PERMU_FF_OVERFLOW_ERR_INT_EN BIT(3)
737 #define B_AX_HT_PKT_FAIL_ERR_INT_EN BIT(2)
738 #define B_AX_HT_CH_ID_ERR_INT_EN BIT(1)
739 #define B_AX_HT_EP_CH_DIFF_ERR_INT_EN BIT(0)
777 #define B_AX_CPU_RX_WRITE_UNDERFLOW_INT_EN BIT(31)
778 #define B_AX_CPU_RX_WRITE_OVERFLOW_INT_EN BIT(30)
779 #define B_AX_CPU_CHKSUM_FSM_ERR_INT_EN BIT(29)
780 #define B_AX_CPU_SHIFT_DMA_CFG_ERR_INT_EN BIT(28)
781 #define B_AX_CPU_DMA_PROCESS_ERR_INT_EN BIT(27)
782 #define B_AX_CPU_TOTAL_LEN_ERR_INT_EN BIT(26)
783 #define B_AX_CPU_SHIFT_EN_ERR_INT_EN BIT(25)
784 #define B_AX_CPU_RXAGG_CFG_ERR_INT_EN BIT(24)
785 #define B_AX_CPU_OUTPUT_ERR_INT_EN BIT(20)
786 #define B_AX_CPU_RESP_ERR_INT_EN BIT(19)
787 #define B_AX_CPU_BURST_NUM_ERR_INT_EN BIT(18)
788 #define B_AX_CPU_NULLPKT_ERR_INT_EN BIT(17)
789 #define B_AX_CPU_FLOW_CTRL_ERR_INT_EN BIT(16)
790 #define B_AX_CPU_F2P_SEQ_ERR_INT_EN BIT(15)
791 #define B_AX_CPU_F2P_QSEL_ERR_INT_EN BIT(14)
792 #define B_AX_CPU_PLD_CMD_UNDERFLOW_INT_EN BIT(13)
793 #define B_AX_CPU_PLD_CMD_OVERLOW_INT_EN BIT(12)
794 #define B_AX_CPU_PRE_COST_ERR_INT_EN BIT(11)
795 #define B_AX_CPU_WD_CHK_ERR_INT_EN BIT(10)
796 #define B_AX_CPU_CHANNEL_DMA_ERR_INT_EN BIT(9)
797 #define B_AX_CPU_OFFSET_UNMATCH_INT_EN BIT(8)
798 #define B_AX_CPU_PAYLOAD_CHKSUM_ERR_INT_EN BIT(7)
799 #define B_AX_CPU_PAYLOAD_UNDERFLOW_INT_EN BIT(6)
800 #define B_AX_CPU_PAYLOAD_OVERFLOW_INT_EN BIT(5)
801 #define B_AX_CPU_PERMU_UNDERFLOW_INT_EN BIT(4)
802 #define B_AX_CPU_PERMU_OVERFLOW_INT_EN BIT(3)
803 #define B_AX_CPU_CHANNEL_ID_ERR_INT_EN BIT(2)
804 #define B_AX_CPU_PKT_FAIL_DBG_INT_EN BIT(1)
805 #define B_AX_CPU_CHANNEL_DIFF_ERR_INT_EN BIT(0)
838 #define B_AX_CR_PLD_LEN_ERR_INT_EN BIT(30)
839 #define B_AX_CR_WRFF_UNDERFLOW_ERR_INT_EN BIT(29)
840 #define B_AX_CR_WRFF_OVERFLOW_ERR_INT_EN BIT(28)
841 #define B_AX_CR_SHIFT_DMA_CFG_ERR_INT_EN BIT(27)
842 #define B_AX_CR_DMA_PROCESS_ERR_INT_EN BIT(26)
843 #define B_AX_CR_TOTAL_LEN_UNDER_ERR_INT_EN BIT(25)
844 #define B_AX_CR_SHIFT_EN_ERR_INT_EN BIT(24)
845 #define B_AX_REUSE_FIFO_B_UNDER_ERR_INT_EN BIT(22)
846 #define B_AX_REUSE_FIFO_B_OVER_ERR_INT_EN BIT(21)
847 #define B_AX_REUSE_FIFO_A_UNDER_ERR_INT_EN BIT(20)
848 #define B_AX_REUSE_FIFO_A_OVER_ERR_INT_EN BIT(19)
849 #define B_AX_CT_ADDR_INFO_LEN_MISS_ERR_INT_EN BIT(17)
850 #define B_AX_CT_WD_LEN_OVER_ERR_INT_EN BIT(16)
851 #define B_AX_CT_F2P_SEQ_ERR_INT_EN BIT(15)
852 #define B_AX_CT_F2P_QSEL_ERR_INT_EN BIT(14)
853 #define B_AX_CT_PLD_CMD_UNDERFLOW_ERR_INT_EN BIT(13)
854 #define B_AX_CT_PLD_CMD_OVERFLOW_ERR_INT_EN BIT(12)
855 #define B_AX_CT_PRE_SUB_ERR_INT_EN BIT(11)
856 #define B_AX_CT_WD_CHKSUM_ERR_INT_EN BIT(10)
857 #define B_AX_CT_CHANNEL_DMA_ERR_INT_EN BIT(9)
858 #define B_AX_CT_OFFSET_UNMATCH_ERR_INT_EN BIT(8)
859 #define B_AX_CT_PAYLOAD_CHKSUM_ERR_INT_EN BIT(7)
860 #define B_AX_CT_PAYLOAD_UNDER_ERR_INT_EN BIT(6)
861 #define B_AX_CT_PAYLOAD_OVER_ERR_INT_EN BIT(5)
862 #define B_AX_CT_PERMU_FF_UNDERFLOW_ERR_INT_EN BIT(4)
863 #define B_AX_CT_PERMU_FF_OVERFLOW_ERR_INT_EN BIT(3)
864 #define B_AX_CT_CH_ID_ERR_INT_EN BIT(2)
865 #define B_AX_CT_EP_CH_DIFF_ERR_INT_EN BIT(0)
902 #define B_AX_OTHER_STF_WROQT_UNDERFLOW_INT_EN BIT(29)
903 #define B_AX_OTHER_STF_WROQT_OVERFLOW_INT_EN BIT(28)
904 #define B_AX_OTHER_STF_WRFF_UNDERFLOW_INT_EN BIT(27)
905 #define B_AX_OTHER_STF_WRFF_OVERFLOW_INT_EN BIT(26)
906 #define B_AX_OTHER_STF_CMD_UNDERFLOW_INT_EN BIT(25)
907 #define B_AX_OTHER_STF_CMD_OVERFLOW_INT_EN BIT(24)
908 #define B_AX_HOST_ADDR_INFO_LEN_ZERO_ERR_INT_EN BIT(17)
909 #define B_AX_CPU_ADDR_INFO_LEN_ZERO_ERR_INT_EN BIT(16)
910 #define B_AX_PLE_OUTPUT_ERR_INT_EN BIT(12)
911 #define B_AX_PLE_RESP_ERR_INT_EN BIT(11)
912 #define B_AX_PLE_BURST_NUM_ERR_INT_EN BIT(10)
913 #define B_AX_PLE_NULL_PKT_ERR_INT_EN BIT(9)
914 #define B_AX_PLE_FLOW_CTRL_ERR_INT_EN BIT(8)
915 #define B_AX_WDE_OUTPUT_ERR_INT_EN BIT(4)
916 #define B_AX_WDE_RESP_ERR_INT_EN BIT(3)
917 #define B_AX_WDE_BURST_NUM_ERR_INT_EN BIT(2)
918 #define B_AX_WDE_NULL_PKT_ERR_INT_EN BIT(1)
919 #define B_AX_WDE_FLOW_CTRL_ERR_INT_EN BIT(0)
939 #define B_AX_REUSE_SIZE_ERR_INT_EN BIT(31)
940 #define B_AX_REUSE_EN_ERR_INT_EN BIT(30)
941 #define B_AX_STF_OQT_UNDERFLOW_ERR_INT_EN BIT(29)
942 #define B_AX_STF_OQT_OVERFLOW_ERR_INT_EN BIT(28)
943 #define B_AX_STF_WRFF_UNDERFLOW_ERR_INT_EN BIT(27)
944 #define B_AX_STF_WRFF_OVERFLOW_ERR_INT_EN BIT(26)
945 #define B_AX_STF_CMD_UNDERFLOW_ERR_INT_EN BIT(25)
946 #define B_AX_STF_CMD_OVERFLOW_ERR_INT_EN BIT(24)
947 #define B_AX_REUSE_SIZE_ZERO_ERR_INT_EN BIT(23)
948 #define B_AX_REUSE_PKT_CNT_ERR_INT_EN BIT(22)
949 #define B_AX_CDT_PTR_TIMEOUT_ERR_INT_EN BIT(21)
950 #define B_AX_CDT_HCI_TIMEOUT_ERR_INT_EN BIT(20)
951 #define B_AX_HDT_PTR_TIMEOUT_ERR_INT_EN BIT(19)
952 #define B_AX_HDT_HCI_TIMEOUT_ERR_INT_EN BIT(18)
953 #define B_AX_CDT_ADDR_INFO_LEN_ERR_INT_EN BIT(17)
954 #define B_AX_HDT_ADDR_INFO_LEN_ERR_INT_EN BIT(16)
955 #define B_AX_CDR_DMA_TIMEOUT_ERR_INT_EN BIT(15)
956 #define B_AX_CDR_RX_TIMEOUT_ERR_INT_EN BIT(14)
957 #define B_AX_PLE_RESPOSE_ERR_INT_EN BIT(11)
958 #define B_AX_HDR_DMA_TIMEOUT_ERR_INT_EN BIT(7)
959 #define B_AX_HDR_RX_TIMEOUT_ERR_INT_EN BIT(6)
960 #define B_AX_WDE_RESPONSE_ERR_INT_EN BIT(3)
1007 #define B_AX_HDR_RX_STOP BIT(0)
1013 #define B_AX_HCI_FC_WD_FULL_COND_MASK GENMASK(5, 4)
1014 #define B_AX_HCI_FC_CH12_EN BIT(3)
1016 #define B_AX_HCI_FC_EN BIT(0)
1024 #define B_AX_GRP BIT(31)
1091 #define B_AX_WDE_ERR_FLAG_NUM1_VLD BIT(31)
1094 #define B_AX_WDE_DATCHN_FRZTMR_MODE BIT(2)
1095 #define B_AX_WDE_QUEMGN_FRZTMR_MODE BIT(1)
1096 #define B_AX_WDE_BUFMGN_FRZTMR_MODE BIT(0)
1099 #define B_AX_WDE_DATCHN_RRDY_ERR_INT_EN BIT(27)
1100 #define B_AX_WDE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
1101 #define B_AX_WDE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
1102 #define B_AX_WDE_DATCHN_ARBT_ERR_INT_EN BIT(24)
1103 #define B_AX_WDE_QUEMGN_FRZTO_ERR_INT_EN BIT(19)
1104 #define B_AX_WDE_NXTPKTLL_AD_ERR_INT_EN BIT(18)
1105 #define B_AX_WDE_PREPKTLLT_AD_ERR_INT_EN BIT(17)
1106 #define B_AX_WDE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(16)
1107 #define B_AX_WDE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(15)
1108 #define B_AX_WDE_QUE_SRCQUEID_ERR_INT_EN BIT(14)
1109 #define B_AX_WDE_QUE_DSTQUEID_ERR_INT_EN BIT(13)
1110 #define B_AX_WDE_QUE_CMDTYPE_ERR_INT_EN BIT(12)
1111 #define B_AX_WDE_BUFMGN_FRZTO_ERR_INT_EN BIT(7)
1112 #define B_AX_WDE_GETNPG_PGOFST_ERR_INT_EN BIT(6)
1113 #define B_AX_WDE_GETNPG_STRPG_ERR_INT_EN BIT(5)
1114 #define B_AX_WDE_BUFREQ_SRCHTAILPG_ERR_INT_EN BIT(4)
1115 #define B_AX_WDE_BUFRTN_SIZE_ERR_INT_EN BIT(3)
1116 #define B_AX_WDE_BUFRTN_INVLD_PKTID_ERR_INT_EN BIT(2)
1117 #define B_AX_WDE_BUFREQ_UNAVAL_ERR_INT_EN BIT(1)
1118 #define B_AX_WDE_BUFREQ_QTAID_ERR_INT_EN BIT(0)
1158 #define B_AX_WDE_DATCHN_CAMREQ_ERR_INT_EN BIT(29)
1159 #define B_AX_WDE_DATCHN_ADRERR_ERR_INT_EN BIT(28)
1160 #define B_AX_WDE_DATCHN_RRDY_ERR_INT_EN BIT(27)
1161 #define B_AX_WDE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
1162 #define B_AX_WDE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
1163 #define B_AX_WDE_DATCHN_ARBT_ERR_INT_EN BIT(24)
1164 #define B_AX_WDE_QUEMGN_FRZTO_ERR_INT_EN BIT(19)
1165 #define B_AX_WDE_NXTPKTLL_AD_ERR_INT_EN BIT(18)
1166 #define B_AX_WDE_PREPKTLLT_AD_ERR_INT_EN BIT(17)
1167 #define B_AX_WDE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(16)
1168 #define B_AX_WDE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(15)
1169 #define B_AX_WDE_QUE_SRCQUEID_ERR_INT_EN BIT(14)
1170 #define B_AX_WDE_BUFMGN_FRZTO_ERR_INT_EN_V1 BIT(9)
1171 #define B_AX_WDE_GETNPG_PGOFST_ERR_INT_EN_V1 BIT(8)
1172 #define B_AX_WDE_GETNPG_STRPG_ERR_INT_EN_V1 BIT(7)
1173 #define B_AX_WDE_BUFREQ_SRCHTAILPG_ERR_INT_EN_V1 BIT(6)
1174 #define B_AX_WDE_BUFRTN_SIZE_ERR_INT_EN_V1 BIT(5)
1175 #define B_AX_WDE_BUFRTN_INVLD_PKTID_ERR_INT_EN_V1 BIT(4)
1176 #define B_AX_WDE_BUFREQ_UNAVAL_ERR_INT_EN_V1 BIT(3)
1177 #define B_AX_WDE_BUFREQ_SIZELMT_INT_EN BIT(2)
1178 #define B_AX_WDE_BUFREQ_SIZE0_INT_EN BIT(1)
1229 #define B_AX_WDE_DATCHN_RRDY_ERR BIT(27)
1230 #define B_AX_WDE_DATCHN_FRZTO_ERR BIT(26)
1231 #define B_AX_WDE_DATCHN_NULLPG_ERR BIT(25)
1232 #define B_AX_WDE_DATCHN_ARBT_ERR BIT(24)
1233 #define B_AX_WDE_QUEMGN_FRZTO_ERR BIT(19)
1234 #define B_AX_WDE_NXTPKTLL_AD_ERR BIT(18)
1235 #define B_AX_WDE_PREPKTLLT_AD_ERR BIT(17)
1236 #define B_AX_WDE_ENQ_PKTCNT_NVAL_ERR BIT(16)
1237 #define B_AX_WDE_ENQ_PKTCNT_OVRF_ERR BIT(15)
1238 #define B_AX_WDE_QUE_SRCQUEID_ERR BIT(14)
1239 #define B_AX_WDE_QUE_DSTQUEID_ERR BIT(13)
1240 #define B_AX_WDE_QUE_CMDTYPE_ERR BIT(12)
1241 #define B_AX_WDE_BUFMGN_FRZTO_ERR BIT(7)
1242 #define B_AX_WDE_GETNPG_PGOFST_ERR BIT(6)
1243 #define B_AX_WDE_GETNPG_STRPG_ERR BIT(5)
1244 #define B_AX_WDE_BUFREQ_SRCHTAILPG_ERR BIT(4)
1245 #define B_AX_WDE_BUFRTN_SIZE_ERR BIT(3)
1246 #define B_AX_WDE_BUFRTN_INVLD_PKTID_ERR BIT(2)
1247 #define B_AX_WDE_BUFREQ_UNAVAL_ERR BIT(1)
1248 #define B_AX_WDE_BUFREQ_QTAID_ERR BIT(0)
1266 #define B_AX_WDE_Q_MGN_INI_RDY BIT(1)
1267 #define B_AX_WDE_BUF_MGN_INI_RDY BIT(0)
1270 #define B_AX_WDE_DFI_ACTIVE BIT(31)
1282 #define B_AX_PLE_LOCKEN_DLEPIF07 BIT(7)
1283 #define B_AX_PLE_LOCKEN_DLEPIF06 BIT(6)
1284 #define B_AX_PLE_LOCKEN_DLEPIF05 BIT(5)
1285 #define B_AX_PLE_LOCKEN_DLEPIF04 BIT(4)
1286 #define B_AX_PLE_LOCKEN_DLEPIF03 BIT(3)
1287 #define B_AX_PLE_LOCKEN_DLEPIF02 BIT(2)
1288 #define B_AX_PLE_LOCKEN_DLEPIF01 BIT(1)
1289 #define B_AX_PLE_LOCKEN_DLEPIF00 BIT(0)
1292 #define B_AX_PLE_LOCKON_DLEPIF07 BIT(7)
1293 #define B_AX_PLE_LOCKON_DLEPIF06 BIT(6)
1294 #define B_AX_PLE_LOCKON_DLEPIF05 BIT(5)
1295 #define B_AX_PLE_LOCKON_DLEPIF04 BIT(4)
1296 #define B_AX_PLE_LOCKON_DLEPIF03 BIT(3)
1297 #define B_AX_PLE_LOCKON_DLEPIF02 BIT(2)
1298 #define B_AX_PLE_LOCKON_DLEPIF01 BIT(1)
1299 #define B_AX_PLE_LOCKON_DLEPIF00 BIT(0)
1302 #define B_AX_PLE_ERR_FLAG_NUM1_VLD BIT(31)
1305 #define B_AX_PLE_DATCHN_FRZTMR_MODE BIT(2)
1306 #define B_AX_PLE_QUEMGN_FRZTMR_MODE BIT(1)
1307 #define B_AX_PLE_BUFMGN_FRZTMR_MODE BIT(0)
1311 #define B_AX_PLE_DATCHN_CAMREQ_ERR_INT_EN BIT(29)
1312 #define B_AX_PLE_DATCHN_ADRERR_ERR_INT_EN BIT(28)
1313 #define B_AX_PLE_BUFMGN_FRZTO_ERR_INT_EN_V1 BIT(9)
1314 #define B_AX_PLE_GETNPG_PGOFST_ERR_INT_EN_V1 BIT(8)
1315 #define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN_V1 BIT(7)
1316 #define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN_V1 BIT(6)
1317 #define B_AX_PLE_BUFRTN_SIZE_ERR_INT_EN_V1 BIT(5)
1318 #define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN_V1 BIT(4)
1319 #define B_AX_PLE_BUFREQ_UNAVAL_ERR_INT_EN_V1 BIT(3)
1320 #define B_AX_PLE_BUFREQ_SIZELMT_INT_EN BIT(2)
1321 #define B_AX_PLE_BUFREQ_SIZE0_INT_EN BIT(1)
1322 #define B_AX_PLE_DATCHN_CAMREQ_ERR BIT(29)
1323 #define B_AX_PLE_DATCHN_ADRERR_ERR BIT(28)
1324 #define B_AX_PLE_BUFMGN_FRZTO_ERR_V1 BIT(9)
1325 #define B_AX_PLE_GETNPG_PGOFST_ERR_V1 BIT(8)
1326 #define B_AX_PLE_GETNPG_STRPG_ERR_V1 BIT(7)
1327 #define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_V1 BIT(6)
1328 #define B_AX_PLE_BUFRTN_SIZE_ERR_V1 BIT(5)
1329 #define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_V1 BIT(4)
1330 #define B_AX_PLE_BUFREQ_UNAVAL_ERR_V1 BIT(3)
1331 #define B_AX_PLE_BUFREQ_SIZELMT_ERR BIT(2)
1332 #define B_AX_PLE_BUFREQ_SIZE0_ERR BIT(1)
1335 #define B_AX_PLE_DATCHN_RRDY_ERR_INT_EN BIT(27)
1336 #define B_AX_PLE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
1337 #define B_AX_PLE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
1338 #define B_AX_PLE_DATCHN_ARBT_ERR_INT_EN BIT(24)
1339 #define B_AX_PLE_QUEMGN_FRZTO_ERR_INT_EN BIT(19)
1340 #define B_AX_PLE_NXTPKTLL_AD_ERR_INT_EN BIT(18)
1341 #define B_AX_PLE_PREPKTLLT_AD_ERR_INT_EN BIT(17)
1342 #define B_AX_PLE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(16)
1343 #define B_AX_PLE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(15)
1344 #define B_AX_PLE_QUE_SRCQUEID_ERR_INT_EN BIT(14)
1345 #define B_AX_PLE_QUE_DSTQUEID_ERR_INT_EN BIT(13)
1346 #define B_AX_PLE_QUE_CMDTYPE_ERR_INT_EN BIT(12)
1347 #define B_AX_PLE_BUFMGN_FRZTO_ERR_INT_EN BIT(7)
1348 #define B_AX_PLE_GETNPG_PGOFST_ERR_INT_EN BIT(6)
1349 #define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN BIT(5)
1350 #define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN BIT(4)
1351 #define B_AX_PLE_BUFRTN_SIZE_ERR_INT_EN BIT(3)
1352 #define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN BIT(2)
1353 #define B_AX_PLE_BUFREQ_UNAVAL_ERR_INT_EN BIT(1)
1354 #define B_AX_PLE_BUFREQ_QTAID_ERR_INT_EN BIT(0)
1393 #define B_AX_PLE_DATCHN_CAMREQ_ERR_INT_EN BIT(29)
1394 #define B_AX_PLE_DATCHN_ADRERR_ERR_INT_EN BIT(28)
1395 #define B_AX_PLE_BUFMGN_FRZTO_ERR_INT_EN_V1 BIT(9)
1396 #define B_AX_PLE_GETNPG_PGOFST_ERR_INT_EN_V1 BIT(8)
1397 #define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN_V1 BIT(7)
1398 #define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN_V1 BIT(6)
1399 #define B_AX_PLE_BUFRTN_SIZE_ERR_INT_EN_V1 BIT(5)
1400 #define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN_V1 BIT(4)
1401 #define B_AX_PLE_BUFREQ_UNAVAL_ERR_INT_EN_V1 BIT(3)
1402 #define B_AX_PLE_BUFREQ_SIZELMT_INT_EN BIT(2)
1403 #define B_AX_PLE_BUFREQ_SIZE0_INT_EN BIT(1)
1474 #define B_AX_PLE_Q_MGN_INI_RDY BIT(1)
1475 #define B_AX_PLE_BUF_MGN_INI_RDY BIT(0)
1478 #define B_AX_PLE_DFI_ACTIVE BIT(31)
1492 #define B_AX_RLSRPT0_QID_MASK GENMASK(5, 0)
1499 #define B_AX_WDRLS_RPT1_FRZTO_ERR_INT_EN BIT(13)
1500 #define B_AX_WDRLS_RPT1_AGGNUM0_ERR_INT_EN BIT(12)
1501 #define B_AX_WDRLS_RPT0_FRZTO_ERR_INT_EN BIT(9)
1502 #define B_AX_WDRLS_RPT0_AGGNUM0_ERR_INT_EN BIT(8)
1503 #define B_AX_WDRLS_PLEBREQ_PKTID_ISNULL_ERR_INT_EN BIT(5)
1504 #define B_AX_WDRLS_PLEBREQ_TO_ERR_INT_EN BIT(4)
1505 #define B_AX_WDRLS_CTL_FRZTO_ERR_INT_EN BIT(2)
1506 #define B_AX_WDRLS_CTL_PLPKTID_ISNULL_ERR_INT_EN BIT(1)
1507 #define B_AX_WDRLS_CTL_WDPKTID_ISNULL_ERR_INT_EN BIT(0)
1538 #define B_AX_BBRPT_COM_HANG_EN BIT(1)
1539 #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_EN BIT(0)
1542 #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR BIT(16)
1543 #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_EN BIT(0)
1546 #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_V1 BIT(0)
1549 #define B_AX_BBPRT_CHIF_TO_ERR_V1 BIT(7)
1550 #define B_AX_BBPRT_CHIF_NULL_ERR_V1 BIT(6)
1551 #define B_AX_BBPRT_CHIF_LEFT2_ERR_V1 BIT(5)
1552 #define B_AX_BBPRT_CHIF_LEFT1_ERR_V1 BIT(4)
1553 #define B_AX_BBPRT_CHIF_HDRL_ERR_V1 BIT(3)
1554 #define B_AX_BBPRT_CHIF_BOVF_ERR_V1 BIT(2)
1555 #define B_AX_BBPRT_CHIF_OVF_ERR_V1 BIT(1)
1556 #define B_AX_BBPRT_CHIF_BB_TO_ERR_V1 BIT(0)
1559 #define B_AX_BBPRT_CHIF_TO_ERR_INT_EN BIT(7)
1560 #define B_AX_BBPRT_CHIF_NULL_ERR_INT_EN BIT(6)
1561 #define B_AX_BBPRT_CHIF_LEFT2_ERR_INT_EN BIT(5)
1562 #define B_AX_BBPRT_CHIF_LEFT1_ERR_INT_EN BIT(4)
1563 #define B_AX_BBPRT_CHIF_HDRL_ERR_INT_EN BIT(3)
1564 #define B_AX_BBPRT_CHIF_BOVF_ERR_INT_EN BIT(2)
1565 #define B_AX_BBPRT_CHIF_OVF_ERR_INT_EN BIT(1)
1566 #define B_AX_BBPRT_CHIF_BB_TO_ERR_INT_EN BIT(0)
1577 #define B_AX_BBPRT_CHIF_TO_ERR BIT(23)
1578 #define B_AX_BBPRT_CHIF_NULL_ERR BIT(22)
1579 #define B_AX_BBPRT_CHIF_LEFT2_ERR BIT(21)
1580 #define B_AX_BBPRT_CHIF_LEFT1_ERR BIT(20)
1581 #define B_AX_BBPRT_CHIF_HDRL_ERR BIT(19)
1582 #define B_AX_BBPRT_CHIF_BOVF_ERR BIT(18)
1583 #define B_AX_BBPRT_CHIF_OVF_ERR BIT(17)
1584 #define B_AX_BBPRT_CHIF_BB_TO_ERR BIT(16)
1585 #define B_AX_BBPRT_CHIF_TO_ERR_INT_EN BIT(7)
1586 #define B_AX_BBPRT_CHIF_NULL_ERR_INT_EN BIT(6)
1587 #define B_AX_BBPRT_CHIF_LEFT2_ERR_INT_EN BIT(5)
1588 #define B_AX_BBPRT_CHIF_LEFT1_ERR_INT_EN BIT(4)
1589 #define B_AX_BBPRT_CHIF_HDRL_ERR_INT_EN BIT(3)
1590 #define B_AX_BBPRT_CHIF_BOVF_ERR_INT_EN BIT(2)
1591 #define B_AX_BBPRT_CHIF_OVF_ERR_INT_EN BIT(1)
1592 #define B_AX_BBPRT_CHIF_BB_TO_ERR_INT_EN BIT(0)
1603 #define B_AX_BBRPT_DFS_TO_ERR_INT_EN BIT(0)
1606 #define B_AX_BBRPT_DFS_TO_ERR BIT(16)
1607 #define B_AX_BBRPT_DFS_TO_ERR_INT_EN BIT(0)
1610 #define B_AX_BBRPT_DFS_TO_ERR_V1 BIT(0)
1613 #define B_AX_LA_ISR_DATA_LOSS_ERR BIT(16)
1614 #define B_AX_LA_IMR_DATA_LOSS_ERR BIT(0)
1618 #define B_AX_WD_BUF_REQ_EXEC BIT(31)
1624 #define B_AX_WD_BUF_STAT_DONE BIT(31)
1630 #define B_AX_WD_CPUQ_OP_EXEC BIT(31)
1640 #define B_AX_CPUQ_OP_DST_QID_MASK GENMASK(5, 0)
1649 #define B_AX_WD_CPUQ_OP_STAT_DONE BIT(31)
1653 #define B_AX_PLEQUE_OP_ERR_INT_EN BIT(12)
1654 #define B_AX_PLEBUF_OP_ERR_INT_EN BIT(8)
1655 #define B_AX_WDEQUE_OP_ERR_INT_EN BIT(4)
1656 #define B_AX_WDEBUF_OP_ERR_INT_EN BIT(0)
1671 #define B_AX_WD_ADDR_INFO_LENGTH BIT(1)
1674 #define B_AX_PKTIN_GETPKTID_ERR_INT_EN BIT(0)
1680 #define B_AX_TX_KSRCH_ERR_EN BIT(9)
1681 #define B_AX_TX_NW_TYPE_ERR_EN BIT(8)
1682 #define B_AX_TX_LLC_PRE_ERR_EN BIT(7)
1683 #define B_AX_TX_ETH_TYPE_ERR_EN BIT(6)
1684 #define B_AX_TX_HDR3_SIZE_ERR_INT_EN BIT(5)
1685 #define B_AX_TX_OFFSET_ERR_INT_EN BIT(4)
1686 #define B_AX_TX_MPDU_SIZE_ZERO_INT_EN BIT(3)
1687 #define B_AX_TX_NXT_ERRPKTID_INT_EN BIT(2)
1688 #define B_AX_TX_GET_ERRPKTID_INT_EN BIT(1)
1698 #define B_AX_A_ICV_ERR BIT(1)
1699 #define B_AX_APPEND_FCS BIT(0)
1718 #define B_AX_WOW_WOWEN BIT(1)
1722 #define B_AX_RPT_ERR_INT_EN BIT(3)
1723 #define B_AX_MHDRLEN_ERR_INT_EN BIT(1)
1724 #define B_AX_GETPKTID_ERR_INT_EN BIT(0)
1729 #define B_AX_TX_PARTIAL_MODE BIT(11)
1730 #define B_AX_CLK_EN_CGCMP BIT(10)
1731 #define B_AX_CLK_EN_WAPI BIT(9)
1732 #define B_AX_CLK_EN_WEP_TKIP BIT(8)
1733 #define B_AX_BMC_MGNT_DEC BIT(5)
1734 #define B_AX_UC_MGNT_DEC BIT(4)
1735 #define B_AX_MC_DEC BIT(3)
1736 #define B_AX_BC_DEC BIT(2)
1737 #define B_AX_SEC_RX_DEC BIT(1)
1738 #define B_AX_SEC_TX_ENC BIT(0)
1741 #define B_AX_APPEND_ICV BIT(1)
1742 #define B_AX_APPEND_MIC BIT(0)
1749 #define B_AX_IMR_ERROR BIT(3)
1766 #define B_AX_RX_HANG_IMR BIT(1)
1767 #define B_AX_TX_HANG_IMR BIT(0)
1770 #define B_AX_RX_HANG_ERROR_V1 BIT(1)
1771 #define B_AX_TX_HANG_ERROR_V1 BIT(0)
1774 #define B_AX_SS_INIT_DONE_1 BIT(31)
1775 #define B_AX_SS_WARM_INIT_FLG BIT(29)
1776 #define B_AX_SS_NONEMPTY_SS2FINFO_EN BIT(28)
1777 #define B_AX_SS_EN BIT(0)
1780 #define B_AX_SS_UL_REL BIT(31)
1804 #define B_AX_PLE_B_PKTID_ERR_INT_EN BIT(2)
1805 #define B_AX_RPT_HANG_TIMEOUT_INT_EN BIT(1)
1806 #define B_AX_SEARCH_HANG_TIMEOUT_INT_EN BIT(0)
1814 #define B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR BIT(25)
1815 #define B_AX_TXPKTCTL_CMDPSR_CMDTYPE_ERR BIT(24)
1816 #define B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR BIT(19)
1817 #define B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR BIT(18)
1818 #define B_AX_TXPKTCTL_USRCTL_NOINIT_ERR BIT(17)
1819 #define B_AX_TXPKTCTL_USRCTL_REINIT_ERR BIT(16)
1820 #define B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR_INT_EN BIT(9)
1821 #define B_AX_TXPKTCTL_CMDPSR_CMDTYPE_ERR_INT_EN BIT(8)
1822 #define B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR_INT_EN BIT(3)
1823 #define B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR_INT_EN BIT(2)
1824 #define B_AX_TXPKTCTL_USRCTL_NOINIT_ERR_INT_EN BIT(1)
1825 #define B_AX_TXPKTCTL_USRCTL_REINIT_ERR_INT_EN BIT(0)
1846 #define B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR_INT_EN BIT(9)
1847 #define B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR_INT_EN BIT(3)
1848 #define B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR_INT_EN BIT(2)
1849 #define B_AX_TXPKTCTL_USRCTL_NOINIT_ERR_INT_EN BIT(1)
1852 #define B_AX_DFI_ACTIVE BIT(31)
1859 #define B_AX_B0_PRELD_FEN BIT(31)
1872 #define B_AX_B0_IMR_ERR_PRELD_ENTNUMCFG BIT(21)
1873 #define B_AX_B0_IMR_ERR_PRELD_RLSPKTSZERR BIT(20)
1874 #define B_AX_B0_IMR_ERR_MPDUIF_DATAERR BIT(18)
1875 #define B_AX_B0_IMR_ERR_MPDUINFO_RECFG BIT(16)
1876 #define B_AX_B0_IMR_ERR_CMDPSR_TBLSZ BIT(11)
1877 #define B_AX_B0_IMR_ERR_CMDPSR_FRZTO BIT(10)
1878 #define B_AX_B0_IMR_ERR_CMDPSR_CMDTYPE BIT(9)
1879 #define B_AX_B0_IMR_ERR_CMDPSR_1STCMDERR BIT(8)
1880 #define B_AX_B0_IMR_ERR_USRCTL_RLSBMPLEN BIT(3)
1881 #define B_AX_B0_IMR_ERR_USRCTL_RDNRLSCMD BIT(2)
1882 #define B_AX_B0_IMR_ERR_USRCTL_NOINIT BIT(1)
1883 #define B_AX_B0_IMR_ERR_USRCTL_REINIT BIT(0)
1907 #define B_AX_B0_ISR_ERR_PRELD_EVT3 BIT(23)
1908 #define B_AX_B0_ISR_ERR_PRELD_EVT2 BIT(22)
1909 #define B_AX_B0_ISR_ERR_PRELD_ENTNUMCFG BIT(21)
1910 #define B_AX_B0_ISR_ERR_PRELD_RLSPKTSZERR BIT(20)
1911 #define B_AX_B0_ISR_ERR_MPDUIF_ERR1 BIT(19)
1912 #define B_AX_B0_ISR_ERR_MPDUIF_DATAERR BIT(18)
1913 #define B_AX_B0_ISR_ERR_MPDUINFO_ERR1 BIT(17)
1914 #define B_AX_B0_ISR_ERR_MPDUINFO_RECFG BIT(16)
1915 #define B_AX_B0_ISR_ERR_CMDPSR_TBLSZ BIT(11)
1916 #define B_AX_B0_ISR_ERR_CMDPSR_FRZTO BIT(10)
1917 #define B_AX_B0_ISR_ERR_CMDPSR_CMDTYPE BIT(9)
1918 #define B_AX_B0_ISR_ERR_CMDPSR_1STCMDERR BIT(8)
1919 #define B_AX_B0_ISR_ERR_USRCTL_EVT7 BIT(7)
1920 #define B_AX_B0_ISR_ERR_USRCTL_EVT6 BIT(6)
1921 #define B_AX_B0_ISR_ERR_USRCTL_EVT5 BIT(5)
1922 #define B_AX_B0_ISR_ERR_USRCTL_EVT4 BIT(4)
1923 #define B_AX_B0_ISR_ERR_USRCTL_RLSBMPLEN BIT(3)
1924 #define B_AX_B0_ISR_ERR_USRCTL_RDNRLSCMD BIT(2)
1925 #define B_AX_B0_ISR_ERR_USRCTL_NOINIT BIT(1)
1926 #define B_AX_B0_ISR_ERR_USRCTL_REINIT BIT(0)
1929 #define B_AX_B1_PRELD_FEN BIT(31)
1940 #define B_AX_B1_IMR_ERR_PRELD_ENTNUMCFG BIT(21)
1941 #define B_AX_B1_IMR_ERR_PRELD_RLSPKTSZERR BIT(20)
1942 #define B_AX_B1_IMR_ERR_MPDUIF_DATAERR BIT(18)
1943 #define B_AX_B1_IMR_ERR_MPDUINFO_RECFG BIT(16)
1944 #define B_AX_B1_IMR_ERR_CMDPSR_TBLSZ BIT(11)
1945 #define B_AX_B1_IMR_ERR_CMDPSR_FRZTO BIT(10)
1946 #define B_AX_B1_IMR_ERR_CMDPSR_CMDTYPE BIT(9)
1947 #define B_AX_B1_IMR_ERR_CMDPSR_1STCMDERR BIT(8)
1948 #define B_AX_B1_IMR_ERR_USRCTL_RLSBMPLEN BIT(3)
1949 #define B_AX_B1_IMR_ERR_USRCTL_RDNRLSCMD BIT(2)
1950 #define B_AX_B1_IMR_ERR_USRCTL_NOINIT BIT(1)
1951 #define B_AX_B1_IMR_ERR_USRCTL_REINIT BIT(0)
1976 #define B_AX_B1_ISR_ERR_PRELD_EVT3 BIT(23)
1977 #define B_AX_B1_ISR_ERR_PRELD_EVT2 BIT(22)
1978 #define B_AX_B1_ISR_ERR_PRELD_ENTNUMCFG BIT(21)
1979 #define B_AX_B1_ISR_ERR_PRELD_RLSPKTSZERR BIT(20)
1980 #define B_AX_B1_ISR_ERR_MPDUIF_ERR1 BIT(19)
1981 #define B_AX_B1_ISR_ERR_MPDUIF_DATAERR BIT(18)
1982 #define B_AX_B1_ISR_ERR_MPDUINFO_ERR1 BIT(17)
1983 #define B_AX_B1_ISR_ERR_MPDUINFO_RECFG BIT(16)
1984 #define B_AX_B1_ISR_ERR_CMDPSR_TBLSZ BIT(11)
1985 #define B_AX_B1_ISR_ERR_CMDPSR_FRZTO BIT(10)
1986 #define B_AX_B1_ISR_ERR_CMDPSR_CMDTYPE BIT(9)
1987 #define B_AX_B1_ISR_ERR_CMDPSR_1STCMDERR BIT(8)
1988 #define B_AX_B1_ISR_ERR_USRCTL_EVT7 BIT(7)
1989 #define B_AX_B1_ISR_ERR_USRCTL_EVT6 BIT(6)
1990 #define B_AX_B1_ISR_ERR_USRCTL_EVT5 BIT(5)
1991 #define B_AX_B1_ISR_ERR_USRCTL_EVT4 BIT(4)
1992 #define B_AX_B1_ISR_ERR_USRCTL_RLSBMPLEN BIT(3)
1993 #define B_AX_B1_ISR_ERR_USRCTL_RDNRLSCMD BIT(2)
1994 #define B_AX_B1_ISR_ERR_USRCTL_NOINIT BIT(1)
1995 #define B_AX_B1_ISR_ERR_USRCTL_REINIT BIT(0)
1999 #define B_AX_R_SYM_WLCMAC1_P4_PC_EN BIT(4)
2000 #define B_AX_R_SYM_WLCMAC1_P3_PC_EN BIT(3)
2001 #define B_AX_R_SYM_WLCMAC1_P2_PC_EN BIT(2)
2002 #define B_AX_R_SYM_WLCMAC1_P1_PC_EN BIT(1)
2003 #define B_AX_R_SYM_WLCMAC1_PC_EN BIT(0)
2006 #define B_AX_CMAC1_FEN BIT(30)
2007 #define B_AX_R_SYM_FEN_WLBBGLB_1 BIT(17)
2008 #define B_AX_R_SYM_FEN_WLBBFUN_1 BIT(16)
2009 #define B_AX_R_SYM_ISO_CMAC12PP BIT(5)
2015 #define B_AX_CMAC_CRPRT BIT(31)
2016 #define B_AX_CMAC_EN BIT(30)
2017 #define B_AX_CMAC_TXEN BIT(29)
2018 #define B_AX_CMAC_RXEN BIT(28)
2019 #define B_AX_FORCE_CMACREG_GCKEN BIT(15)
2020 #define B_AX_PHYINTF_EN BIT(5)
2021 #define B_AX_CMAC_DMA_EN BIT(4)
2022 #define B_AX_PTCLTOP_EN BIT(3)
2023 #define B_AX_SCHEDULER_EN BIT(2)
2024 #define B_AX_TMAC_EN BIT(1)
2025 #define B_AX_RMAC_EN BIT(0)
2030 #define B_AX_CMAC_CKEN BIT(30)
2031 #define B_AX_PHYINTF_CKEN BIT(5)
2032 #define B_AX_CMAC_DMA_CKEN BIT(4)
2033 #define B_AX_PTCLTOP_CKEN BIT(3)
2034 #define B_AX_SCHEDULER_CKEN BIT(2)
2035 #define B_AX_TMAC_CKEN BIT(1)
2036 #define B_AX_RMAC_CKEN BIT(0)
2074 #define B_AX_WMAC_TX_ERR_IND_EN BIT(7)
2075 #define B_AX_WMAC_RX_ERR_IND_EN BIT(6)
2076 #define B_AX_TXPWR_CTRL_ERR_IND_EN BIT(5)
2077 #define B_AX_PHYINTF_ERR_IND_EN BIT(4)
2078 #define B_AX_DMA_TOP_ERR_IND_EN BIT(3)
2079 #define B_AX_PTCL_TOP_ERR_IND_EN BIT(1)
2080 #define B_AX_SCHEDULE_TOP_ERR_IND_EN BIT(0)
2088 #define B_AX_WMAC_TX_ERR_IND BIT(7)
2089 #define B_AX_WMAC_RX_ERR_IND BIT(6)
2090 #define B_AX_TXPWR_CTRL_ERR_IND BIT(5)
2091 #define B_AX_PHYINTF_ERR_IND BIT(4)
2092 #define B_AX_DMA_TOP_ERR_IND BIT(3)
2093 #define B_AX_PTCL_TOP_ERR_IND BIT(1)
2094 #define B_AX_SCHEDULE_TOP_ERR_IND BIT(0)
2106 #define B_AX_SYNC_NOW BIT(30)
2107 #define B_AX_SYNC_ONCE BIT(29)
2108 #define B_AX_SYNC_AUTO BIT(28)
2110 #define B_AX_SYNC_PORT_OFFSET_SIGN BIT(18)
2149 #define B_AX_BTCCA_BRK_TXOP_EN BIT(9)
2150 #define B_AX_BTCCA_EN BIT(5)
2151 #define B_AX_EDCCA_EN BIT(4)
2152 #define B_AX_SEC80_EN BIT(3)
2153 #define B_AX_SEC40_EN BIT(2)
2154 #define B_AX_SEC20_EN BIT(1)
2155 #define B_AX_CCA_EN BIT(0)
2159 #define B_AX_CTN_TXEN_TWT_1 BIT(15)
2160 #define B_AX_CTN_TXEN_TWT_0 BIT(14)
2161 #define B_AX_CTN_TXEN_ULQ BIT(13)
2162 #define B_AX_CTN_TXEN_BCNQ BIT(12)
2163 #define B_AX_CTN_TXEN_HGQ BIT(11)
2164 #define B_AX_CTN_TXEN_CPUMGQ BIT(10)
2165 #define B_AX_CTN_TXEN_MGQ1 BIT(9)
2166 #define B_AX_CTN_TXEN_MGQ BIT(8)
2167 #define B_AX_CTN_TXEN_VO_1 BIT(7)
2168 #define B_AX_CTN_TXEN_VI_1 BIT(6)
2169 #define B_AX_CTN_TXEN_BK_1 BIT(5)
2170 #define B_AX_CTN_TXEN_BE_1 BIT(4)
2171 #define B_AX_CTN_TXEN_VO_0 BIT(3)
2172 #define B_AX_CTN_TXEN_VI_0 BIT(2)
2173 #define B_AX_CTN_TXEN_BK_0 BIT(1)
2174 #define B_AX_CTN_TXEN_BE_0 BIT(0)
2192 #define B_AX_MUEDCA_WMM_SEL BIT(8)
2193 #define B_AX_SET_MUEDCATIMER_TF_0 BIT(4)
2194 #define B_AX_MUEDCA_EN_0 BIT(0)
2198 #define B_AX_TB_CHK_TX_NAV BIT(31)
2199 #define B_AX_TB_CHK_BASIC_NAV BIT(30)
2200 #define B_AX_TB_CHK_BTCCA BIT(29)
2201 #define B_AX_TB_CHK_EDCCA BIT(28)
2202 #define B_AX_TB_CHK_CCA_S80 BIT(27)
2203 #define B_AX_TB_CHK_CCA_S40 BIT(26)
2204 #define B_AX_TB_CHK_CCA_S20 BIT(25)
2205 #define B_AX_TB_CHK_CCA_P20 BIT(24)
2206 #define B_AX_SIFS_CHK_BTCCA BIT(21)
2207 #define B_AX_SIFS_CHK_EDCCA BIT(20)
2208 #define B_AX_SIFS_CHK_CCA_S80 BIT(19)
2209 #define B_AX_SIFS_CHK_CCA_S40 BIT(18)
2210 #define B_AX_SIFS_CHK_CCA_S20 BIT(17)
2211 #define B_AX_SIFS_CHK_CCA_P20 BIT(16)
2212 #define B_AX_CTN_CHK_TXNAV BIT(8)
2213 #define B_AX_CTN_CHK_INTRA_NAV BIT(7)
2214 #define B_AX_CTN_CHK_BASIC_NAV BIT(6)
2215 #define B_AX_CTN_CHK_BTCCA BIT(5)
2216 #define B_AX_CTN_CHK_EDCCA BIT(4)
2217 #define B_AX_CTN_CHK_CCA_S80 BIT(3)
2218 #define B_AX_CTN_CHK_CCA_S40 BIT(2)
2219 #define B_AX_CTN_CHK_CCA_S20 BIT(1)
2220 #define B_AX_CTN_CHK_CCA_P20 BIT(0)
2224 #define B_AX_CTN_TXEN_TWT_3 BIT(17)
2225 #define B_AX_CTN_TXEN_TWT_2 BIT(16)
2230 #define B_AX_SORT_NON_IDLE_ERR_INT_EN BIT(1)
2237 #define B_AX_SCH_DBG_EN BIT(16)
2247 #define B_AX_PORT_RST_TSF_ADV BIT(1)
2254 #define B_AX_BRK_SETUP BIT(16)
2255 #define B_AX_TBTT_UPD_SHIFT_SEL BIT(15)
2256 #define B_AX_BCN_DROP_ALLOW BIT(14)
2257 #define B_AX_TBTT_PROHIB_EN BIT(13)
2258 #define B_AX_BCNTX_EN BIT(12)
2260 #define B_AX_BCN_FORCETX_EN BIT(9)
2261 #define B_AX_TXBCN_BTCCA_EN BIT(8)
2262 #define B_AX_BCNERR_CNT_EN BIT(7)
2263 #define B_AX_BCN_AGRES BIT(6)
2264 #define B_AX_TSFTR_RST BIT(5)
2265 #define B_AX_RX_BSSID_FIT_EN BIT(4)
2266 #define B_AX_TSF_UDT_EN BIT(3)
2267 #define B_AX_PORT_FUNC_EN BIT(2)
2268 #define B_AX_TXBCN_RPT_EN BIT(1)
2269 #define B_AX_RXBCN_RPT_EN BIT(0)
2340 #define B_AX_BCN_ERR_FLAG_OTHERS BIT(6)
2341 #define B_AX_BCN_ERR_FLAG_MAC BIT(5)
2342 #define B_AX_BCN_ERR_FLAG_TXON BIT(4)
2343 #define B_AX_BCN_ERR_FLAG_SRCHEND BIT(3)
2344 #define B_AX_BCN_ERR_FLAG_INVALID BIT(2)
2345 #define B_AX_BCN_ERR_FLAG_CMP BIT(1)
2346 #define B_AX_BCN_ERR_FLAG_LOCK BIT(0)
2362 #define B_AX_TBTT_SHIFT_OFST_SIGN BIT(11)
2388 #define B_AX_BCN_DROP_ALL_P4 BIT(4)
2389 #define B_AX_BCN_DROP_ALL_P3 BIT(3)
2390 #define B_AX_BCN_DROP_ALL_P2 BIT(2)
2391 #define B_AX_BCN_DROP_ALL_P1 BIT(1)
2392 #define B_AX_BCN_DROP_ALL_P0 BIT(0)
2398 #define B_AX_P0MB15_EN BIT(15)
2399 #define B_AX_P0MB14_EN BIT(14)
2400 #define B_AX_P0MB13_EN BIT(13)
2401 #define B_AX_P0MB12_EN BIT(12)
2402 #define B_AX_P0MB11_EN BIT(11)
2403 #define B_AX_P0MB10_EN BIT(10)
2404 #define B_AX_P0MB9_EN BIT(9)
2405 #define B_AX_P0MB8_EN BIT(8)
2406 #define B_AX_P0MB7_EN BIT(7)
2407 #define B_AX_P0MB6_EN BIT(6)
2408 #define B_AX_P0MB5_EN BIT(5)
2409 #define B_AX_P0MB4_EN BIT(4)
2410 #define B_AX_P0MB3_EN BIT(3)
2411 #define B_AX_P0MB2_EN BIT(2)
2412 #define B_AX_P0MB1_EN BIT(1)
2422 #define B_AX_CPUMGQ_LIFETIME_EN BIT(8)
2423 #define B_AX_MGQ_LIFETIME_EN BIT(7)
2424 #define B_AX_LIFETIME_EN BIT(6)
2425 #define B_AX_PTCL_TRIGGER_SS_EN_UL BIT(4)
2426 #define B_AX_PTCL_TRIGGER_SS_EN_1 BIT(3)
2427 #define B_AX_PTCL_TRIGGER_SS_EN_0 BIT(2)
2428 #define B_AX_CMAC_TX_MODE_1 BIT(1)
2429 #define B_AX_CMAC_TX_MODE_0 BIT(0)
2448 #define B_AX_HW_CTS2SELF_EN BIT(16)
2457 #define B_AX_BAND_MODE BIT(4)
2459 #define B_AX_RTS_LIMIT_IN_OFDM6 BIT(1)
2460 #define B_AX_CHECK_CCK_EN BIT(0)
2464 #define B_AX_ADD_TXCNT_BY BIT(31)
2470 #define B_AX_GI_LTF_FB_SEL BIT(30)
2478 #define B_AX_F2PCMD_FWWD_RLS_MODE BIT(9)
2479 #define B_AX_F2PCMD_RPT_EN BIT(8)
2481 #define B_AX_SPE_RPT_PATH_MASK GENMASK(5, 4)
2484 #define B_AX_F2PCMDRPT_FULL_DROP BIT(1)
2485 #define B_AX_NON_F2PCMDRPT_FULL_DROP BIT(0)
2490 #define B_AX_BT_PLT_RST BIT(9)
2491 #define B_AX_PLT_EN BIT(8)
2492 #define B_AX_RX_PLT_GNT_LTE_RX BIT(7)
2493 #define B_AX_RX_PLT_GNT_BT_RX BIT(6)
2494 #define B_AX_RX_PLT_GNT_BT_TX BIT(5)
2495 #define B_AX_RX_PLT_GNT_WL BIT(4)
2496 #define B_AX_TX_PLT_GNT_LTE_RX BIT(3)
2497 #define B_AX_TX_PLT_GNT_BT_RX BIT(2)
2498 #define B_AX_TX_PLT_GNT_BT_TX BIT(1)
2499 #define B_AX_TX_PLT_GNT_WL BIT(0)
2506 #define B_AX_BSS_COLOB_AX_PORT_0_MASK GENMASK(5, 0)
2510 #define B_AX_BSS_COLOB_AX_PORT_4_MASK GENMASK(5, 0)
2514 #define B_AX_F2PCMD_PKTID_ERR_INT_EN BIT(31)
2515 #define B_AX_F2PCMD_RD_PKTID_ERR_INT_EN BIT(30)
2516 #define B_AX_F2PCMD_ASSIGN_PKTID_ERR_INT_EN BIT(29)
2517 #define B_AX_F2PCMD_USER_ALLC_ERR_INT_EN BIT(28)
2518 #define B_AX_RX_SPF_U0_PKTID_ERR_INT_EN BIT(27)
2519 #define B_AX_TX_SPF_U1_PKTID_ERR_INT_EN BIT(26)
2520 #define B_AX_TX_SPF_U2_PKTID_ERR_INT_EN BIT(25)
2521 #define B_AX_TX_SPF_U3_PKTID_ERR_INT_EN BIT(24)
2522 #define B_AX_TX_RECORD_PKTID_ERR_INT_EN BIT(23)
2523 #define B_AX_F2PCMD_EMPTY_ERR_INT_EN BIT(15)
2524 #define B_AX_TWTSP_QSEL_ERR_INT_EN BIT(14)
2525 #define B_AX_BCNQ_ORDER_ERR_INT_EN BIT(12)
2526 #define B_AX_Q_PKTID_ERR_INT_EN BIT(11)
2527 #define B_AX_D_PKTID_ERR_INT_EN BIT(10)
2528 #define B_AX_TXPRT_FULL_DROP_ERR_INT_EN BIT(9)
2529 #define B_AX_F2PCMDRPT_FULL_DROP_ERR_INT_EN BIT(8)
2530 #define B_AX_FSM1_TIMEOUT_ERR_INT_EN BIT(1)
2531 #define B_AX_FSM_TIMEOUT_ERR_INT_EN BIT(0)
2564 #define B_AX_PTCL_TX_ARB_TO_MODE BIT(6)
2565 #define B_AX_PTCL_TX_ARB_TO_THR_MASK GENMASK(5, 0)
2569 #define B_AX_PTCL_TX_ON_STAT BIT(7)
2582 #define B_AX_PTCL_DBG_EN BIT(8)
2590 #define B_AX_NO_RESERVE_PAGE_ERR_IMR BIT(23)
2591 #define B_AX_RXDATA_FSM_HANG_ERROR_IMR BIT(15)
2592 #define B_AX_RXSTS_FSM_HANG_ERROR_IMR BIT(14)
2601 #define B_AX_RX_GET_NO_PAGE_ERR BIT(31)
2602 #define B_AX_RX_GET_NULL_PKT_ERR BIT(30)
2603 #define B_AX_RX_RU0_FSM_HANG_ERR BIT(29)
2604 #define B_AX_RX_RU1_FSM_HANG_ERR BIT(28)
2605 #define B_AX_RX_RU2_FSM_HANG_ERR BIT(27)
2606 #define B_AX_RX_RU3_FSM_HANG_ERR BIT(26)
2607 #define B_AX_RX_RU4_FSM_HANG_ERR BIT(25)
2608 #define B_AX_RX_RU5_FSM_HANG_ERR BIT(24)
2609 #define B_AX_RX_RU6_FSM_HANG_ERR BIT(23)
2610 #define B_AX_RX_RU7_FSM_HANG_ERR BIT(22)
2611 #define B_AX_RX_RXSTS_FSM_HANG_ERR BIT(21)
2612 #define B_AX_RX_CSI_FSM_HANG_ERR BIT(20)
2613 #define B_AX_RX_TXRPT_FSM_HANG_ERR BIT(19)
2614 #define B_AX_RX_F2PCMD_FSM_HANG_ERR BIT(18)
2615 #define B_AX_RX_RU0_ZERO_LEN_ERR BIT(17)
2616 #define B_AX_RX_RU1_ZERO_LEN_ERR BIT(16)
2617 #define B_AX_RX_RU2_ZERO_LEN_ERR BIT(15)
2618 #define B_AX_RX_RU3_ZERO_LEN_ERR BIT(14)
2619 #define B_AX_RX_RU4_ZERO_LEN_ERR BIT(13)
2620 #define B_AX_RX_RU5_ZERO_LEN_ERR BIT(12)
2621 #define B_AX_RX_RU6_ZERO_LEN_ERR BIT(11)
2622 #define B_AX_RX_RU7_ZERO_LEN_ERR BIT(10)
2623 #define B_AX_RX_RXSTS_ZERO_LEN_ERR BIT(9)
2624 #define B_AX_RX_CSI_ZERO_LEN_ERR BIT(8)
2625 #define B_AX_PLE_DATA_OPT_FSM_HANG BIT(7)
2626 #define B_AX_PLE_RXDATA_REQ_BUF_FSM_HANG BIT(6)
2627 #define B_AX_PLE_TXRPT_REQ_BUF_FSM_HANG BIT(5)
2628 #define B_AX_PLE_WD_OPT_FSM_HANG BIT(4)
2629 #define B_AX_PLE_ENQ_FSM_HANG BIT(3)
2630 #define B_AX_RXDATA_ENQUE_ORDER_ERR BIT(2)
2631 #define B_AX_RXSTS_ENQUE_ORDER_ERR BIT(1)
2632 #define B_AX_RX_CSI_PKT_NUM_ERR BIT(0)
2636 #define B_AX_RXDMA_DBGOUT_EN BIT(31)
2643 #define B_AX_RXDMA_DIS_CSI_RELEASE BIT(9)
2644 #define B_AX_RXDMA_DIS_RXSTS_WAIT_PTR_CLR BIT(7)
2645 #define B_AX_RXDMA_DIS_CSI_WAIT_PTR_CLR BIT(6)
2646 #define B_AX_RXSTS_PTR_FULL_MODE BIT(5)
2647 #define B_AX_CSI_PTR_FULL_MODE BIT(4)
2648 #define B_AX_RU3_PTR_FULL_MODE BIT(3)
2649 #define B_AX_RU2_PTR_FULL_MODE BIT(2)
2650 #define B_AX_RU1_PTR_FULL_MODE BIT(1)
2651 #define B_AX_RU0_PTR_FULL_MODE BIT(0)
2658 #define B_AX_DLE_CLOCK_FORCE_V1 BIT(31)
2659 #define B_AX_TXDMA_CLOCK_FORCE_V1 BIT(30)
2660 #define B_AX_RXDMA_CLOCK_FORCE_V1 BIT(29)
2664 #define B_AX_RXDMA_DIS_CSI_RELEASE_V1 BIT(14)
2665 #define B_AX_CSI_PTR_FULL_MODE_V1 BIT(13)
2666 #define B_AX_RXDATA_PTR_FULL_MODE BIT(12)
2667 #define B_AX_RXSTS_PTR_FULL_MODE_V1 BIT(11)
2669 #define B_AX_RXDATA_FULL_RSV_DEPTH_MASK GENMASK(7, 5)
2675 #define B_AX_RXDMA_TXRPT_QUEUE_ID_SW_EN BIT(31)
2677 #define B_AX_RXDMA_F2PCMD_QUEUE_ID_SW_EN BIT(24)
2679 #define B_AX_RXDMA_TXRPT_QUEUE_ID_TGT_SW_EN BIT(17)
2681 #define B_AX_RXDMA_F2PCMD_QUEUE_ID_TGT_SW_EN BIT(10)
2683 #define B_AX_ORDER_FIFO_OUT BIT(3)
2684 #define B_AX_ORDER_FIFO_EMPTY BIT(2)
2692 #define B_AX_DLE_ENQ_STATE_V1 BIT(25)
2696 #define B_AX_ERR_INDICATOR BIT(5)
2705 #define B_AX_RX_GET_NULL_PKT_ERR_MSK BIT(30)
2706 #define B_AX_RX_RU0_FSM_HANG_MSK_ERR_MSK BIT(29)
2707 #define B_AX_RX_RU1_FSM_HANG_MSK_ERR_MSK BIT(28)
2708 #define B_AX_RX_RU2_FSM_HANG_MSK_ERR_MSK BIT(27)
2709 #define B_AX_RX_RU3_FSM_HANG_MSK_ERR_MSK BIT(26)
2710 #define B_AX_RX_RU4_FSM_HANG_MSK_ERR_MSK BIT(25)
2711 #define B_AX_RX_RU5_FSM_HANG_MSK_ERR_MSK BIT(24)
2712 #define B_AX_RX_RU6_FSM_HANG_MSK_ERR_MSK BIT(23)
2713 #define B_AX_RX_RU7_FSM_HANG_MSK_ERR_MSK BIT(22)
2714 #define B_AX_RX_RXSTS_FSM_HANG_MSK_ERR_MSK BIT(21)
2715 #define B_AX_RX_CSI_FSM_HANG_MSK_ERR_MSK BIT(20)
2716 #define B_AX_RX_TXRPT_FSM_HANG_MSK_ERR_MSK BIT(19)
2717 #define B_AX_RX_F2PCMD_FSM_HANG_MSK_ERR_MSK BIT(18)
2718 #define B_AX_RX_RU0_ZERO_LEN_ERR_MSK BIT(17)
2719 #define B_AX_RX_RU1_ZERO_LEN_ERR_MSK BIT(16)
2720 #define B_AX_RX_RU2_ZERO_LEN_ERR_MSK BIT(15)
2721 #define B_AX_RX_RU3_ZERO_LEN_ERR_MSK BIT(14)
2722 #define B_AX_RX_RU4_ZERO_LEN_ERR_MSK BIT(13)
2723 #define B_AX_RX_RU5_ZERO_LEN_ERR_MSK BIT(12)
2724 #define B_AX_RX_RU6_ZERO_LEN_ERR_MSK BIT(11)
2725 #define B_AX_RX_RU7_ZERO_LEN_ERR_MSK BIT(10)
2726 #define B_AX_RX_RXSTS_ZERO_LEN_ERR_MSK BIT(9)
2727 #define B_AX_RX_CSI_ZERO_LEN_ERR_MSK BIT(8)
2728 #define B_AX_PLE_DATA_OPT_FSM_HANG_MSK BIT(7)
2729 #define B_AX_PLE_RXDATA_REQ_BUF_FSM_HANG_MSK BIT(6)
2730 #define B_AX_PLE_TXRPT_REQ_BUF_FSM_HANG_MSK BIT(5)
2731 #define B_AX_PLE_WD_OPT_FSM_HANG_MSK BIT(4)
2732 #define B_AX_PLE_ENQ_FSM_HANG_MSK BIT(3)
2733 #define B_AX_RXDATA_ENQUE_ORDER_ERR_MSK BIT(2)
2734 #define B_AX_RXSTS_ENQUE_ORDER_ERR_MSK BIT(1)
2735 #define B_AX_RX_CSI_PKT_NUM_ERR_MSK BIT(0)
2789 #define B_AX_TX_RU0_FSM_HANG_ERR_MSK BIT(31)
2790 #define B_AX_TX_RU1_FSM_HANG_ERR_MSK BIT(30)
2791 #define B_AX_TX_RU2_FSM_HANG_ERR_MSK BIT(29)
2792 #define B_AX_TX_RU3_FSM_HANG_ERR_MSK BIT(28)
2793 #define B_AX_TX_RU4_FSM_HANG_ERR_MSK BIT(27)
2794 #define B_AX_TX_RU5_FSM_HANG_ERR_MSK BIT(26)
2795 #define B_AX_TX_RU6_FSM_HANG_ERR_MSK BIT(25)
2796 #define B_AX_TX_RU7_FSM_HANG_ERR_MSK BIT(24)
2797 #define B_AX_TX_RU8_FSM_HANG_ERR_MSK BIT(23)
2798 #define B_AX_TX_RU9_FSM_HANG_ERR_MSK BIT(22)
2799 #define B_AX_TX_RU10_FSM_HANG_ERR_MSK BIT(21)
2800 #define B_AX_TX_RU11_FSM_HANG_ERR_MSK BIT(20)
2801 #define B_AX_TX_RU12_FSM_HANG_ERR_MSK BIT(19)
2802 #define B_AX_TX_RU13_FSM_HANG_ERR_MSK BIT(18)
2803 #define B_AX_TX_RU14_FSM_HANG_ERR_MSK BIT(17)
2804 #define B_AX_TX_RU15_FSM_HANG_ERR_MSK BIT(16)
2805 #define B_AX_TX_CSI_FSM_HANG_ERR_MSK BIT(15)
2806 #define B_AX_TX_WD_PLD_ID_FSM_HANG_ERR_MSK BIT(14)
2831 #define B_AX_TCR_UDF_EN BIT(23)
2835 #define B_AX_TCR_VHTSIGA1_TXPS BIT(9)
2836 #define B_AX_TCR_PLCP_ERRHDL_EN BIT(8)
2837 #define B_AX_TCR_PADSEL BIT(7)
2838 #define B_AX_TCR_MASK_SIGBCRC BIT(6)
2839 #define B_AX_TCR_SR_VAL15_ALLOW BIT(5)
2840 #define B_AX_TCR_EN_EOF BIT(4)
2841 #define B_AX_TCR_EN_SCRAM_INC BIT(3)
2842 #define B_AX_TCR_EN_20MST BIT(2)
2843 #define B_AX_TCR_CRC BIT(1)
2844 #define B_AX_TCR_DISGCLK BIT(0)
2849 #define B_AX_TCR_CCK_LOCK_CLK BIT(27)
2850 #define B_AX_TCR_FORCE_READ_TXDFIFO BIT(26)
2852 #define B_AX_TCR_SMOOTH_VAL BIT(15)
2853 #define B_AX_TCR_SMOOTH_CTRL BIT(14)
2854 #define B_AX_CS_REQ_VAL BIT(13)
2855 #define B_AX_CS_REQ_SEL BIT(12)
2863 #define B_AX_UPD_HGQMD BIT(1)
2864 #define B_AX_UPD_TIMIE BIT(0)
2884 #define B_AX_LENGTH_ERR_FLAG_U3 BIT(11)
2885 #define B_AX_LENGTH_ERR_FLAG_U2 BIT(10)
2886 #define B_AX_LENGTH_ERR_FLAG_U1 BIT(9)
2887 #define B_AX_LENGTH_ERR_FLAG_U0 BIT(8)
2888 #define B_AX_DBGSEL_MACTX_MASK GENMASK(5, 0)
2904 #define B_AX_RSP_STATIC_RTS_CHK_SERV_BW_EN BIT(30)
2905 #define B_AX_RSP_TBPPDU_CHK_PWR BIT(29)
2906 #define B_AX_RSP_CHK_BASIC_NAV BIT(21)
2907 #define B_AX_RSP_CHK_INTRA_NAV BIT(20)
2908 #define B_AX_RSP_CHK_TXNAV BIT(19)
2909 #define B_AX_TXDATA_END_PS_OPT BIT(18)
2910 #define B_AX_CHECK_SOUNDING_SEQ BIT(17)
2911 #define B_AX_RXBA_IGNOREA2 BIT(16)
2917 #define B_AX_WMAC_RESP_STBC_EN BIT(31)
2918 #define B_AX_WMAC_RXFTM_TXACK_SC BIT(30)
2919 #define B_AX_WMAC_RXFTM_TXACKBWEQ BIT(29)
2920 #define B_AX_RSP_CHK_SEC_CCA_80 BIT(28)
2921 #define B_AX_RSP_CHK_SEC_CCA_40 BIT(27)
2922 #define B_AX_RSP_CHK_SEC_CCA_20 BIT(26)
2923 #define B_AX_RSP_CHK_BTCCA BIT(25)
2924 #define B_AX_RSP_CHK_EDCCA BIT(24)
2925 #define B_AX_RSP_CHK_CCA BIT(23)
2926 #define B_AX_WMAC_LDPC_EN BIT(22)
2927 #define B_AX_WMAC_SGIEN BIT(21)
2928 #define B_AX_WMAC_SPLCPEN BIT(20)
2929 #define B_AX_WMAC_BESP_EARLY_TXBA BIT(17)
2939 #define B_AX_RESP_TX_MACID_CCA_TH_EN BIT(31)
2943 #define B_AX_WMAC_RESP_DOPPLEB_AX_EN BIT(21)
2944 #define B_AX_WMAC_RESP_DCM_EN BIT(20)
2948 #define B_AX_WMAC_RESP_REF_RATE_SEL BIT(9)
2953 #define B_AX_MACLBK_EN BIT(0)
2957 #define B_AX_WMAC_NAV_UPPER_EN BIT(26)
2959 #define B_AX_WMAC_PLCP_UP_NAV_EN BIT(17)
2960 #define B_AX_WMAC_TF_UP_NAV_EN BIT(16)
2969 #define B_AX_RXTRIG_RU26_DIS BIT(21)
2970 #define B_AX_RXTRIG_FCSCHK_EN BIT(20)
2972 #define B_AX_RXTRIG_EN BIT(16)
2977 #define B_AX_WMAC_MODE BIT(22)
2979 #define B_AX_RMAC_FTM BIT(8)
2980 #define B_AX_RMAC_CSI BIT(7)
2981 #define B_AX_TMAC_MIMO_CTRL BIT(6)
2982 #define B_AX_TMAC_RXTB BIT(5)
2983 #define B_AX_TMAC_HWSIGB_GEN BIT(4)
2984 #define B_AX_TMAC_TXPLCP BIT(3)
2985 #define B_AX_TMAC_RESP BIT(2)
2986 #define B_AX_TMAC_TXCTL BIT(1)
2987 #define B_AX_TMAC_MACTX BIT(0)
3008 #define B_AX_FTM_ERROR_FLAG_CLR BIT(8)
3009 #define B_AX_CSI_ERROR_FLAG_CLR BIT(7)
3010 #define B_AX_MIMOCTRL_ERROR_FLAG_CLR BIT(6)
3011 #define B_AX_RXTB_ERROR_FLAG_CLR BIT(5)
3012 #define B_AX_HWSIGB_GEN_ERROR_FLAG_CLR BIT(4)
3013 #define B_AX_TXPLCP_ERROR_FLAG_CLR BIT(3)
3014 #define B_AX_RESP_ERROR_FLAG_CLR BIT(2)
3015 #define B_AX_TXCTL_ERROR_FLAG_CLR BIT(1)
3016 #define B_AX_MACTX_ERROR_FLAG_CLR BIT(0)
3032 #define B_AX_TMAC_TXPLCP_ERR_CLR BIT(19)
3033 #define B_AX_TMAC_RESP_ERR_CLR BIT(18)
3034 #define B_AX_TMAC_TXCTL_ERR_CLR BIT(17)
3035 #define B_AX_TMAC_MACTX_ERR_CLR BIT(16)
3036 #define B_AX_TMAC_TXPLCP_ERR BIT(14)
3037 #define B_AX_TMAC_RESP_ERR BIT(13)
3038 #define B_AX_TMAC_TXCTL_ERR BIT(12)
3039 #define B_AX_TMAC_MACTX_ERR BIT(11)
3040 #define B_AX_TMAC_TXPLCP_INT_EN BIT(10)
3041 #define B_AX_TMAC_RESP_INT_EN BIT(9)
3042 #define B_AX_TMAC_TXCTL_INT_EN BIT(8)
3043 #define B_AX_TMAC_MACTX_INT_EN BIT(7)
3044 #define B_AX_WMAC_INT_MODE BIT(6)
3045 #define B_AX_TMAC_TIMETOUT_THR_MASK GENMASK(5, 0)
3062 #define B_AX_CSI_ON_TIMEOUT_EN BIT(5)
3063 #define B_AX_STS_ON_TIMEOUT_EN BIT(4)
3064 #define B_AX_DATA_ON_TIMEOUT_EN BIT(3)
3065 #define B_AX_OFDM_CCA_TIMEOUT_EN BIT(2)
3066 #define B_AX_CCK_CCA_TIMEOUT_EN BIT(1)
3067 #define B_AX_PHY_TXON_TIMEOUT_EN BIT(0)
3083 #define B_AX_CSI_ON_TIMEOUT BIT(29)
3084 #define B_AX_STS_ON_TIMEOUT BIT(28)
3085 #define B_AX_DATA_ON_TIMEOUT BIT(27)
3086 #define B_AX_OFDM_CCA_TIMEOUT BIT(26)
3087 #define B_AX_CCK_CCA_TIMEOUT BIT(25)
3088 #define B_AXC_PHY_TXON_TIMEOUT BIT(24)
3089 #define B_AX_CSI_ON_TIMEOUT_INT_EN BIT(21)
3090 #define B_AX_STS_ON_TIMEOUT_INT_EN BIT(20)
3091 #define B_AX_DATA_ON_TIMEOUT_INT_EN BIT(19)
3092 #define B_AX_OFDM_CCA_TIMEOUT_INT_EN BIT(18)
3093 #define B_AX_CCK_CCA_TIMEOUT_INT_EN BIT(17)
3094 #define B_AX_PHY_TXON_TIMEOUT_INT_EN BIT(16)
3095 #define B_AX_PHYINTF_TIMEOUT_THR_MSAK GENMASK(5, 0)
3111 #define B_AX_BFMER_NDP_BFEN BIT(2)
3112 #define B_AX_BFMER_VHT_BFPRT_CHK BIT(0)
3121 #define B_AX_BFMEE_NDP_RXSTDBY_SEL BIT(16)
3124 #define B_AX_BFMEE_HE_NDPA_EN BIT(2)
3125 #define B_AX_BFMEE_VHT_NDPA_EN BIT(1)
3126 #define B_AX_BFMEE_HT_NDPA_EN BIT(0)
3132 #define B_AX_BFMEE_CSISEQ_SEL BIT(29)
3133 #define B_AX_BFMEE_BFPARAM_SEL BIT(28)
3135 #define B_AX_BFMEE_BF_PORT_SEL BIT(23)
3136 #define B_AX_BFMEE_USE_NSTS BIT(22)
3137 #define B_AX_BFMEE_CSI_RATE_FB_EN BIT(21)
3138 #define B_AX_BFMEE_CSI_GID_SEL BIT(20)
3140 #define B_AX_BFMEE_CSI_FORCE_RETE_EN BIT(17)
3141 #define B_AX_BFMEE_CSI_USE_NDPARATE BIT(16)
3142 #define B_AX_BFMEE_CSI_WITHHTC_EN BIT(15)
3143 #define B_AX_BFMEE_CSIINFO0_BF_EN BIT(14)
3144 #define B_AX_BFMEE_CSIINFO0_STBC_EN BIT(13)
3145 #define B_AX_BFMEE_CSIINFO0_LDPC_EN BIT(12)
3149 #define B_AX_BFMEE_CSIINFO0_NR_MASK GENMASK(5, 3)
3167 #define B_AX_STOP_RX_IN BIT(11)
3175 #define B_AX_RX_DLK_RST_EN BIT(1)
3176 #define B_AX_RX_DLK_INT_EN BIT(0)
3180 #define B_AX_DIS_CHK_MIN_LEN BIT(8)
3181 #define B_AX_HE_SIGB_CRC_CHK BIT(6)
3182 #define B_AX_VHT_MU_SIGB_CRC_CHK BIT(5)
3183 #define B_AX_VHT_SU_SIGB_CRC_CHK BIT(4)
3184 #define B_AX_SIGA_CRC_CHK BIT(3)
3185 #define B_AX_LSIG_PARITY_CHK_EN BIT(2)
3186 #define B_AX_CCK_SIG_CHK BIT(1)
3187 #define B_AX_CCK_CRC_CHK BIT(0)
3196 #define B_AX_A_FTM_REQ BIT(14)
3197 #define B_AX_A_ERR_PKT BIT(13)
3198 #define B_AX_A_UNSUP_PKT BIT(12)
3199 #define B_AX_A_CRC32_ERR BIT(11)
3200 #define B_AX_A_PWR_MGNT BIT(10)
3202 #define B_AX_A_BCN_CHK_EN BIT(7)
3203 #define B_AX_A_MC_LIST_CAM_MATCH BIT(6)
3204 #define B_AX_A_BC_CAM_MATCH BIT(5)
3205 #define B_AX_A_UC_CAM_MATCH BIT(4)
3206 #define B_AX_A_MC BIT(3)
3207 #define B_AX_A_BC BIT(2)
3208 #define B_AX_A_A1_MATCH BIT(1)
3209 #define B_AX_SNIFFER_MODE BIT(0)
3231 #define B_AX_ADDR_CAM_CLR BIT(8)
3232 #define B_AX_ADDR_CAM_A2_B0_CHK BIT(2)
3233 #define B_AX_ADDR_CAM_SRCH_PERPKT BIT(1)
3234 #define B_AX_ADDR_CAM_EN BIT(0)
3238 #define B_AX_SSN_SEL BIT(2)
3244 #define B_AX_PPDU_STAT_RPT_TRIG BIT(8)
3245 #define B_AX_PPDU_STAT_RPT_CRC32 BIT(5)
3246 #define B_AX_PPDU_STAT_RPT_A1M BIT(4)
3247 #define B_AX_APP_PLCP_HDR_RPT BIT(3)
3248 #define B_AX_APP_RX_CNT_RPT BIT(2)
3249 #define B_AX_APP_MAC_INFO_RPT BIT(1)
3250 #define B_AX_PPDU_STAT_RPT_EN BIT(0)
3254 #define B_AX_SR_EN BIT(0)
3258 #define B_AX_BSSID_MATCH BIT(3)
3259 #define B_AX_PARTIAL_AID_MATCH BIT(2)
3260 #define B_AX_BSSCOLOR_MATCH BIT(1)
3261 #define B_AX_PLCP_SRC_EN BIT(0)
3265 #define B_AX_CSIPRT_HESU_AID_EN BIT(25)
3266 #define B_AX_CSIPRT_VHTSU_AID_EN BIT(24)
3273 #define B_AX_STATE_UPD BIT(7)
3278 #define B_AX_RXERR_INTPS_EN BIT(31)
3279 #define B_AX_RMAC_RX_CSI_TIMEOUT_INT_EN BIT(19)
3280 #define B_AX_RMAC_RX_TIMEOUT_INT_EN BIT(18)
3281 #define B_AX_RMAC_CSI_TIMEOUT_INT_EN BIT(17)
3282 #define B_AX_RMAC_DATA_ON_TIMEOUT_INT_EN BIT(16)
3283 #define B_AX_RMAC_CCA_TIMEOUT_INT_EN BIT(15)
3284 #define B_AX_RMAC_DMA_TIMEOUT_INT_EN BIT(14)
3285 #define B_AX_RMAC_DATA_ON_TO_IDLE_TIMEOUT_INT_EN BIT(13)
3286 #define B_AX_RMAC_CCA_TO_IDLE_TIMEOUT_INT_EN BIT(12)
3287 #define B_AX_RMAC_RX_CSI_TIMEOUT_FLAG BIT(7)
3288 #define B_AX_RMAC_RX_TIMEOUT_FLAG BIT(6)
3289 #define B_AX_BMAC_CSI_TIMEOUT_FLAG BIT(5)
3290 #define B_AX_BMAC_DATA_ON_TIMEOUT_FLAG BIT(4)
3291 #define B_AX_BMAC_CCA_TIMEOUT_FLAG BIT(3)
3292 #define B_AX_BMAC_DMA_TIMEOUT_FLAG BIT(2)
3293 #define B_AX_BMAC_DATA_ON_TO_IDLE_TIMEOUT_FLAG BIT(1)
3294 #define B_AX_BMAC_CCA_TO_IDLE_TIMEOUT_FLAG BIT(0)
3310 #define B_AX_RX_ERR_TRIG_ACT_TO_MSK BIT(9)
3311 #define B_AX_RX_ERR_STS_ACT_TO_MSK BIT(8)
3312 #define B_AX_RX_ERR_CSI_ACT_TO_MSK BIT(7)
3313 #define B_AX_RX_ERR_ACT_TO_MSK BIT(6)
3314 #define B_AX_CSI_DATAON_ASSERT_TO_MSK BIT(5)
3315 #define B_AX_DATAON_ASSERT_TO_MSK BIT(4)
3316 #define B_AX_CCA_ASSERT_TO_MSK BIT(3)
3317 #define B_AX_RX_ERR_DMA_TO_MSK BIT(2)
3318 #define B_AX_RX_ERR_DATA_TO_MSK BIT(1)
3319 #define B_AX_RX_ERR_CCA_TO_MSK BIT(0)
3354 #define B_AX_FORCE_PWR_BY_RATE_EN BIT(9)
3359 #define B_AX_TXAGC_BT_EN BIT(1)
3373 #define B_AX_TXAGC_BF_PWR_BOOST_FORCE_VAL_EN BIT(29)
3375 #define B_AX_FORCE_HE_ER_SU_EN_EN BIT(23)
3376 #define B_AX_FORCE_HE_ER_SU_EN_VALUE BIT(22)
3377 #define B_AX_FORCE_MACID_CCA_TH_EN_EN BIT(21)
3378 #define B_AX_FORCE_MACID_CCA_TH_EN_VALUE BIT(20)
3379 #define B_AX_FORCE_BT_GRANT_EN BIT(19)
3380 #define B_AX_FORCE_BT_GRANT_VALUE BIT(18)
3381 #define B_AX_FORCE_RX_LTE_EN BIT(17)
3382 #define B_AX_FORCE_RX_LTE_VALUE BIT(16)
3383 #define B_AX_FORCE_TXBF_EN_EN BIT(15)
3384 #define B_AX_FORCE_TXBF_EN_VALUE BIT(14)
3385 #define B_AX_FORCE_TXSC_EN BIT(13)
3387 #define B_AX_FORCE_NTX_EN BIT(6)
3388 #define B_AX_FORCE_NTX_VALUE BIT(5)
3389 #define B_AX_FORCE_PWR_MODE_EN BIT(3)
3393 #define B_AX_PWR_UL_TB_CTRL_EN BIT(31)
3465 #define B_P80_AT_HIGH_FREQ_BB_WRP BIT(28)
3477 #define B_AX_BTC_EN BIT(31)
3478 #define B_AX_EN_EXT_BT_PINMUX BIT(29)
3479 #define B_AX_BTC_RST BIT(28)
3480 #define B_AX_BTC_DBG_SRC_SEL BIT(27)
3482 #define B_AX_INV_WL_ACT2 BIT(17)
3483 #define B_AX_BTG_LNA1_GAIN_SEL BIT(16)
3485 #define B_AX_IGN_GNT_BT2_RX BIT(7)
3486 #define B_AX_IGN_GNT_BT2_TX BIT(6)
3487 #define B_AX_IGN_GNT_BT2 BIT(5)
3489 #define B_AX_DIS_BTC_CLK_G BIT(2)
3490 #define B_AX_GNT_WL_RX_CTRL BIT(1)
3491 #define B_AX_WL_SRC BIT(0)
3495 #define B_AX_BT_BLE_EN_V1 BIT(24)
3496 #define B_AX_BT_ULTRA_EN BIT(16)
3504 #define B_AX_PTA_WL_PRI_MASK_BCNQ BIT(8)
3508 #define B_AX_BT_CNT_RST_V1 BIT(1)
3509 #define B_AX_BT_CNT_EN BIT(0)
3516 #define B_AX_PTA_WL_TX_EN BIT(1)
3517 #define B_AX_PTA_EDCCA_EN BIT(0)
3521 #define B_BTC_TX_NULL_HI BIT(23)
3522 #define B_BTC_TX_BCN_HI BIT(22)
3523 #define B_BTC_TX_TRI_HI BIT(17)
3524 #define B_BTC_RSP_ACK_HI BIT(10)
3532 #define B_BTC_PRI_MASK_RXCCK_V1 BIT(28)
3533 #define B_BTC_PRI_MASK_TX_RESP_V1 BIT(3)
3537 #define B_AX_GNT_BT_BYPASS_PRIORITY BIT(12)
3538 #define B_AX_GNT_BT_POLARITY BIT(8)
3544 #define B_AX_BT_CNT_RST BIT(16)
3550 #define MAC_AX_CSR_PRI_TO 5
3551 #define B_AX_WL_ACT_MSK BIT(3)
3552 #define B_AX_STATIS_BT_EN BIT(2)
3553 #define B_AX_WL_ACT_MASK_ENABLE BIT(1)
3554 #define B_AX_ENHANCED_BT BIT(0)
3567 #define B_AX_WL_ACT2_VAL BIT(21)
3568 #define B_AX_WL_ACT2_SWCTRL BIT(20)
3569 #define B_AX_WL_ACT_VAL BIT(19)
3570 #define B_AX_WL_ACT_SWCTRL BIT(18)
3571 #define B_AX_GNT_BT_RX_VAL BIT(17)
3572 #define B_AX_GNT_BT_RX_SWCTRL BIT(16)
3573 #define B_AX_GNT_BT_TX_VAL BIT(15)
3574 #define B_AX_GNT_BT_TX_SWCTRL BIT(14)
3575 #define B_AX_GNT_WL_RX_VAL BIT(13)
3576 #define B_AX_GNT_WL_RX_SWCTRL BIT(12)
3577 #define B_AX_GNT_WL_TX_VAL BIT(11)
3578 #define B_AX_GNT_WL_TX_SWCTRL BIT(10)
3579 #define B_AX_GNT_BT_RFC_S1_VAL BIT(9)
3580 #define B_AX_GNT_BT_RFC_S1_SWCTRL BIT(8)
3581 #define B_AX_GNT_WL_RFC_S1_VAL BIT(7)
3582 #define B_AX_GNT_WL_RFC_S1_SWCTRL BIT(6)
3583 #define B_AX_GNT_BT_RFC_S0_VAL BIT(5)
3584 #define B_AX_GNT_BT_RFC_S0_SWCTRL BIT(4)
3585 #define B_AX_GNT_WL_RFC_S0_VAL BIT(3)
3586 #define B_AX_GNT_WL_RFC_S0_SWCTRL BIT(2)
3587 #define B_AX_GNT_WL_BB_VAL BIT(1)
3588 #define B_AX_GNT_WL_BB_SWCTRL BIT(0)
3591 #define B_AX_GNT_BT_RFC_S1_STA BIT(5)
3592 #define B_AX_GNT_WL_RFC_S1_STA BIT(4)
3593 #define B_AX_GNT_BT_RFC_S0_STA BIT(3)
3594 #define B_AX_GNT_WL_RFC_S0_STA BIT(2)
3597 #define B_AX_GNT_BT_RFC_S1 BIT(4)
3598 #define B_AX_GNT_BT_RFC_S0 BIT(3)
3599 #define B_AX_GNT_WL_RFC_S1 BIT(2)
3600 #define B_AX_GNT_WL_RFC_S0 BIT(1)
3607 #define B_AX_TDMA_BT_START_NOTIFY BIT(5)
3608 #define B_AX_ENABLE_TDMA_FW_MODE BIT(4)
3609 #define B_AX_ENABLE_PTA_TDMA_MODE BIT(3)
3610 #define B_AX_ENABLE_COEXIST_TAB_IN_TDMA BIT(2)
3611 #define B_AX_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA BIT(1)
3612 #define B_AX_RTK_BT_ENABLE BIT(0)
3617 #define B_AX_BT_RPT_SAMPLE_RATE_MASK GENMASK(5, 0)
3618 #define MAC_AX_RTK_RATE 5
3633 #define B_AX_GNT_BT_RFC_S1_SW_VAL BIT(31)
3634 #define B_AX_GNT_BT_RFC_S1_SW_CTRL BIT(30)
3635 #define B_AX_GNT_WL_RFC_S1_SW_VAL BIT(29)
3636 #define B_AX_GNT_WL_RFC_S1_SW_CTRL BIT(28)
3637 #define B_AX_GNT_BT_BB_S1_SW_VAL BIT(27)
3638 #define B_AX_GNT_BT_BB_S1_SW_CTRL BIT(26)
3639 #define B_AX_GNT_WL_BB_S1_SW_VAL BIT(25)
3640 #define B_AX_GNT_WL_BB_S1_SW_CTRL BIT(24)
3641 #define B_AX_BT_SW_CTRL_WL_PRIORITY BIT(19)
3642 #define B_AX_WL_SW_CTRL_WL_PRIORITY BIT(18)
3643 #define B_AX_LTE_PATTERN_2_EN BIT(17)
3644 #define B_AX_LTE_PATTERN_1_EN BIT(16)
3645 #define B_AX_GNT_BT_RFC_S0_SW_VAL BIT(15)
3646 #define B_AX_GNT_BT_RFC_S0_SW_CTRL BIT(14)
3647 #define B_AX_GNT_WL_RFC_S0_SW_VAL BIT(13)
3648 #define B_AX_GNT_WL_RFC_S0_SW_CTRL BIT(12)
3649 #define B_AX_GNT_BT_BB_S0_SW_VAL BIT(11)
3650 #define B_AX_GNT_BT_BB_S0_SW_CTRL BIT(10)
3651 #define B_AX_GNT_WL_BB_S0_SW_VAL BIT(9)
3652 #define B_AX_GNT_WL_BB_S0_SW_CTRL BIT(8)
3653 #define B_AX_LTECOEX_FUN_EN BIT(7)
3654 #define B_AX_LTECOEX_3WIRE_CTRL_MUX BIT(6)
3655 #define B_AX_LTECOEX_OP_MODE_SEL_MASK GENMASK(5, 4)
3656 #define B_AX_LTECOEX_UART_MUX BIT(3)
3661 #define B_AX_WL_RX_CTRL BIT(8)
3662 #define B_AX_GNT_WL_RX_SW_VAL BIT(7)
3663 #define B_AX_GNT_WL_RX_SW_CTRL BIT(6)
3664 #define B_AX_GNT_WL_TX_SW_VAL BIT(5)
3665 #define B_AX_GNT_WL_TX_SW_CTRL BIT(4)
3666 #define B_AX_GNT_BT_RX_SW_VAL BIT(3)
3667 #define B_AX_GNT_BT_RX_SW_CTRL BIT(2)
3668 #define B_AX_GNT_BT_TX_SW_VAL BIT(1)
3669 #define B_AX_GNT_BT_TX_SW_CTRL BIT(0)
3672 #define B_BE_PWC_EV2EF_B BIT(15)
3673 #define B_BE_PWC_EV2EF_S BIT(14)
3674 #define B_BE_PA33V_EN BIT(13)
3675 #define B_BE_PA12V_EN BIT(12)
3676 #define B_BE_PAOOBS33V_EN BIT(11)
3677 #define B_BE_PAOOBS12V_EN BIT(10)
3678 #define B_BE_ISO_RFDIO BIT(9)
3679 #define B_BE_ISO_EB2CORE BIT(8)
3680 #define B_BE_ISO_DIOE BIT(7)
3681 #define B_BE_ISO_WLPON2PP BIT(6)
3682 #define B_BE_ISO_IP2MAC_WA02PP BIT(5)
3683 #define B_BE_ISO_PD2CORE BIT(4)
3684 #define B_BE_ISO_PA2PCIE BIT(3)
3685 #define B_BE_ISO_PAOOBS2PCIE BIT(1)
3686 #define B_BE_ISO_WD2PP BIT(0)
3689 #define B_BE_SOP_ASWRM BIT(31)
3690 #define B_BE_SOP_EASWR BIT(30)
3691 #define B_BE_SOP_PWMM_DSWR BIT(29)
3692 #define B_BE_SOP_EDSWR BIT(28)
3693 #define B_BE_SOP_ACKF BIT(27)
3694 #define B_BE_SOP_ERCK BIT(26)
3695 #define B_BE_SOP_ANA_CLK_DIVISION_2 BIT(25)
3696 #define B_BE_SOP_EXTL BIT(24)
3697 #define B_BE_SOP_OFF_CAPC_EN BIT(23)
3698 #define B_BE_XTAL_OFF_A_DIE BIT(22)
3699 #define B_BE_ROP_SWPR BIT(21)
3700 #define B_BE_DIS_HW_LPLDM BIT(20)
3701 #define B_BE_DIS_HW_LPURLDO BIT(19)
3702 #define B_BE_DIS_WLBT_PDNSUSEN_SOPC BIT(18)
3703 #define B_BE_RDY_SYSPWR BIT(17)
3704 #define B_BE_EN_WLON BIT(16)
3705 #define B_BE_APDM_HPDN BIT(15)
3706 #define B_BE_PSUS_OFF_CAPC_EN BIT(14)
3707 #define B_BE_AFSM_PCIE_SUS_EN BIT(12)
3708 #define B_BE_AFSM_WLSUS_EN BIT(11)
3709 #define B_BE_APFM_SWLPS BIT(10)
3710 #define B_BE_APFM_OFFMAC BIT(9)
3711 #define B_BE_APFN_ONMAC BIT(8)
3712 #define B_BE_CHIP_PDN_EN BIT(7)
3713 #define B_BE_RDY_MACDIS BIT(6)
3716 #define B_BE_CPU_CLK_EN BIT(14)
3717 #define B_BE_SYMR_BE_CLK_EN BIT(13)
3718 #define B_BE_MAC_CLK_EN BIT(11)
3719 #define B_BE_EXT_32K_EN BIT(8)
3720 #define B_BE_WL_CLK_TEST BIT(7)
3721 #define B_BE_LOADER_CLK_EN BIT(5)
3722 #define B_BE_ANA_CLK_DIVISION_2 BIT(1)
3723 #define B_BE_CNTD16V_EN BIT(0)
3726 #define B_BE_OTP_B_PWC_RPT BIT(15)
3727 #define B_BE_OTP_S_PWC_RPT BIT(14)
3728 #define B_BE_OTP_ISO_RPT BIT(13)
3729 #define B_BE_OTP_BURST_RPT BIT(12)
3730 #define B_BE_OTP_AUTOLOAD_RPT BIT(11)
3731 #define B_BE_AUTOLOAD_DIS_A_DIE BIT(6)
3732 #define B_BE_AUTOLOAD_SUS BIT(5)
3733 #define B_BE_AUTOLOAD_DIS BIT(4)
3736 #define B_BE_USB_APHY_PC_DLP_OP BIT(27)
3737 #define B_BE_PCIE_APHY_PC_DLP_OP BIT(26)
3738 #define B_BE_UPHY_POWER_READY_CHK BIT(25)
3739 #define B_BE_CPHY_POWER_READY_CHK BIT(24)
3741 #define B_BE_SYM_PRST_DEBUNC_SEL BIT(21)
3742 #define B_BE_CPHY_AUXCLK_OP BIT(20)
3743 #define B_BE_SOP_OFFUA_PC BIT(19)
3744 #define B_BE_SOP_OFFPOOBS_PC BIT(18)
3745 #define B_BE_PCIE_LAN1_MASK BIT(17)
3746 #define B_BE_PCIE_LAN0_MASK BIT(16)
3747 #define B_BE_DIS_CLK_REGF_GATE BIT(15)
3748 #define B_BE_DIS_CLK_REGE_GATE BIT(14)
3749 #define B_BE_DIS_CLK_REGD_GATE BIT(13)
3750 #define B_BE_DIS_CLK_REGC_GATE BIT(12)
3751 #define B_BE_DIS_CLK_REGB_GATE BIT(11)
3752 #define B_BE_DIS_CLK_REGA_GATE BIT(10)
3753 #define B_BE_DIS_CLK_REG9_GATE BIT(9)
3754 #define B_BE_DIS_CLK_REG8_GATE BIT(8)
3755 #define B_BE_DIS_CLK_REG7_GATE BIT(7)
3756 #define B_BE_DIS_CLK_REG6_GATE BIT(6)
3757 #define B_BE_DIS_CLK_REG5_GATE BIT(5)
3758 #define B_BE_DIS_CLK_REG4_GATE BIT(4)
3759 #define B_BE_DIS_CLK_REG3_GATE BIT(3)
3760 #define B_BE_DIS_CLK_REG2_GATE BIT(2)
3761 #define B_BE_DIS_CLK_REG1_GATE BIT(1)
3762 #define B_BE_DIS_CLK_REG0_GATE BIT(0)
3765 #define B_BE_POW_PC_LDO_PORT1 BIT(3)
3766 #define B_BE_POW_PC_LDO_PORT0 BIT(2)
3767 #define B_BE_POW_PLL_V1 BIT(1)
3768 #define B_BE_POW_POWER_CUT_POW_LDO BIT(0)
3771 #define B_BE_SYM_PADPDN_WL_RFC1_1P3 BIT(6)
3772 #define B_BE_SYM_PADPDN_WL_RFC0_1P3 BIT(5)
3776 #define B_BE_R_SYM_DIS_PCIE_FLR BIT(9)
3777 #define B_BE_R_EN_HRST_PWRON BIT(8)
3778 #define B_BE_LOCK_ALL_EN BIT(7)
3779 #define B_BE_R_DIS_PRST BIT(6)
3780 #define B_BE_WLOCK_1C_BIT6 BIT(5)
3781 #define B_BE_WLOCK_40 BIT(4)
3782 #define B_BE_WLOCK_08 BIT(3)
3783 #define B_BE_WLOCK_04 BIT(2)
3784 #define B_BE_WLOCK_00 BIT(1)
3785 #define B_BE_WLOCK_ALL BIT(0)
3788 #define B_BE_FORCE_MACBBBT_PWR_ON BIT(31)
3789 #define B_BE_R_SYM_WLPOFF_P4_PC_EN BIT(28)
3790 #define B_BE_R_SYM_WLPOFF_P3_PC_EN BIT(27)
3791 #define B_BE_R_SYM_WLPOFF_P2_PC_EN BIT(26)
3792 #define B_BE_R_SYM_WLPOFF_P1_PC_EN BIT(25)
3793 #define B_BE_R_SYM_WLPOFF_PC_EN BIT(24)
3794 #define B_BE_AON_OFF_PC_EN BIT(23)
3795 #define B_BE_R_SYM_WLPON_P3_PC_EN BIT(21)
3796 #define B_BE_R_SYM_WLPON_P2_PC_EN BIT(20)
3797 #define B_BE_R_SYM_WLPON_P1_PC_EN BIT(19)
3798 #define B_BE_R_SYM_WLPON_PC_EN BIT(18)
3799 #define B_BE_R_SYM_WLBBPON1_P1_PC_EN BIT(15)
3800 #define B_BE_R_SYM_WLBBPON1_PC_EN BIT(14)
3801 #define B_BE_R_SYM_WLBBPON_P1_PC_EN BIT(13)
3802 #define B_BE_R_SYM_WLBBPON_PC_EN BIT(12)
3803 #define B_BE_R_SYM_DIS_WPHYBBOFF_PC BIT(10)
3804 #define B_BE_R_SYM_WLBBOFF1_P4_PC_EN BIT(9)
3805 #define B_BE_R_SYM_WLBBOFF1_P3_PC_EN BIT(8)
3806 #define B_BE_R_SYM_WLBBOFF1_P2_PC_EN BIT(7)
3807 #define B_BE_R_SYM_WLBBOFF1_P1_PC_EN BIT(6)
3808 #define B_BE_R_SYM_WLBBOFF1_PC_EN BIT(5)
3809 #define B_BE_R_SYM_WLBBOFF_P4_PC_EN BIT(4)
3810 #define B_BE_R_SYM_WLBBOFF_P3_PC_EN BIT(3)
3811 #define B_BE_R_SYM_WLBBOFF_P2_PC_EN BIT(2)
3812 #define B_BE_R_SYM_WLBBOFF_P1_PC_EN BIT(1)
3813 #define B_BE_R_SYM_WLBBOFF_PC_EN BIT(0)
3816 #define B_BE_R_SYM_WLCMAC0_P4_PC_EN BIT(28)
3817 #define B_BE_R_SYM_WLCMAC0_P3_PC_EN BIT(27)
3818 #define B_BE_R_SYM_WLCMAC0_P2_PC_EN BIT(26)
3819 #define B_BE_R_SYM_WLCMAC0_P1_PC_EN BIT(25)
3820 #define B_BE_R_SYM_WLCMAC0_PC_EN BIT(24)
3821 #define B_BE_DATAMEM_PC3_EN BIT(23)
3822 #define B_BE_DATAMEM_PC2_EN BIT(22)
3823 #define B_BE_DATAMEM_PC1_EN BIT(21)
3824 #define B_BE_DATAMEM_PC_EN BIT(20)
3825 #define B_BE_DMEM7_PC_EN BIT(19)
3826 #define B_BE_DMEM6_PC_EN BIT(18)
3827 #define B_BE_DMEM5_PC_EN BIT(17)
3828 #define B_BE_DMEM4_PC_EN BIT(16)
3829 #define B_BE_DMEM3_PC_EN BIT(15)
3830 #define B_BE_DMEM2_PC_EN BIT(14)
3831 #define B_BE_DMEM1_PC_EN BIT(13)
3832 #define B_BE_IMEM4_PC_EN BIT(12)
3833 #define B_BE_IMEM3_PC_EN BIT(11)
3834 #define B_BE_IMEM2_PC_EN BIT(10)
3835 #define B_BE_IMEM1_PC_EN BIT(9)
3836 #define B_BE_IMEM0_PC_EN BIT(8)
3837 #define B_BE_R_SYM_WLCMAC1_P4_PC_EN BIT(4)
3838 #define B_BE_R_SYM_WLCMAC1_P3_PC_EN BIT(3)
3839 #define B_BE_R_SYM_WLCMAC1_P2_PC_EN BIT(2)
3840 #define B_BE_R_SYM_WLCMAC1_P1_PC_EN BIT(1)
3841 #define B_BE_R_SYM_WLCMAC1_PC_EN BIT(0)
3850 #define B_BE_EF_RDY BIT(29)
3851 #define B_BE_EF_COMP_RESULT BIT(28)
3858 #define B_BE_ISO_BD2PP BIT(31)
3859 #define B_BE_LDOV12B_EN BIT(30)
3860 #define B_BE_CKEN_BT BIT(29)
3861 #define B_BE_FEN_BT BIT(28)
3862 #define B_BE_BTCPU_BOOTSEL BIT(27)
3863 #define B_BE_SPI_SPEEDUP BIT(26)
3864 #define B_BE_BT_LDO_MODE BIT(25)
3865 #define B_BE_ISO_BTPON2PP BIT(22)
3866 #define B_BE_BT_FUNC_EN BIT(18)
3867 #define B_BE_BT_HWPDN_SL BIT(17)
3868 #define B_BE_BT_DISN_EN BIT(16)
3869 #define B_BE_SDM_SRC_SEL BIT(12)
3870 #define B_BE_ISO_BA2PP BIT(11)
3871 #define B_BE_BT_AFE_LDO_EN BIT(10)
3872 #define B_BE_BT_AFE_PLL_EN BIT(9)
3873 #define B_BE_WLAN_32K_SEL BIT(6)
3874 #define B_BE_WL_DRV_EXIST_IDX BIT(5)
3875 #define B_BE_DOP_EHPAD BIT(4)
3876 #define B_BE_WL_FUNC_EN BIT(2)
3877 #define B_BE_WL_HWPDN_SL BIT(1)
3878 #define B_BE_WL_HWPDN_EN BIT(0)
3881 #define B_BE_MCM_FLASH_EN BIT(28)
3882 #define B_BE_PCIE_SEC_LOAD BIT(26)
3883 #define B_BE_PCIE_SER_RSTB BIT(25)
3884 #define B_BE_PCIE_SEC_LOAD_CLR BIT(24)
3885 #define B_BE_SDIO_CMD_SW_RST BIT(20)
3886 #define B_BE_SDIO_INT_POLARITY BIT(19)
3887 #define B_BE_SDIO_OFF_EN BIT(17)
3888 #define B_BE_SDIO_ON_EN BIT(16)
3889 #define B_BE_PCIE_DIS_L2__CTRL_LDO_HCI BIT(15)
3890 #define B_BE_PCIE_DIS_L2_RTK_PERST BIT(14)
3891 #define B_BE_PCIE_FORCE_PWR_NGAT BIT(13)
3892 #define B_BE_PCIE_FORCE_IBX_EN BIT(12)
3893 #define B_BE_PCIE_AUXCLK_GATE BIT(11)
3894 #define B_BE_PCIE_WAIT_TIMEOUT_EVENT BIT(10)
3895 #define B_BE_PCIE_WAIT_TIME BIT(9)
3896 #define B_BE_L1OFF_TO_L0_RESUME_EVT BIT(8)
3897 #define B_BE_USBA_FORCE_PWR_NGAT BIT(7)
3898 #define B_BE_USBD_FORCE_PWR_NGAT BIT(6)
3899 #define B_BE_BT_CTRL_USB_PWR BIT(5)
3900 #define B_BE_USB_D_STATE_HOLD BIT(4)
3901 #define B_BE_R_BE_FORCE_DP BIT(3)
3902 #define B_BE_R_BE_DP_MODE BIT(2)
3903 #define B_BE_RES_USB_MASS_STORAGE_DESC BIT(1)
3904 #define B_BE_USB_WAIT_TIME BIT(0)
3907 #define B_BE_HCI_WLAN_IO_ST BIT(31)
3908 #define B_BE_HCI_WLAN_IO_EN BIT(28)
3909 #define B_BE_HAXIDMA_IO_ST BIT(27)
3910 #define B_BE_HAXIDMA_BACKUP_RESTORE_ST BIT(26)
3911 #define B_BE_HAXIDMA_IO_EN BIT(24)
3912 #define B_BE_EN_PCIE_WAKE BIT(23)
3913 #define B_BE_SDIO_PAD_H3L1 BIT(22)
3914 #define B_BE_USBMAC_ANACLK_SW BIT(21)
3915 #define B_BE_PCIE_CPHY_CCK_XTAL_SEL BIT(20)
3916 #define B_BE_SDIO_DATA_PAD_SMT BIT(19)
3917 #define B_BE_SDIO_PAD_E5 BIT(18)
3918 #define B_BE_FORCE_PCIE_AUXCLK BIT(17)
3919 #define B_BE_HCI_LA_ADDR_MAP BIT(16)
3920 #define B_BE_HCI_LA_GLO_RST BIT(15)
3921 #define B_BE_USB3_SUS_DIS BIT(14)
3922 #define B_BE_NOPWR_CTRL_SEL BIT(13)
3923 #define B_BE_USB_HOST_PWR_OFF_EN BIT(12)
3924 #define B_BE_SYM_LPS_BLOCK_EN BIT(11)
3925 #define B_BE_USB_LPM_ACT_EN BIT(10)
3926 #define B_BE_USB_LPM_NY BIT(9)
3927 #define B_BE_USB2_SUS_DIS BIT(8)
3928 #define B_BE_SDIO_PAD_E_MASK GENMASK(7, 5)
3929 #define B_BE_USB_LPPLL_EN BIT(4)
3930 #define B_BE_USB1_1_USB2_0_DECISION BIT(3)
3931 #define B_BE_ROP_SW15 BIT(2)
3932 #define B_BE_PCI_CKRDY_OPT BIT(1)
3933 #define B_BE_PCI_VAUX_EN BIT(0)
3936 #define B_BE_R_SYM_ISO_DMEM62PP BIT(29)
3937 #define B_BE_R_SYM_ISO_DMEM52PP BIT(28)
3938 #define B_BE_R_SYM_ISO_DMEM42PP BIT(27)
3939 #define B_BE_R_SYM_ISO_DMEM32PP BIT(26)
3940 #define B_BE_R_SYM_ISO_DMEM22PP BIT(25)
3941 #define B_BE_R_SYM_ISO_DMEM12PP BIT(24)
3942 #define B_BE_R_SYM_ISO_IMEM42PP BIT(22)
3943 #define B_BE_R_SYM_ISO_IMEM32PP BIT(21)
3944 #define B_BE_R_SYM_ISO_IMEM22PP BIT(20)
3945 #define B_BE_R_SYM_ISO_IMEM12PP BIT(19)
3946 #define B_BE_R_SYM_ISO_IMEM02PP BIT(18)
3947 #define B_BE_R_SYM_ISO_AON_OFF2PP BIT(15)
3948 #define B_BE_R_SYM_PWC_HCILA BIT(13)
3949 #define B_BE_R_SYM_PWC_PD12V BIT(12)
3950 #define B_BE_R_SYM_PWC_UD12V BIT(11)
3951 #define B_BE_R_SYM_PWC_BTBRG BIT(10)
3952 #define B_BE_R_SYM_LDOBTSDIO_EN BIT(9)
3953 #define B_BE_R_SYM_LDOSPDIO_EN BIT(8)
3954 #define B_BE_R_SYM_ISO_HCILA BIT(4)
3955 #define B_BE_R_SYM_ISO_BTBRG2PP BIT(2)
3956 #define B_BE_R_SYM_ISO_BTSDIO2PP BIT(1)
3957 #define B_BE_R_SYM_ISO_SPDIO2PP BIT(0)
3960 #define B_BE_R_SYM_FEN_WLMACOFF BIT(31)
3961 #define B_BE_R_SYM_ISO_WA12PP BIT(28)
3962 #define B_BE_R_SYM_ISO_CMAC12PP BIT(25)
3963 #define B_BE_R_SYM_ISO_CMAC02PP BIT(24)
3964 #define B_BE_R_SYM_ISO_ADDA_P32PP BIT(23)
3965 #define B_BE_R_SYM_ISO_ADDA_P22PP BIT(22)
3966 #define B_BE_R_SYM_ISO_ADDA_P12PP BIT(21)
3967 #define B_BE_R_SYM_ISO_ADDA_P02PP BIT(20)
3968 #define B_BE_CMAC1_FEN BIT(17)
3969 #define B_BE_CMAC0_FEN BIT(16)
3970 #define B_BE_SYM_ISO_BBPON12PP BIT(13)
3971 #define B_BE_SYM_ISO_BB12PP BIT(12)
3972 #define B_BE_BOOT_RDY1 BIT(10)
3973 #define B_BE_FEN_BB1_IP_RSTN BIT(9)
3974 #define B_BE_FEN_BB1PLAT_RSTB BIT(8)
3975 #define B_BE_SYM_ISO_BBPON02PP BIT(5)
3976 #define B_BE_SYM_ISO_BB02PP BIT(4)
3977 #define B_BE_BOOT_RDY0 BIT(2)
3978 #define B_BE_FEN_BB_IP_RSTN BIT(1)
3979 #define B_BE_FEN_BBPLAT_RSTB BIT(0)
3982 #define B_BE_HOLD_AFTER_RESET BIT(11)
3983 #define B_BE_SYM_WLPLT_MEM_MUX_EN BIT(10)
3984 #define B_BE_WCPU_WARM_EN BIT(9)
3985 #define B_BE_SPIC_EN BIT(8)
3986 #define B_BE_UART_EN BIT(7)
3987 #define B_BE_IDDMA_EN BIT(6)
3988 #define B_BE_IPSEC_EN BIT(5)
3989 #define B_BE_HIOE_EN BIT(4)
3990 #define B_BE_APB_WRAP_EN BIT(2)
3991 #define B_BE_WCPU_EN BIT(1)
3992 #define B_BE_PLATFORM_EN BIT(0)
3995 #define B_BE_LPSOP_BBMEMDS BIT(30)
3996 #define B_BE_LPSOP_BBOFF BIT(29)
3997 #define B_BE_LPSOP_MACOFF BIT(28)
3998 #define B_BE_LPSOP_OFF_CAPC_EN BIT(27)
3999 #define B_BE_LPSOP_MEM_DS BIT(26)
4000 #define B_BE_LPSOP_XTALM_LPS BIT(23)
4001 #define B_BE_LPSOP_XTAL BIT(22)
4002 #define B_BE_LPSOP_ACLK_DIV_2 BIT(21)
4003 #define B_BE_LPSOP_ACLK_SEL BIT(20)
4004 #define B_BE_LPSOP_ASWRM BIT(17)
4005 #define B_BE_LPSOP_ASWR BIT(16)
4007 #define B_BE_LPSOP_DSWRSD BIT(10)
4008 #define B_BE_LPSOP_DSWRM BIT(9)
4009 #define B_BE_LPSOP_DSWR BIT(8)
4011 #define B_BE_FORCE_LEAVE_LPS BIT(3)
4012 #define B_BE_LPSOP_OLDSD BIT(2)
4013 #define B_BE_DIS_WLBT_LPSEN_LOPC BIT(1)
4014 #define B_BE_WL_LPS_EN BIT(0)
4017 #define B_BE_LPSROP_DMEM5_RSU_EN BIT(31)
4018 #define B_BE_LPSROP_DMEM4_RSU_EN BIT(30)
4019 #define B_BE_LPSROP_DMEM3_RSU_EN BIT(29)
4020 #define B_BE_LPSROP_DMEM2_RSU_EN BIT(28)
4021 #define B_BE_LPSROP_DMEM1_RSU_EN BIT(27)
4022 #define B_BE_LPSROP_DMEM0_RSU_EN BIT(26)
4023 #define B_BE_LPSROP_IMEM5_RSU_EN BIT(25)
4024 #define B_BE_LPSROP_IMEM4_RSU_EN BIT(24)
4025 #define B_BE_LPSROP_IMEM3_RSU_EN BIT(23)
4026 #define B_BE_LPSROP_IMEM2_RSU_EN BIT(22)
4027 #define B_BE_LPSROP_IMEM1_RSU_EN BIT(21)
4028 #define B_BE_LPSROP_IMEM0_RSU_EN BIT(20)
4029 #define B_BE_LPSROP_BB1_W_BB0 BIT(14)
4030 #define B_BE_LPSROP_CMAC1 BIT(13)
4031 #define B_BE_LPSROP_CMAC0 BIT(12)
4032 #define B_BE_LPSROP_XTALM BIT(11)
4033 #define B_BE_LPSROP_PLLM BIT(10)
4034 #define B_BE_LPSROP_HIOE BIT(9)
4035 #define B_BE_LPSROP_CPU BIT(8)
4036 #define B_BE_LPSROP_LOWPWRPLL BIT(7)
4037 #define B_BE_LPSROP_DSWRSD_SEL_MASK GENMASK(5, 4)
4040 #define B_BE_EF_ENT BIT(31)
4041 #define B_BE_EF_TCOLUMN_EN BIT(29)
4042 #define B_BE_BT_OTP_PWC_DIS BIT(28)
4043 #define B_BE_EF_RDT BIT(27)
4044 #define B_BE_R_SYM_AUTOLOAD_WITH_PMC_SEL BIT(24)
4046 #define B_BE_EF_BURST BIT(19)
4048 #define B_BE_EF_TROW_EN BIT(15)
4049 #define B_BE_EF_ERR_FLAG BIT(14)
4050 #define B_BE_EF_FBURST_DIS BIT(13)
4051 #define B_BE_EF_HT_SEL BIT(12)
4052 #define B_BE_EF_DSB_EN BIT(11)
4057 #define B_BE_DIS_IOWRAP_TIMEOUT BIT(16)
4058 #define B_BE_STOP_WL_PMC BIT(9)
4059 #define B_BE_STOP_SYM_PMC BIT(8)
4060 #define B_BE_SYM_REG_PCIE_WRMSK BIT(7)
4061 #define B_BE_BT_ACCESS_WL_PAGE0 BIT(6)
4062 #define B_BE_R_BE_RST_WLPMC BIT(5)
4063 #define B_BE_R_BE_RST_PD12N BIT(4)
4064 #define B_BE_SYSON_DIS_WLR_BE_WRMSK BIT(3)
4065 #define B_BE_SYSON_DIS_PMCR_BE_WRMSK BIT(2)
4069 #define B_BE_DMEM5_WLMCU_DS BIT(31)
4070 #define B_BE_DMEM4_WLMCU_DS BIT(30)
4071 #define B_BE_DMEM3_WLMCU_DS BIT(29)
4072 #define B_BE_DMEM2_WLMCU_DS BIT(28)
4073 #define B_BE_DMEM1_WLMCU_DS BIT(27)
4074 #define B_BE_DMEM0_WLMCU_DS BIT(26)
4075 #define B_BE_IMEM5_WLMCU_DS BIT(25)
4076 #define B_BE_IMEM4_WLMCU_DS BIT(24)
4077 #define B_BE_IMEM3_WLMCU_DS BIT(23)
4078 #define B_BE_IMEM2_WLMCU_DS BIT(22)
4079 #define B_BE_IMEM1_WLMCU_DS BIT(21)
4080 #define B_BE_IMEM0_WLMCU_DS BIT(20)
4081 #define B_BE_MEM_BBMCU1_DS BIT(19)
4082 #define B_BE_MEM_BBMCU0_DS_V1 BIT(17)
4083 #define B_BE_MEM_BT_DS BIT(10)
4084 #define B_BE_MEM_SDIO_LS BIT(9)
4085 #define B_BE_MEM_SDIO_DS BIT(8)
4086 #define B_BE_MEM_USB_LS BIT(7)
4087 #define B_BE_MEM_USB_DS BIT(6)
4088 #define B_BE_MEM_PCI_LS BIT(5)
4089 #define B_BE_MEM_PCI_DS BIT(4)
4090 #define B_BE_MEM_WLMAC_LS BIT(3)
4095 #define B_BE_PCIE_MIO_ASIF BIT(15)
4096 #define B_BE_PCIE_MIO_BYIOREG BIT(13)
4097 #define B_BE_PCIE_MIO_RE BIT(12)
4105 #define B_BE_HALT_H2C_TRIGGER BIT(0)
4108 #define B_BE_HALT_C2H_TRIGGER BIT(0)
4118 #define B_BE_WDT_DATACPU_WAKE_PCIE_EN BIT(12)
4119 #define B_BE_WDT_DATACPU_WAKE_USB_EN BIT(11)
4120 #define B_BE_WDT_WAKE_PCIE_EN BIT(10)
4121 #define B_BE_WDT_WAKE_USB_EN BIT(9)
4122 #define B_BE_SYM_DIS_HC_ACCESS_MAC BIT(8)
4123 #define B_BE_LPS_STATUS BIT(3)
4124 #define B_BE_HCI_TXDMA_BUSY BIT(2)
4129 #define B_BE_FS_RPWM_INT_EN_V1 BIT(24)
4130 #define B_BE_PCIE_HOTRST_EN BIT(22)
4131 #define B_BE_PCIE_SER_TIMEOUT_INDIC_EN BIT(21)
4132 #define B_BE_PCIE_RXI300_SLVTOUT_INDIC_EN BIT(20)
4133 #define B_BE_AON_PCIE_FLR_INT_EN BIT(19)
4134 #define B_BE_PCIE_ERR_INDIC_INT_EN BIT(18)
4135 #define B_BE_SDIO_ERR_INDIC_INT_EN BIT(17)
4136 #define B_BE_USB_ERR_INDIC_INT_EN BIT(16)
4137 #define B_BE_FS_GPIO27_INT_EN BIT(11)
4138 #define B_BE_FS_GPIO26_INT_EN BIT(10)
4139 #define B_BE_FS_GPIO25_INT_EN BIT(9)
4140 #define B_BE_FS_GPIO24_INT_EN BIT(8)
4141 #define B_BE_FS_GPIO23_INT_EN BIT(7)
4142 #define B_BE_FS_GPIO22_INT_EN BIT(6)
4143 #define B_BE_FS_GPIO21_INT_EN BIT(5)
4144 #define B_BE_FS_GPIO20_INT_EN BIT(4)
4145 #define B_BE_FS_GPIO19_INT_EN BIT(3)
4146 #define B_BE_FS_GPIO18_INT_EN BIT(2)
4147 #define B_BE_FS_GPIO17_INT_EN BIT(1)
4148 #define B_BE_FS_GPIO16_INT_EN BIT(0)
4151 #define B_BE_WDT_DATACPU_TIMEOUT_INT_EN BIT(25)
4152 #define B_BE_HALT_D2H_INT_EN BIT(24)
4153 #define B_BE_WDT_TIMEOUT_INT_EN BIT(22)
4154 #define B_BE_HALT_C2H_INT_EN BIT(21)
4155 #define B_BE_RON_INT_EN BIT(20)
4156 #define B_BE_PDNINT_EN BIT(19)
4157 #define B_BE_SPSANA_OCP_INT_EN BIT(18)
4158 #define B_BE_SPS_OCP_INT_EN BIT(17)
4159 #define B_BE_BTON_STS_UPDATE_INT_EN BIT(16)
4160 #define B_BE_GPIOF_INT_EN BIT(15)
4161 #define B_BE_GPIOE_INT_EN BIT(14)
4162 #define B_BE_GPIOD_INT_EN BIT(13)
4163 #define B_BE_GPIOC_INT_EN BIT(12)
4164 #define B_BE_GPIOB_INT_EN BIT(11)
4165 #define B_BE_GPIOA_INT_EN BIT(10)
4166 #define B_BE_GPIO9_INT_EN BIT(9)
4167 #define B_BE_GPIO8_INT_EN BIT(8)
4168 #define B_BE_GPIO7_INT_EN BIT(7)
4169 #define B_BE_GPIO6_INT_EN BIT(6)
4170 #define B_BE_GPIO5_INT_EN BIT(5)
4171 #define B_BE_GPIO4_INT_EN BIT(4)
4172 #define B_BE_GPIO3_INT_EN BIT(3)
4173 #define B_BE_GPIO2_INT_EN BIT(2)
4174 #define B_BE_GPIO1_INT_EN BIT(1)
4175 #define B_BE_GPIO0_INT_EN BIT(0)
4178 #define B_BE_WDT_DATACPU_TIMEOUT_INT BIT(25)
4179 #define B_BE_HALT_D2H_INT BIT(24)
4180 #define B_BE_WDT_TIMEOUT_INT BIT(22)
4181 #define B_BE_HALT_C2H_INT BIT(21)
4182 #define B_BE_RON_INT BIT(20)
4183 #define B_BE_PDNINT BIT(19)
4184 #define B_BE_SPSANA_OCP_INT BIT(18)
4185 #define B_BE_SPS_OCP_INT BIT(17)
4186 #define B_BE_BTON_STS_UPDATE_INT BIT(16)
4187 #define B_BE_GPIOF_INT BIT(15)
4188 #define B_BE_GPIOE_INT BIT(14)
4189 #define B_BE_GPIOD_INT BIT(13)
4190 #define B_BE_GPIOC_INT BIT(12)
4191 #define B_BE_GPIOB_INT BIT(11)
4192 #define B_BE_GPIOA_INT BIT(10)
4193 #define B_BE_GPIO9_INT BIT(9)
4194 #define B_BE_GPIO8_INT BIT(8)
4195 #define B_BE_GPIO7_INT BIT(7)
4196 #define B_BE_GPIO6_INT BIT(6)
4197 #define B_BE_GPIO5_INT BIT(5)
4198 #define B_BE_GPIO4_INT BIT(4)
4199 #define B_BE_GPIO3_INT BIT(3)
4200 #define B_BE_GPIO2_INT BIT(2)
4201 #define B_BE_GPIO1_INT BIT(1)
4202 #define B_BE_GPIO0_INT BIT(0)
4207 #define B_BE_WDT_PLT_RST_EN BIT(17)
4208 #define B_BE_FW_SEC_AUTH_DONE BIT(14)
4209 #define B_BE_FW_CPU_UTIL_STS_EN BIT(13)
4210 #define B_BE_BBMCU1_FWDL_EN BIT(12)
4211 #define B_BE_BBMCU0_FWDL_EN BIT(11)
4212 #define B_BE_DATACPU_FWDL_EN BIT(10)
4213 #define B_BE_WLANCPU_FWDL_EN BIT(9)
4214 #define B_BE_WCPU_ROM_CUT_GET BIT(8)
4217 #define B_BE_H2C_PATH_RDY BIT(1)
4218 #define B_BE_DLFW_PATH_RDY BIT(0)
4224 #define B_BE_EN_32K BIT(31)
4231 #define B_BE_NULL_POINTER_INDC BIT(7)
4232 #define B_BE_ROM_ASSERT_INDC BIT(6)
4233 #define B_BE_RAM_ASSERT_INDC BIT(5)
4234 #define B_BE_FW_IMAGE_TYPE BIT(4)
4235 #define B_BE_UDM0_TRAP_LOOP_CTRL BIT(2)
4236 #define B_BE_UDM0_SEND_HALTC2H_CTRL BIT(1)
4237 #define B_BE_UDM0_DBG_MODE_CTRL BIT(0)
4255 #define B_BE_REG_CP_ICPX2 BIT(14)
4258 #define B_BE_REG_IB_PI_MASK GENMASK(5, 4)
4259 #define B_BE_REG_CK_DEBUG_BT BIT(3)
4260 #define B_BE_EN_PC_LDO BIT(2)
4265 #define B_BE_REG_CK_MON_CK960M_EN BIT(28)
4266 #define B_BE_REG_XTAL_FREQ_SEL BIT(27)
4267 #define B_BE_REG_XTAL_EDGE_SEL BIT(26)
4268 #define B_BE_REG_VCO_KVCO BIT(25)
4269 #define B_BE_REG_SDM_EDGE_SEL BIT(24)
4270 #define B_BE_REG_SDM_CK_SEL BIT(23)
4271 #define B_BE_REG_SDM_CK_GATED BIT(22)
4272 #define B_BE_REG_PFD_RESET_GATED BIT(21)
4276 #define B_BE_REG_LPF_C2_FAST_MASK GENMASK(7, 5)
4288 #define B_BE_REG_CK_DEBUG_BT_MON BIT(15)
4289 #define B_BE_REG_BT_CLK_BUF_POWER BIT(14)
4290 #define B_BE_REG_BG_OUT_BTADC_V1 BIT(13)
4291 #define B_BE_REG_SEL_V18 BIT(11)
4292 #define B_BE_REG_FRAC_EN BIT(10)
4293 #define B_BE_REG_CK1920M_EN BIT(9)
4294 #define B_BE_REG_CK1280M_EN BIT(8)
4296 #define B_BE_REG_09LDO_SEL_MASK GENMASK(5, 4)
4297 #define B_BE_REG_VC_TH BIT(3)
4298 #define B_BE_REG_VC_TL BIT(2)
4299 #define B_BE_REG_CK40M_EN BIT(1)
4300 #define B_BE_REG_CK640M_EN BIT(0)
4303 #define B_BE_WL_XTAL_SI_CMD_POLL BIT(31)
4315 #define B_BE_SDIO_HCISYS_PWR_STE_MASK GENMASK(5, 4)
4324 #define B_BE_DCPU_SYM_DPLT_MEM_MUX_EN BIT(10)
4325 #define B_BE_DCPU_WARM_EN BIT(9)
4326 #define B_BE_DCPU_UART_EN BIT(7)
4327 #define B_BE_DCPU_IDDMA_EN BIT(6)
4328 #define B_BE_DCPU_APB_WRAP_EN BIT(2)
4329 #define B_BE_DCPU_EN BIT(1)
4330 #define B_BE_DCPU_PLATFORM_EN BIT(0)
4333 #define B_BE_PL_AXIDMA_RRESP_ERR_MASK BIT(6)
4334 #define B_BE_PL_AXIDMA_BRESP_ERR_MASK BIT(5)
4335 #define B_BE_PL_AXIDMA_FC_ERR_MASK BIT(4)
4336 #define B_BE_PL_AXIDMA_TXBD_LEN0_MASK BIT(3)
4337 #define B_BE_PL_AXIDMA_TXBD_4KBOUD_LENERR_MASK BIT(2)
4338 #define B_BE_PL_AXIDMA_TXBD_RX_STUCK_MASK BIT(1)
4339 #define B_BE_PL_AXIDMA_TXBD_TX_STUCK_MASK BIT(0)
4352 #define B_BE_PL_AXIDMA_RRESP_ERR BIT(6)
4353 #define B_BE_PL_AXIDMA_BRESP_ERR BIT(5)
4354 #define B_BE_PL_AXIDMA_FC_ERR BIT(4)
4355 #define B_BE_PL_AXIDMA_TXBD_LEN0 BIT(3)
4356 #define B_BE_PL_AXIDMA_TXBD_4KBOUD_LENERR BIT(2)
4357 #define B_BE_PL_AXIDMA_TXBD_RX_STUCK BIT(1)
4358 #define B_BE_PL_AXIDMA_TXBD_TX_STUCK BIT(0)
4363 #define B_BE_WLAN_WDT_TIMEOUT BIT(31)
4364 #define B_BE_WLAN_WDT_TIMER_CLEAR BIT(4)
4365 #define B_BE_WLAN_WDT_BYPASS BIT(1)
4366 #define B_BE_WLAN_WDT_ENABLE BIT(0)
4369 #define B_BE_AXIDMA_WDT_TIMEOUT BIT(31)
4370 #define B_BE_AXIDMA_WDT_TIMER_CLEAR BIT(4)
4371 #define B_BE_AXIDMA_WDT_BYPASS BIT(1)
4372 #define B_BE_AXIDMA_WDT_ENABLE BIT(0)
4375 #define B_BE_AON_WDT_TIMEOUT BIT(31)
4376 #define B_BE_AON_WDT_TIMER_CLEAR BIT(4)
4377 #define B_BE_AON_WDT_BYPASS BIT(1)
4378 #define B_BE_AON_WDT_ENABLE BIT(0)
4393 #define B_BE_LOCAL_WDT_TIMEOUT BIT(31)
4394 #define B_BE_LOCAL_WDT_TIMER_CLEAR BIT(4)
4395 #define B_BE_LOCAL_WDT_BYPASS BIT(1)
4396 #define B_BE_LOCAL_WDT_ENABLE BIT(0)
4399 #define B_BE_MDIO_WDT_TIMEOUT BIT(31)
4400 #define B_BE_MDIO_WDT_TIMER_CLEAR BIT(4)
4401 #define B_BE_MDIO_WDT_BYPASS BIT(1)
4402 #define B_BE_MDIO_WDT_ENABLE BIT(0)
4405 #define B_BE_LA_MODE_WDT_TIMEOUT BIT(31)
4406 #define B_BE_LA_MODE_WDT_TIMER_CLEAR BIT(4)
4407 #define B_BE_LA_MODE_WDT_BYPASS BIT(1)
4408 #define B_BE_LA_MODE_WDT_ENABLE BIT(0)
4411 #define B_BE_WDT_AR_TIMEOUT BIT(31)
4412 #define B_BE_WDT_AR_TIMER_CLEAR BIT(4)
4413 #define B_BE_WDT_AR_BYPASS BIT(1)
4414 #define B_BE_WDT_AR_ENABLE BIT(0)
4417 #define B_BE_WDT_AW_TIMEOUT BIT(31)
4418 #define B_BE_WDT_AW_TIMER_CLEAR BIT(4)
4419 #define B_BE_WDT_AW_BYPASS BIT(1)
4420 #define B_BE_WDT_AW_ENABLE BIT(0)
4423 #define B_BE_WDT_W_TIMEOUT BIT(31)
4424 #define B_BE_WDT_W_TIMER_CLEAR BIT(4)
4425 #define B_BE_WDT_W_BYPASS BIT(1)
4426 #define B_BE_WDT_W_ENABLE BIT(0)
4429 #define B_BE_WDT_B_TIMEOUT BIT(31)
4430 #define B_BE_WDT_B_TIMER_CLEAR BIT(4)
4431 #define B_BE_WDT_B_BYPASS BIT(1)
4432 #define B_BE_WDT_B_ENABLE BIT(0)
4435 #define B_BE_WDT_R_TIMEOUT BIT(31)
4436 #define B_BE_WDT_R_TIMER_CLEAR BIT(4)
4437 #define B_BE_WDT_R_BYPASS BIT(1)
4438 #define B_BE_WDT_R_ENABLE BIT(0)
4441 #define B_BE_ENABLE_LTR_CTL_DECISION BIT(31)
4442 #define B_BE_LAT_LTR_IDX_DRV_VLD_V1 BIT(24)
4444 #define B_BE_LAT_LTR_IDX_FW_VLD_V1 BIT(21)
4446 #define B_BE_LAT_LTR_IDX_HW_VLD_V1 BIT(18)
4449 #define B_BE_LTR_REQ_DRV_V1 BIT(13)
4452 #define B_BE_LTR_DRV_DEC_EN_V1 BIT(6)
4453 #define B_BE_LTR_FW_DEC_EN_V1 BIT(5)
4454 #define B_BE_LTR_HW_DEC_EN_V1 BIT(4)
4471 #define B_BE_H2CREG_TRIGGER BIT(0)
4473 #define B_BE_C2HREG_TRIGGER BIT(0)
4476 #define B_BE_HCI_CR_PROTECT BIT(31)
4477 #define B_BE_HCI_TRXBUF_EN BIT(2)
4478 #define B_BE_HCI_RXDMA_EN BIT(1)
4479 #define B_BE_HCI_TXDMA_EN BIT(0)
4485 #define B_BE_DMAC_CRPRT BIT(31)
4486 #define B_BE_MAC_FUNC_EN BIT(30)
4487 #define B_BE_DMAC_FUNC_EN BIT(29)
4488 #define B_BE_MPDU_PROC_EN BIT(28)
4489 #define B_BE_WD_RLS_EN BIT(27)
4490 #define B_BE_DLE_WDE_EN BIT(26)
4491 #define B_BE_TXPKT_CTRL_EN BIT(25)
4492 #define B_BE_STA_SCH_EN BIT(24)
4493 #define B_BE_DLE_PLE_EN BIT(23)
4494 #define B_BE_PKT_BUF_EN BIT(22)
4495 #define B_BE_DMAC_TBL_EN BIT(21)
4496 #define B_BE_PKT_IN_EN BIT(20)
4497 #define B_BE_DLE_CPUIO_EN BIT(19)
4498 #define B_BE_DISPATCHER_EN BIT(18)
4499 #define B_BE_BBRPT_EN BIT(17)
4500 #define B_BE_MAC_SEC_EN BIT(16)
4501 #define B_BE_DMACREG_GCKEN BIT(15)
4502 #define B_BE_H_AXIDMA_EN BIT(14)
4503 #define B_BE_DMAC_MLO_EN BIT(11)
4504 #define B_BE_PLRLS_EN BIT(10)
4505 #define B_BE_P_AXIDMA_EN BIT(9)
4506 #define B_BE_DLE_DATACPUIO_EN BIT(8)
4507 #define B_BE_LTR_CTL_EN BIT(7)
4510 #define B_BE_MAC_CKEN BIT(30)
4511 #define B_BE_DMAC_CKEN BIT(29)
4512 #define B_BE_MPDU_CKEN BIT(28)
4513 #define B_BE_WD_RLS_CLK_EN BIT(27)
4514 #define B_BE_DLE_WDE_CLK_EN BIT(26)
4515 #define B_BE_TXPKT_CTRL_CLK_EN BIT(25)
4516 #define B_BE_STA_SCH_CLK_EN BIT(24)
4517 #define B_BE_DLE_PLE_CLK_EN BIT(23)
4518 #define B_BE_PKTBUF_CKEN BIT(22)
4519 #define B_BE_DMAC_TABLE_CLK_EN BIT(21)
4520 #define B_BE_PKT_IN_CLK_EN BIT(20)
4521 #define B_BE_DLE_CPUIO_CLK_EN BIT(19)
4522 #define B_BE_DISPATCHER_CLK_EN BIT(18)
4523 #define B_BE_BBRPT_CLK_EN BIT(17)
4524 #define B_BE_MAC_SEC_CLK_EN BIT(16)
4525 #define B_BE_H_AXIDMA_CKEN BIT(14)
4526 #define B_BE_DMAC_MLO_CKEN BIT(11)
4527 #define B_BE_PLRLS_CKEN BIT(10)
4528 #define B_BE_P_AXIDMA_CKEN BIT(9)
4529 #define B_BE_DLE_DATACPUIO_CKEN BIT(8)
4532 #define B_BE_LTR_REQ_FW BIT(18)
4535 #define B_BE_LTR_WD_NOEMP_CHK BIT(1)
4536 #define B_BE_LTR_HW_EN BIT(0)
4543 #define B_BE_EN_LTR_CMAC_RX_USE_PG_CHK BIT(3)
4544 #define B_BE_EN_LTR_WD_NON_EMPTY_CHK BIT(2)
4545 #define B_BE_EN_LTR_HAXIDMA_TX_IDLE_CHK BIT(1)
4546 #define B_BE_EN_LTR_HAXIDMA_RX_IDLE_CHK BIT(0)
4553 #define B_BE_HWAMSDU_PADDING_MODE BIT(31)
4555 #define B_BE_DMAC_ADDR_MODE BIT(12)
4556 #define B_BE_DMAC_CTRL_INFO_SER_IO BIT(11)
4568 #define B_BE_DMAC_BB_CTRL_39 BIT(31)
4569 #define B_BE_DMAC_BB_CTRL_38 BIT(30)
4570 #define B_BE_DMAC_BB_CTRL_37 BIT(29)
4571 #define B_BE_DMAC_BB_CTRL_36 BIT(28)
4572 #define B_BE_DMAC_BB_CTRL_35 BIT(27)
4573 #define B_BE_DMAC_BB_CTRL_34 BIT(26)
4574 #define B_BE_DMAC_BB_CTRL_33 BIT(25)
4575 #define B_BE_DMAC_BB_CTRL_32 BIT(24)
4576 #define B_BE_DMAC_BB_CTRL_31 BIT(23)
4577 #define B_BE_DMAC_BB_CTRL_30 BIT(22)
4578 #define B_BE_DMAC_BB_CTRL_29 BIT(21)
4579 #define B_BE_DMAC_BB_CTRL_28 BIT(20)
4580 #define B_BE_DMAC_BB_CTRL_27 BIT(19)
4581 #define B_BE_DMAC_BB_CTRL_26 BIT(18)
4582 #define B_BE_DMAC_BB_CTRL_25 BIT(17)
4583 #define B_BE_DMAC_BB_CTRL_24 BIT(16)
4584 #define B_BE_DMAC_BB_CTRL_23 BIT(15)
4585 #define B_BE_DMAC_BB_CTRL_22 BIT(14)
4586 #define B_BE_DMAC_BB_CTRL_21 BIT(13)
4587 #define B_BE_DMAC_BB_CTRL_20 BIT(12)
4588 #define B_BE_DMAC_BB_CTRL_19 BIT(11)
4589 #define B_BE_DMAC_BB_CTRL_18 BIT(10)
4590 #define B_BE_DMAC_BB_CTRL_17 BIT(9)
4591 #define B_BE_DMAC_BB_CTRL_16 BIT(8)
4592 #define B_BE_DMAC_BB_CTRL_15 BIT(7)
4593 #define B_BE_DMAC_BB_CTRL_14 BIT(6)
4594 #define B_BE_DMAC_BB_CTRL_13 BIT(5)
4595 #define B_BE_DMAC_BB_CTRL_12 BIT(4)
4596 #define B_BE_DMAC_BB_CTRL_11 BIT(3)
4597 #define B_BE_DMAC_BB_CTRL_10 BIT(2)
4598 #define B_BE_DMAC_BB_CTRL_9 BIT(1)
4599 #define B_BE_DMAC_BB_CTRL_8 BIT(0)
4602 #define B_BE_PLE_EMPTY_QTA_DMAC_H2D BIT(27)
4603 #define B_BE_PLE_EMPTY_QTA_DMAC_CPUIO BIT(26)
4604 #define B_BE_PLE_EMPTY_QTA_DMAC_MPDU_TX BIT(25)
4605 #define B_BE_PLE_EMPTY_QTA_DMAC_WLAN_CPU BIT(24)
4606 #define B_BE_PLE_EMPTY_QTA_DMAC_H2C BIT(23)
4607 #define B_BE_PLE_EMPTY_QTA_DMAC_B1_TXPL BIT(22)
4608 #define B_BE_PLE_EMPTY_QTA_DMAC_B0_TXPL BIT(21)
4609 #define B_BE_WDE_EMPTY_QTA_DMAC_CPUIO BIT(20)
4610 #define B_BE_WDE_EMPTY_QTA_DMAC_PKTIN BIT(19)
4611 #define B_BE_WDE_EMPTY_QTA_DMAC_DATA_CPU BIT(18)
4612 #define B_BE_WDE_EMPTY_QTA_DMAC_WLAN_CPU BIT(17)
4613 #define B_BE_WDE_EMPTY_QTA_DMAC_HIF BIT(16)
4614 #define B_BE_WDE_EMPTY_QUE_CMAC_B1_HIQ BIT(15)
4615 #define B_BE_WDE_EMPTY_QUE_CMAC_B1_MBH BIT(14)
4616 #define B_BE_WDE_EMPTY_QUE_CMAC_B0_OTHERS BIT(13)
4617 #define B_BE_WDE_EMPTY_QUE_DMAC_MLO_ACQ BIT(12)
4618 #define B_BE_WDE_EMPTY_QUE_DMAC_MLO_MISC BIT(11)
4619 #define B_BE_WDE_EMPTY_QUE_DMAC_PKTIN BIT(10)
4620 #define B_BE_PLE_EMPTY_QUE_DMAC_SEC_TX BIT(9)
4621 #define B_BE_PLE_EMPTY_QUE_DMAC_MPDU_TX BIT(8)
4622 #define B_BE_WDE_EMPTY_QUE_OTHERS BIT(7)
4623 #define B_BE_WDE_EMPTY_QUE_CMAC_WMM3 BIT(6)
4624 #define B_BE_WDE_EMPTY_QUE_CMAC_WMM2 BIT(5)
4625 #define B_BE_WDE_EMPTY_QUE_CMAC0_WMM1 BIT(4)
4626 #define B_BE_WDE_EMPTY_QUE_CMAC0_WMM0 BIT(3)
4627 #define B_BE_WDE_EMPTY_QUE_CMAC1_MBH BIT(2)
4628 #define B_BE_WDE_EMPTY_QUE_CMAC0_MBH BIT(1)
4629 #define B_BE_WDE_EMPTY_QUE_CMAC0_ALL_AC BIT(0)
4632 #define B_BE_PLE_EMPTY_QTA_CMAC_DMA_TXRPT BIT(21)
4633 #define B_BE_PLE_EMPTY_QTA_DMAC_WDRLS BIT(20)
4634 #define B_BE_PLE_EMPTY_QTA_CMAC1_DMA_BBRPT BIT(19)
4635 #define B_BE_PLE_EMPTY_QTA_CMAC1_DMA_RX BIT(18)
4636 #define B_BE_PLE_EMPTY_QTA_CMAC0_DMA_RX BIT(17)
4637 #define B_BE_PLE_EMPTY_QTA_DMAC_C2H BIT(16)
4638 #define B_BE_PLE_EMPTY_QUE_DMAC_PLRLS BIT(5)
4639 #define B_BE_PLE_EMPTY_QUE_DMAC_CPUIO BIT(4)
4640 #define B_BE_PLE_EMPTY_QUE_DMAC_SEC_RX BIT(3)
4641 #define B_BE_PLE_EMPTY_QUE_DMAC_MPDU_RX BIT(2)
4642 #define B_BE_PLE_EMPTY_QUE_DMAC_HDP BIT(1)
4643 #define B_BE_WDE_EMPTY_QUE_DMAC_WDRLS BIT(0)
4683 #define B_BE_DMAC_NOTX_ERR_INT_EN BIT(21)
4684 #define B_BE_DMAC_NORX_ERR_INT_EN BIT(20)
4685 #define B_BE_DLE_DATACPUIO_ERR_INT_EN BIT(19)
4686 #define B_BE_PLRSL_ERR_INT_EN BIT(18)
4687 #define B_BE_MLO_ERR_INT_EN BIT(17)
4688 #define B_BE_DMAC_FW_ERR_INT_EN BIT(16)
4689 #define B_BE_H_AXIDMA_ERR_INT_EN BIT(14)
4690 #define B_BE_P_AXIDMA_ERR_INT_EN BIT(13)
4691 #define B_BE_HCI_BUF_ERR_INT_EN BIT(12)
4692 #define B_BE_BBRPT_ERR_INT_EN BIT(11)
4693 #define B_BE_DLE_CPUIO_ERR_INT_EN BIT(10)
4694 #define B_BE_APB_BRIDGE_ERR_INT_EN BIT(9)
4695 #define B_BE_DISPATCH_ERR_INT_EN BIT(8)
4696 #define B_BE_PKTIN_ERR_INT_EN BIT(7)
4697 #define B_BE_PLE_DLE_ERR_INT_EN BIT(6)
4698 #define B_BE_TXPKTCTRL_ERR_INT_EN BIT(5)
4699 #define B_BE_WDE_DLE_ERR_INT_EN BIT(4)
4700 #define B_BE_STA_SCHEDULER_ERR_INT_EN BIT(3)
4701 #define B_BE_MPDU_ERR_INT_EN BIT(2)
4702 #define B_BE_WSEC_ERR_INT_EN BIT(1)
4703 #define B_BE_WDRLS_ERR_INT_EN BIT(0)
4706 #define B_BE_DLE_DATACPUIO_ERR_INT BIT(19)
4707 #define B_BE_PLRLS_ERR_INT BIT(18)
4708 #define B_BE_MLO_ERR_INT BIT(17)
4709 #define B_BE_DMAC_FW_ERR_IDCT BIT(16)
4710 #define B_BE_H_AXIDMA_ERR_INT BIT(14)
4711 #define B_BE_P_AXIDMA_ERR_INT BIT(13)
4712 #define B_BE_HCI_BUF_ERR_FLAG BIT(12)
4713 #define B_BE_BBRPT_ERR_FLAG BIT(11)
4714 #define B_BE_DLE_CPUIO_ERR_FLAG BIT(10)
4715 #define B_BE_APB_BRIDGE_ERR_FLAG BIT(9)
4716 #define B_BE_DISPATCH_ERR_FLAG BIT(8)
4717 #define B_BE_PKTIN_ERR_FLAG BIT(7)
4718 #define B_BE_PLE_DLE_ERR_FLAG BIT(6)
4719 #define B_BE_TXPKTCTRL_ERR_FLAG BIT(5)
4720 #define B_BE_WDE_DLE_ERR_FLAG BIT(4)
4721 #define B_BE_STA_SCHEDULER_ERR_FLAG BIT(3)
4722 #define B_BE_MPDU_ERR_FLAG BIT(2)
4723 #define B_BE_WSEC_ERR_FLAG BIT(1)
4724 #define B_BE_WDRLS_ERR_FLAG BIT(0)
4727 #define B_BE_REUSE_SIZE_ERR BIT(31)
4728 #define B_BE_REUSE_EN_ERR BIT(30)
4729 #define B_BE_STF_OQT_UNDERFLOW_ERR BIT(29)
4730 #define B_BE_STF_OQT_OVERFLOW_ERR BIT(28)
4731 #define B_BE_STF_WRFF_UNDERFLOW_ERR BIT(27)
4732 #define B_BE_STF_WRFF_OVERFLOW_ERR BIT(26)
4733 #define B_BE_STF_CMD_UNDERFLOW_ERR BIT(25)
4734 #define B_BE_STF_CMD_OVERFLOW_ERR BIT(24)
4735 #define B_BE_REUSE_SIZE_ZERO_ERR BIT(23)
4736 #define B_BE_REUSE_PKT_CNT_ERR BIT(22)
4737 #define B_BE_CDT_PTR_TIMEOUT_ERR BIT(21)
4738 #define B_BE_CDT_HCI_TIMEOUT_ERR BIT(20)
4739 #define B_BE_HDT_PTR_TIMEOUT_ERR BIT(19)
4740 #define B_BE_HDT_HCI_TIMEOUT_ERR BIT(18)
4741 #define B_BE_CDT_ADDR_INFO_LEN_ERR BIT(17)
4742 #define B_BE_HDT_ADDR_INFO_LEN_ERR BIT(16)
4743 #define B_BE_CDR_DMA_TIMEOUT_ERR BIT(15)
4744 #define B_BE_CDR_RX_TIMEOUT_ERR BIT(14)
4745 #define B_BE_PLE_OUTPUT_ERR BIT(12)
4746 #define B_BE_PLE_RESPOSE_ERR BIT(11)
4747 #define B_BE_PLE_BURST_NUM_ERR BIT(10)
4748 #define B_BE_PLE_NULL_PKT_ERR BIT(9)
4749 #define B_BE_PLE_FLOW_CTRL_ERR BIT(8)
4750 #define B_BE_HDR_DMA_TIMEOUT_ERR BIT(7)
4751 #define B_BE_HDR_RX_TIMEOUT_ERR BIT(6)
4752 #define B_BE_WDE_OUTPUT_ERR BIT(4)
4753 #define B_BE_WDE_RESPONSE_ERR BIT(3)
4754 #define B_BE_WDE_BURST_NUM_ERR BIT(2)
4755 #define B_BE_WDE_NULL_PKT_ERR BIT(1)
4756 #define B_BE_WDE_FLOW_CTRL_ERR BIT(0)
4759 #define B_BE_HR_WRFF_UNDERFLOW_ERR BIT(31)
4760 #define B_BE_HR_WRFF_OVERFLOW_ERR BIT(30)
4761 #define B_BE_HR_CHKSUM_FSM_ERR BIT(29)
4762 #define B_BE_HR_SHIFT_DMA_CFG_ERR BIT(28)
4763 #define B_BE_HR_DMA_PROCESS_ERR BIT(27)
4764 #define B_BE_HR_TOTAL_LEN_UNDER_ERR BIT(26)
4765 #define B_BE_HR_SHIFT_EN_ERR BIT(25)
4766 #define B_BE_HR_AGG_CFG_ERR BIT(24)
4767 #define B_BE_HR_PLD_LEN_ZERO_ERR BIT(22)
4768 #define B_BE_HT_ILL_CH_ERR BIT(20)
4769 #define B_BE_HT_ADDR_INFO_LEN_ERR BIT(18)
4770 #define B_BE_HT_WD_LEN_OVER_ERR BIT(17)
4771 #define B_BE_HT_PLD_CMD_UNDERFLOW_ERR BIT(16)
4772 #define B_BE_HT_PLD_CMD_OVERFLOW_ERR BIT(15)
4773 #define B_BE_HT_WRFF_UNDERFLOW_ERR BIT(14)
4774 #define B_BE_HT_WRFF_OVERFLOW_ERR BIT(13)
4775 #define B_BE_HT_CHKSUM_FSM_ERR BIT(12)
4776 #define B_BE_HT_NON_IDLE_PKT_STR_ERR BIT(11)
4777 #define B_BE_HT_PRE_SUB_BE_ERR BIT(10)
4778 #define B_BE_HT_WD_CHKSUM_ERR BIT(9)
4779 #define B_BE_HT_CHANNEL_DMA_ERR BIT(8)
4780 #define B_BE_HT_OFFSET_UNMATCH_ERR BIT(7)
4781 #define B_BE_HT_PAYLOAD_UNDER_ERR BIT(6)
4782 #define B_BE_HT_PAYLOAD_OVER_ERR BIT(5)
4783 #define B_BE_HT_PERMU_FF_UNDERFLOW_ERR BIT(4)
4784 #define B_BE_HT_PERMU_FF_OVERFLOW_ERR BIT(3)
4785 #define B_BE_HT_PKT_FAIL_ERR BIT(2)
4786 #define B_BE_HT_CH_ID_ERR BIT(1)
4787 #define B_BE_HT_EP_CH_DIFF_ERR BIT(0)
4790 #define B_BE_CR_PLD_LEN_ERR BIT(30)
4791 #define B_BE_CR_WRFF_UNDERFLOW_ERR BIT(29)
4792 #define B_BE_CR_WRFF_OVERFLOW_ERR BIT(28)
4793 #define B_BE_CR_SHIFT_DMA_CFG_ERR BIT(27)
4794 #define B_BE_CR_DMA_PROCESS_ERR BIT(26)
4795 #define B_BE_CR_SHIFT_EN_ERR BIT(24)
4796 #define B_BE_REUSE_FIFO_B_UNDER_ERR BIT(22)
4797 #define B_BE_REUSE_FIFO_B_OVER_ERR BIT(21)
4798 #define B_BE_REUSE_FIFO_A_UNDER_ERR BIT(20)
4799 #define B_BE_REUSE_FIFO_A_OVER_ERR BIT(19)
4800 #define B_BE_CT_ADDR_INFO_LEN_MISS_ERR BIT(17)
4801 #define B_BE_CT_WD_LEN_OVER_ERR BIT(16)
4802 #define B_BE_CT_F2P_SEQ_ERR BIT(15)
4803 #define B_BE_CT_F2P_QSEL_ERR BIT(14)
4804 #define B_BE_CT_PLD_CMD_UNDERFLOW_ERR BIT(13)
4805 #define B_BE_CT_PLD_CMD_OVERFLOW_ERR BIT(12)
4806 #define B_BE_CT_PRE_SUB_ERR BIT(11)
4807 #define B_BE_CT_WD_CHKSUM_ERR BIT(10)
4808 #define B_BE_CT_CHANNEL_DMA_ERR BIT(9)
4809 #define B_BE_CT_OFFSET_UNMATCH_ERR BIT(8)
4810 #define B_BE_F2P_TOTAL_NUM_ERR BIT(7)
4811 #define B_BE_CT_PAYLOAD_UNDER_ERR BIT(6)
4812 #define B_BE_CT_PAYLOAD_OVER_ERR BIT(5)
4813 #define B_BE_CT_PERMU_FF_UNDERFLOW_ERR BIT(4)
4814 #define B_BE_CT_PERMU_FF_OVERFLOW_ERR BIT(3)
4815 #define B_BE_CT_CH_ID_ERR BIT(2)
4816 #define B_BE_CT_EP_CH_DIFF_ERR BIT(0)
4819 #define B_BE_REUSE_SIZE_ERR_INT_EN BIT(31)
4820 #define B_BE_REUSE_EN_ERR_INT_EN BIT(30)
4821 #define B_BE_STF_OQT_UNDERFLOW_ERR_INT_EN BIT(29)
4822 #define B_BE_STF_OQT_OVERFLOW_ERR_INT_EN BIT(28)
4823 #define B_BE_STF_WRFF_UNDERFLOW_ERR_INT_EN BIT(27)
4824 #define B_BE_STF_WRFF_OVERFLOW_ERR_INT_EN BIT(26)
4825 #define B_BE_STF_CMD_UNDERFLOW_ERR_INT_EN BIT(25)
4826 #define B_BE_STF_CMD_OVERFLOW_ERR_INT_EN BIT(24)
4827 #define B_BE_REUSE_SIZE_ZERO_ERR_INT_EN BIT(23)
4828 #define B_BE_REUSE_PKT_CNT_ERR_INT_EN BIT(22)
4829 #define B_BE_CDT_PTR_TIMEOUT_ERR_INT_EN BIT(21)
4830 #define B_BE_CDT_HCI_TIMEOUT_ERR_INT_EN BIT(20)
4831 #define B_BE_HDT_PTR_TIMEOUT_ERR_INT_EN BIT(19)
4832 #define B_BE_HDT_HCI_TIMEOUT_ERR_INT_EN BIT(18)
4833 #define B_BE_CDT_ADDR_INFO_LEN_ERR_INT_EN BIT(17)
4834 #define B_BE_HDT_ADDR_INFO_LEN_ERR_INT_EN BIT(16)
4835 #define B_BE_CDR_DMA_TIMEOUT_ERR_INT_EN BIT(15)
4836 #define B_BE_CDR_RX_TIMEOUT_ERR_INT_EN BIT(14)
4837 #define B_BE_PLE_OUTPUT_ERR_INT_EN BIT(12)
4838 #define B_BE_PLE_RESPOSE_ERR_INT_EN BIT(11)
4839 #define B_BE_PLE_BURST_NUM_ERR_INT_EN BIT(10)
4840 #define B_BE_PLE_NULL_PKT_ERR_INT_EN BIT(9)
4841 #define B_BE_PLE_FLOW_CTRL_ERR_INT_EN BIT(8)
4842 #define B_BE_HDR_DMA_TIMEOUT_ERR_INT_EN BIT(7)
4843 #define B_BE_HDR_RX_TIMEOUT_ERR_INT_EN BIT(6)
4844 #define B_BE_WDE_OUTPUT_ERR_INT_EN BIT(4)
4845 #define B_BE_WDE_RESPONSE_ERR_INT_EN BIT(3)
4846 #define B_BE_WDE_BURST_NUM_ERR_INT_EN BIT(2)
4847 #define B_BE_WDE_NULL_PKT_ERR_INT_EN BIT(1)
4848 #define B_BE_WDE_FLOW_CTRL_ERR_INT_EN BIT(0)
4887 #define B_BE_HR_WRFF_UNDERFLOW_ERR_INT_EN BIT(31)
4888 #define B_BE_HR_WRFF_OVERFLOW_ERR_INT_EN BIT(30)
4889 #define B_BE_HR_CHKSUM_FSM_ERR_INT_EN BIT(29)
4890 #define B_BE_HR_SHIFT_DMA_CFG_ERR_INT_EN BIT(28)
4891 #define B_BE_HR_DMA_PROCESS_ERR_INT_EN BIT(27)
4892 #define B_BE_HR_TOTAL_LEN_UNDER_ERR_INT_EN BIT(26)
4893 #define B_BE_HR_SHIFT_EN_ERR_INT_EN BIT(25)
4894 #define B_BE_HR_AGG_CFG_ERR_INT_EN BIT(24)
4895 #define B_BE_HR_PLD_LEN_ZERO_ERR_INT_EN BIT(22)
4896 #define B_BE_HT_ILL_CH_ERR_INT_EN BIT(20)
4897 #define B_BE_HT_ADDR_INFO_LEN_ERR_INT_EN BIT(18)
4898 #define B_BE_HT_WD_LEN_OVER_ERR_INT_EN BIT(17)
4899 #define B_BE_HT_PLD_CMD_UNDERFLOW_ERR_INT_EN BIT(16)
4900 #define B_BE_HT_PLD_CMD_OVERFLOW_ERR_INT_EN BIT(15)
4901 #define B_BE_HT_WRFF_UNDERFLOW_ERR_INT_EN BIT(14)
4902 #define B_BE_HT_WRFF_OVERFLOW_ERR_INT_EN BIT(13)
4903 #define B_BE_HT_CHKSUM_FSM_ERR_INT_EN BIT(12)
4904 #define B_BE_HT_NON_IDLE_PKT_STR_ERR_EN BIT(11)
4905 #define B_BE_HT_PRE_SUB_ERR_INT_EN BIT(10)
4906 #define B_BE_HT_WD_CHKSUM_ERR_INT_EN BIT(9)
4907 #define B_BE_HT_CHANNEL_DMA_ERR_INT_EN BIT(8)
4908 #define B_BE_HT_OFFSET_UNMATCH_ERR_INT_EN BIT(7)
4909 #define B_BE_HT_PAYLOAD_UNDER_ERR_INT_EN BIT(6)
4910 #define B_BE_HT_PAYLOAD_OVER_ERR_INT_EN BIT(5)
4911 #define B_BE_HT_PERMU_FF_UNDERFLOW_ERR_INT_EN BIT(4)
4912 #define B_BE_HT_PERMU_FF_OVERFLOW_ERR_INT_EN BIT(3)
4913 #define B_BE_HT_PKT_FAIL_ERR_INT_EN BIT(2)
4914 #define B_BE_HT_CH_ID_ERR_INT_EN BIT(1)
4915 #define B_BE_HT_EP_CH_DIFF_ERR_INT_EN BIT(0)
4964 #define B_BE_CR_PLD_LEN_ERR_INT_EN BIT(30)
4965 #define B_BE_CR_WRFF_UNDERFLOW_ERR_INT_EN BIT(29)
4966 #define B_BE_CR_WRFF_OVERFLOW_ERR_INT_EN BIT(28)
4967 #define B_BE_CR_SHIFT_DMA_CFG_ERR_INT_EN BIT(27)
4968 #define B_BE_CR_DMA_PROCESS_ERR_INT_EN BIT(26)
4969 #define B_BE_CR_TOTAL_LEN_UNDER_ERR_INT_EN BIT(25)
4970 #define B_BE_CR_SHIFT_EN_ERR_INT_EN BIT(24)
4971 #define B_BE_REUSE_FIFO_B_UNDER_ERR_INT_EN BIT(22)
4972 #define B_BE_REUSE_FIFO_B_OVER_ERR_INT_EN BIT(21)
4973 #define B_BE_REUSE_FIFO_A_UNDER_ERR_INT_EN BIT(20)
4974 #define B_BE_REUSE_FIFO_A_OVER_ERR_INT_EN BIT(19)
4975 #define B_BE_CT_ADDR_INFO_LEN_MISS_ERR_INT_EN BIT(17)
4976 #define B_BE_CT_WD_LEN_OVER_ERR_INT_EN BIT(16)
4977 #define B_BE_CT_F2P_SEQ_ERR_INT_EN BIT(15)
4978 #define B_BE_CT_F2P_QSEL_ERR_INT_EN BIT(14)
4979 #define B_BE_CT_PLD_CMD_UNDERFLOW_ERR_INT_EN BIT(13)
4980 #define B_BE_CT_PLD_CMD_OVERFLOW_ERR_INT_EN BIT(12)
4981 #define B_BE_CT_PRE_SUB_ERR_INT_EN BIT(11)
4982 #define B_BE_CT_WD_CHKSUM_ERR_INT_EN BIT(10)
4983 #define B_BE_CT_CHANNEL_DMA_ERR_INT_EN BIT(9)
4984 #define B_BE_CT_OFFSET_UNMATCH_ERR_INT_EN BIT(8)
4985 #define B_BE_CT_PAYLOAD_CHKSUM_ERR_INT_EN BIT(7)
4986 #define B_BE_CT_PAYLOAD_UNDER_ERR_INT_EN BIT(6)
4987 #define B_BE_CT_PAYLOAD_OVER_ERR_INT_EN BIT(5)
4988 #define B_BE_CT_PERMU_FF_UNDERFLOW_ERR_INT_EN BIT(4)
4989 #define B_BE_CT_PERMU_FF_OVERFLOW_ERR_INT_EN BIT(3)
4990 #define B_BE_CT_CH_ID_ERR_INT_EN BIT(2)
4991 #define B_BE_CT_PKT_FAIL_ERR_INT_EN BIT(1)
4992 #define B_BE_CT_EP_CH_DIFF_ERR_INT_EN BIT(0)
5038 #define B_BE_CPU_RX_STOP BIT(17)
5039 #define B_BE_HOST_RX_STOP BIT(16)
5041 #define B_BE_HOST_RX_CH_STOP_MSK GENMASK(5, 0)
5057 #define B_BE_FWD_WLAN_CPU_TYPE_0_CTL_MASK GENMASK(5, 4)
5067 #define B_BE_WDE_AVAL_UPD_REQ BIT(29)
5069 #define B_BE_WDE_BUFMGN_FRZTMR_MODE BIT(0)
5072 #define B_BE_WDE_DATCHN_CAMREQ_ERR_INT_EN BIT(29)
5073 #define B_BE_WDE_DATCHN_ADRERR_ERR_INT_EN BIT(28)
5074 #define B_BE_WDE_DATCHN_RRDY_ERR_INT_EN BIT(27)
5075 #define B_BE_WDE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
5076 #define B_BE_WDE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
5077 #define B_BE_WDE_DATCHN_ARBT_ERR_INT_EN BIT(24)
5078 #define B_BE_WDE_QUEMGN_FRZTO_ERR_INT_EN BIT(23)
5079 #define B_BE_WDE_NXTPKTLL_AD_ERR_INT_EN BIT(22)
5080 #define B_BE_WDE_PREPKTLLT_AD_ERR_INT_EN BIT(21)
5081 #define B_BE_WDE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(20)
5082 #define B_BE_WDE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(19)
5083 #define B_BE_WDE_QUE_SRCQUEID_ERR_INT_EN BIT(18)
5084 #define B_BE_WDE_QUE_DSTQUEID_ERR_INT_EN BIT(17)
5085 #define B_BE_WDE_QUE_CMDTYPE_ERR_INT_EN BIT(16)
5086 #define B_BE_WDE_BUFMGN_MRG_SZLMT_ERR_INT_EN BIT(13)
5087 #define B_BE_WDE_BUFMGN_MRG_QTAID_ERR_INT_EN BIT(12)
5088 #define B_BE_WDE_BUFMGN_MRG_ENDPKTID_ERR_INT_EN BIT(11)
5089 #define B_BE_WDE_ERR_BUFMGN_MRG_STRPKTID_ERR_INT_EN BIT(10)
5090 #define B_BE_WDE_BUFMGN_FRZTO_ERR_INT_EN BIT(9)
5091 #define B_BE_WDE_GETNPG_PGOFST_ERR_INT_EN BIT(8)
5092 #define B_BE_WDE_GETNPG_STRPG_ERR_INT_EN BIT(7)
5093 #define B_BE_WDE_BUFREQ_SRCHTAILPG_ERR_INT_EN BIT(6)
5094 #define B_BE_WDE_BUFRTN_SIZE_ERR_INT_EN BIT(5)
5095 #define B_BE_WDE_BUFRTN_INVLD_PKTID_ERR_INT_EN BIT(4)
5096 #define B_BE_WDE_BUFREQ_UNAVAL_ERR_INT_EN BIT(3)
5097 #define B_BE_WDE_BUFREQ_SIZELMT_INT_EN BIT(2)
5098 #define B_BE_WDE_BUFREQ_SIZE0_INT_EN BIT(1)
5099 #define B_BE_WDE_BUFREQ_QTAID_ERR_INT_EN BIT(0)
5178 #define B_BE_WDE_QUEMGN_CMACACQ_DEQNTFY_INT_EN BIT(8)
5188 #define B_BE_PLE_AVAL_UPD_REQ BIT(29)
5190 #define B_BE_PLE_BUFMGN_FRZTMR_MODE BIT(0)
5193 #define B_BE_PLE_DATCHN_CAMREQ_ERR_INT_EN BIT(29)
5194 #define B_BE_PLE_DATCHN_ADRERR_ERR_INT_EN BIT(28)
5195 #define B_BE_PLE_DATCHN_RRDY_ERR_INT_EN BIT(27)
5196 #define B_BE_PLE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
5197 #define B_BE_PLE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
5198 #define B_BE_PLE_DATCHN_ARBT_ERR_INT_EN BIT(24)
5199 #define B_BE_PLE_QUEMGN_FRZTO_ERR_INT_EN BIT(23)
5200 #define B_BE_PLE_NXTPKTLL_AD_ERR_INT_EN BIT(22)
5201 #define B_BE_PLE_PREPKTLLT_AD_ERR_INT_EN BIT(21)
5202 #define B_BE_PLE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(20)
5203 #define B_BE_PLE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(19)
5204 #define B_BE_PLE_QUE_SRCQUEID_ERR_INT_EN BIT(18)
5205 #define B_BE_PLE_QUE_DSTQUEID_ERR_INT_EN BIT(17)
5206 #define B_BE_PLE_QUE_CMDTYPE_ERR_INT_EN BIT(16)
5207 #define B_BE_PLE_BUFMGN_MRG_SZLMT_ERR_INT_EN BIT(13)
5208 #define B_BE_PLE_BUFMGN_MRG_QTAID_ERR_INT_EN BIT(12)
5209 #define B_BE_PLE_BUFMGN_MRG_ENDPKTID_ERR_INT_EN BIT(11)
5210 #define B_BE_PLE_BUFMGN_MRG_STRPKTID_ERR_INT_EN BIT(10)
5211 #define B_BE_PLE_BUFMGN_FRZTO_ERR_INT_EN BIT(9)
5212 #define B_BE_PLE_GETNPG_PGOFST_ERR_INT_EN BIT(8)
5213 #define B_BE_PLE_GETNPG_STRPG_ERR_INT_EN BIT(7)
5214 #define B_BE_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN BIT(6)
5215 #define B_BE_PLE_BUFRTN_SIZE_ERR_INT_EN BIT(5)
5216 #define B_BE_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN BIT(4)
5217 #define B_BE_PLE_BUFREQ_UNAVAL_ERR_INT_EN BIT(3)
5218 #define B_BE_PLE_BUFREQ_SIZELMT_INT_EN BIT(2)
5219 #define B_BE_PLE_BUFREQ_SIZE0_INT_EN BIT(1)
5220 #define B_BE_PLE_BUFREQ_QTAID_ERR_INT_EN BIT(0)
5331 #define B_BE_PLE_SRCHPG_PGOFST_IMR BIT(26)
5332 #define B_BE_PLE_SRCHPG_STRPG_IMR BIT(25)
5333 #define B_BE_PLE_SRCHPG_FRZTO_IMR BIT(24)
5342 #define B_BE_PLE_DFI_ACTIVE BIT(31)
5350 #define B_BE_WDRLS_DIS_AGAC BIT(31)
5356 #define B_BE_WDRLS_RPT3_FRZTO_ERR_INT_EN BIT(21)
5357 #define B_BE_WDRLS_RPT3_AGGNUM0_ERR_INT_EN BIT(20)
5358 #define B_BE_WDRLS_RPT2_FRZTO_ERR_INT_EN BIT(17)
5359 #define B_BE_WDRLS_RPT2_AGGNUM0_ERR_INT_EN BIT(16)
5360 #define B_BE_WDRLS_RPT1_FRZTO_ERR_INT_EN BIT(13)
5361 #define B_BE_WDRLS_RPT1_AGGNUM0_ERR_INT_EN BIT(12)
5362 #define B_BE_WDRLS_RPT0_FRZTO_ERR_INT_EN BIT(9)
5363 #define B_BE_WDRLS_RPT0_AGGNUM0_ERR_INT_EN BIT(8)
5364 #define B_BE_WDRLS_PLEBREQ_PKTID_ISNULL_ERR_INT_EN BIT(5)
5365 #define B_BE_WDRLS_PLEBREQ_TO_ERR_INT_EN BIT(4)
5366 #define B_BE_WDRLS_CTL_FRZTO_ERR_INT_EN BIT(2)
5367 #define B_BE_WDRLS_CTL_PLPKTID_ISNULL_ERR_INT_EN BIT(1)
5368 #define B_BE_WDRLS_CTL_WDPKTID_ISNULL_ERR_INT_EN BIT(0)
5397 #define B_BE_BBRPT_COM_EVT01_ISR_EN BIT(1)
5398 #define B_BE_BBRPT_COM_NULL_PLPKTID_ISR_EN BIT(0)
5404 #define B_BE_ERR_BB_ONETEN_INT_EN BIT(1)
5405 #define B_BE_ERR_GEN_FRZTO_INT_EN BIT(0)
5412 #define B_BE_BBRPT_DFS_TO_ERR_INT_EN BIT(0)
5417 #define B_BE_LA_IMR_DATA_LOSS BIT(0)
5422 #define B_BE_LA_ISR_DATA_LOSS BIT(0)
5425 #define B_BE_BCHN_EVT01_ISR_EN BIT(29)
5426 #define B_BE_BCHN_REQTO_ISR_EN BIT(28)
5427 #define B_BE_CHIF_RXDATA_AFACT_ISR_EN BIT(11)
5428 #define B_BE_CHIF_RXDATA_BFACT_ISR_EN BIT(10)
5429 #define B_BE_CHIF_HDR_SEGLEN_ISR_EN BIT(9)
5430 #define B_BE_CHIF_HDR_INVLD_ISR_EN BIT(8)
5431 #define B_BE_CHIF_BBONL_BFACT_ISR_EN BIT(4)
5432 #define B_BE_CHIF_RPT_OVF_ISR_EN BIT(3)
5433 #define B_BE_DBG_CHIF_DATA_LOSS_ISR_EN BIT(2)
5434 #define B_BE_CHIF_DATA_WTOUT_ISR_EN BIT(1)
5435 #define B_BE_CHIF_RPT_WTOUT_ISR_EN BIT(0)
5447 #define B_BE_WD_BUF_REQ_EXEC BIT(31)
5452 #define B_BE_WD_BUF_STAT_DONE BIT(31)
5456 #define B_BE_WD_CPUQ_OP_EXEC BIT(31)
5475 #define B_BE_WD_CPUQ_OP_STAT_DONE BIT(31)
5480 #define B_BE_PL_BUF_REQ_EXEC BIT(31)
5485 #define B_BE_PL_BUF_STAT_DONE BIT(31)
5489 #define B_BE_PL_CPUQ_OP_EXEC BIT(31)
5508 #define B_BE_PL_CPUQ_OP_STAT_DONE BIT(31)
5513 #define B_BE_PLEQUE_OP_ERR_INT_EN BIT(12)
5514 #define B_BE_PLEBUF_OP_ERR_INT_EN BIT(8)
5515 #define B_BE_WDEQUE_OP_ERR_INT_EN BIT(4)
5516 #define B_BE_WDEBUF_OP_ERR_INT_EN BIT(0)
5527 #define B_BE_SW_MERGE_ERR_INT_EN BIT(1)
5528 #define B_BE_GET_NULL_PKTID_ERR_INT_EN BIT(0)
5535 #define B_BE_TX_ADDR_MLD_TO_LIK BIT(4)
5536 #define B_BE_TX_HW_SEC_HDR_EN BIT(3)
5537 #define B_BE_TX_MAC_MPDU_PROC_EN BIT(2)
5538 #define B_BE_TX_HW_ACK_POLICY_EN BIT(1)
5539 #define B_BE_TX_HW_SEQ_EN BIT(0)
5542 #define B_BE_TX_TIMEOUT_ERR_EN BIT(0)
5547 #define B_BE_PORT_SEL BIT(29)
5550 #define B_BE_WPKT_FW_RLS BIT(24)
5553 #define B_BE_RXFWD_PRIO_MASK GENMASK(5, 4)
5554 #define B_BE_RXFWD_EN BIT(3)
5555 #define B_BE_DROP_NONDMA_PPDU BIT(2)
5556 #define B_BE_APPEND_FCS BIT(0)
5568 #define B_BE_FWD_PPDU_FW_RLS BIT(22)
5574 #define B_BE_EN_CUT_AMSDU BIT(31)
5575 #define B_BE_CUT_AMSDU_CHKLEN_EN BIT(30)
5576 #define B_BE_CA_CHK_ADDRCAM_EN BIT(29)
5577 #define B_BE_MPDU_CUT_CTRL_EN BIT(24)
5582 #define B_BE_WOW_HCI BIT(5)
5583 #define B_BE_WOW_DROP BIT(2)
5584 #define B_BE_WOW_WOWEN BIT(1)
5585 #define B_BE_WOW_FORCE_WAKEUP BIT(0)
5588 #define B_BE_RX_MGN_MLD_ADDR_EN BIT(6)
5589 #define B_BE_HDR_INFO_MASK GENMASK(5, 4)
5590 #define B_BE_HC_ADDR_HIT_EN BIT(3)
5591 #define B_BE_RX_ADDR_LINK_TO_MLO BIT(2)
5592 #define B_BE_HDR_CNV BIT(1)
5593 #define B_BE_RX_HDR_CNV_EN BIT(0)
5597 #define B_BE_LEN_ERR_IMR BIT(3)
5598 #define B_BE_TIMEOUT_ERR_IMR BIT(1)
5603 #define B_BE_SEC_ENG_EN BIT(31)
5604 #define B_BE_CCMP_SPP_MIC BIT(30)
5605 #define B_BE_CCMP_SPP_CTR BIT(29)
5606 #define B_BE_SEC_CAM_ACC BIT(28)
5608 #define B_BE_WMAC_SEC_MASKIV BIT(25)
5609 #define B_BE_WAPI_SPEC BIT(24)
5610 #define B_BE_REVERT_TA_RA_MLD_EN BIT(23)
5612 #define B_BE_CAM_FORCE_CLK BIT(15)
5613 #define B_BE_SEC_FORCE_CLK BIT(14)
5614 #define B_BE_SEC_RX_SHORT_ADD_ICVERR BIT(13)
5615 #define B_BE_SRAM_IO_PROT BIT(12)
5616 #define B_BE_SEC_PRE_ENQUE_TX BIT(11)
5617 #define B_BE_CLK_EN_CGCMP BIT(10)
5618 #define B_BE_CLK_EN_WAPI BIT(9)
5619 #define B_BE_CLK_EN_WEP_TKIP BIT(8)
5620 #define B_BE_BMC_MGNT_DEC BIT(5)
5621 #define B_BE_UC_MGNT_DEC BIT(4)
5622 #define B_BE_MC_DEC BIT(3)
5623 #define B_BE_BC_DEC BIT(2)
5624 #define B_BE_SEC_RX_DEC BIT(1)
5625 #define B_BE_SEC_TX_ENC BIT(0)
5628 #define B_BE_DBG_ENGINE_SEL BIT(8)
5629 #define B_BE_STOP_RX_PKT_HANDLE BIT(7)
5630 #define B_BE_STOP_TX_PKT_HANDLE BIT(6)
5631 #define B_BE_QUEUE_FOWARD_SEL BIT(5)
5632 #define B_BE_RESP1_PROTECT BIT(4)
5633 #define B_BE_RESP0_PROTECT BIT(3)
5634 #define B_BE_TX_ACTIVE_PROTECT BIT(2)
5635 #define B_BE_APPEND_ICV BIT(1)
5636 #define B_BE_APPEND_MIC BIT(0)
5640 #define B_BE_SEC_CAM_POLL BIT(15)
5641 #define B_BE_SEC_CAM_RW BIT(14)
5642 #define B_BE_SEC_CAM_ACC_FAIL BIT(13)
5652 #define B_BE_QUEUE_OPERATION_HANG_IMR BIT(4)
5653 #define B_BE_SEC1_RX_HANG_IMR BIT(3)
5654 #define B_BE_SEC1_TX_HANG_IMR BIT(2)
5655 #define B_BE_RX_HANG_IMR BIT(1)
5656 #define B_BE_TX_HANG_IMR BIT(0)
5669 #define B_BE_TXD_DIFF_KEYCAM_TYPE_ERROR BIT(5)
5670 #define B_BE_QUEUE_OPERATION_HANG_ERROR BIT(4)
5671 #define B_BE_SEC1_RX_HANG_ERROR BIT(3)
5672 #define B_BE_SEC1_TX_HANG_ERROR BIT(2)
5673 #define B_BE_RX_HANG_ERROR BIT(1)
5674 #define B_BE_TX_HANG_ERROR BIT(0)
5677 #define B_BE_MPDUINFO_FEN BIT(31)
5679 #define B_BE_MPDUINFO_B1_BADDR_MASK GENMASK(5, 0)
5683 #define B_BE_B0_PRELD_FEN BIT(31)
5693 #define B_BE_B0_IMR_DBG_USRCTL_RLSBMPLEN BIT(25)
5694 #define B_BE_B0_IMR_DBG_USRCTL_RDNRLSCMD BIT(24)
5695 #define B_BE_B0_IMR_ERR_PRELD_ENTNUMCFG BIT(17)
5696 #define B_BE_B0_IMR_ERR_PRELD_RLSPKTSZERR BIT(16)
5697 #define B_BE_B0_IMR_ERR_CMDPSR_TBLSZ BIT(11)
5698 #define B_BE_B0_IMR_ERR_CMDPSR_FRZTO BIT(10)
5699 #define B_BE_B0_IMR_ERR_CMDPSR_CMDTYPE BIT(9)
5700 #define B_BE_B0_IMR_ERR_CMDPSR_1STCMDERR BIT(8)
5701 #define B_BE_B0_IMR_ERR_USRCTL_NOINIT BIT(1)
5702 #define B_BE_B0_IMR_ERR_USRCTL_REINIT BIT(0)
5723 #define B_BE_B1_PRELD_FEN BIT(31)
5733 #define B_BE_B1_IMR_DBG_USRCTL_RLSBMPLEN BIT(25)
5734 #define B_BE_B1_IMR_DBG_USRCTL_RDNRLSCMD BIT(24)
5735 #define B_BE_B1_IMR_ERR_PRELD_ENTNUMCFG BIT(17)
5736 #define B_BE_B1_IMR_ERR_PRELD_RLSPKTSZERR BIT(16)
5737 #define B_BE_B1_IMR_ERR_CMDPSR_TBLSZ BIT(11)
5738 #define B_BE_B1_IMR_ERR_CMDPSR_FRZTO BIT(10)
5739 #define B_BE_B1_IMR_ERR_CMDPSR_CMDTYPE BIT(9)
5740 #define B_BE_B1_IMR_ERR_CMDPSR_1STCMDERR BIT(8)
5741 #define B_BE_B1_IMR_ERR_USRCTL_NOINIT BIT(1)
5742 #define B_BE_B1_IMR_ERR_USRCTL_REINIT BIT(0)
5763 #define B_BE_MLO_TABLE_INIT_DONE BIT(31)
5764 #define B_BE_MLO_TABLE_CLR_DONE BIT(30)
5765 #define B_BE_MLO_TABLE_REINIT BIT(23)
5766 #define B_BE_MLO_TABLE_HW_FLAG_CLR BIT(22)
5769 #define B_BE_MLO_ERR_IDCT_IMR_0 BIT(31)
5770 #define B_BE_MLO_ERR_IDCT_IMR_1 BIT(30)
5771 #define B_BE_MLO_ERR_IDCT_IMR_2 BIT(29)
5772 #define B_BE_MLO_ERR_IDCT_IMR_3 BIT(28)
5781 #define B_BE_MLO_ISR_IDCT_0 BIT(31)
5782 #define B_BE_MLO_ISR_IDCT_1 BIT(30)
5783 #define B_BE_MLO_ISR_IDCT_2 BIT(29)
5784 #define B_BE_MLO_ISR_IDCT_3 BIT(28)
5787 #define B_BE_PLRLS_CTL_FRZTO_IMR BIT(0)
5792 #define B_BE_PLRLS_CTL_EVT03_ISR BIT(3)
5793 #define B_BE_PLRLS_CTL_EVT02_ISR BIT(2)
5794 #define B_BE_PLRLS_CTL_EVT01_ISR BIT(1)
5795 #define B_BE_PLRLS_CTL_FRZTO_ISR BIT(0)
5798 #define B_BE_SS_INIT_DONE BIT(31)
5799 #define B_BE_WDE_STA_DIS BIT(30)
5800 #define B_BE_WARM_INIT BIT(29)
5801 #define B_BE_BAND_TRIG_EN BIT(28)
5802 #define B_BE_RMAC_REQ_DIS BIT(27)
5808 #define B_BE_STA_OPTION_CR BIT(15)
5809 #define B_BE_EMLSR_STA_EMPTY_EN BIT(11)
5810 #define B_BE_MLO_HW_CHGLINK_EN BIT(10)
5811 #define B_BE_BAND1_TRIG_EN BIT(9)
5812 #define B_BE_RMAC1_REQ_DIS BIT(8)
5813 #define B_BE_MRT_SRAM_EN BIT(7)
5814 #define B_BE_MRT_INIT_EN BIT(6)
5815 #define B_BE_AVG_LENG_EN BIT(5)
5816 #define B_BE_AVG_INIT_EN BIT(4)
5817 #define B_BE_LENG_INIT_EN BIT(2)
5818 #define B_BE_PMPA_INIT_EN BIT(1)
5819 #define B_BE_SS_EN BIT(0)
5822 #define B_BE_PLE_B_PKTID_ERR_IMR BIT(2)
5823 #define B_BE_RPT_TIMEOUT_IMR BIT(1)
5824 #define B_BE_SEARCH_TIMEOUT_IMR BIT(0)
5833 #define B_BE_PLE_B_PKTID_ERR_ISR BIT(2)
5834 #define B_BE_RPT_TIMEOUT_ISR BIT(1)
5835 #define B_BE_SEARCH_TIMEOUT_ISR BIT(0)
5840 #define B_BE_EN_RO_IDX_UPD_BY_IO BIT(19)
5841 #define B_BE_RST_KEEP_REG BIT(18)
5842 #define B_BE_FLUSH_HAXI_MST BIT(17)
5843 #define B_BE_SET_BDRAM_BOUND BIT(16)
5844 #define B_BE_ADDRINFO_ALIGN4B_EN BIT(15)
5852 #define B_BE_STOP_AXI_MST BIT(7)
5853 #define B_BE_RXDMA_ALIGN64B_EN BIT(6)
5854 #define B_BE_RXDMA_EN BIT(5)
5855 #define B_BE_TXDMA_EN BIT(4)
5860 #define B_BE_STOP_WPDMA BIT(31)
5861 #define B_BE_STOP_CH14 BIT(14)
5862 #define B_BE_STOP_CH13 BIT(13)
5863 #define B_BE_STOP_CH12 BIT(12)
5864 #define B_BE_STOP_CH11 BIT(11)
5865 #define B_BE_STOP_CH10 BIT(10)
5866 #define B_BE_STOP_CH9 BIT(9)
5867 #define B_BE_STOP_CH8 BIT(8)
5868 #define B_BE_STOP_CH7 BIT(7)
5869 #define B_BE_STOP_CH6 BIT(6)
5870 #define B_BE_STOP_CH5 BIT(5)
5871 #define B_BE_STOP_CH4 BIT(4)
5872 #define B_BE_STOP_CH3 BIT(3)
5873 #define B_BE_STOP_CH2 BIT(2)
5874 #define B_BE_STOP_CH1 BIT(1)
5875 #define B_BE_STOP_CH0 BIT(0)
5881 #define B_BE_HAXI_RRESP_ERR_IDCT_MSK BIT(7)
5882 #define B_BE_HAXI_BRESP_ERR_IDCT_MSK BIT(6)
5883 #define B_BE_RXDMA_ERR_FLAG_IDCT_MSK BIT(5)
5884 #define B_BE_SET_FC_ERROR_FLAG_IDCT_MSK BIT(4)
5885 #define B_BE_TXBD_LEN0_ERR_IDCT_MSK BIT(3)
5886 #define B_BE_TXBD_4KBOUND_ERR_IDCT_MSK BIT(2)
5887 #define B_BE_RXMDA_STUCK_IDCT_MSK BIT(1)
5888 #define B_BE_TXMDA_STUCK_IDCT_MSK BIT(0)
5905 #define B_BE_HAXI_RRESP_ERR_IDCT BIT(7)
5906 #define B_BE_HAXI_BRESP_ERR_IDCT BIT(6)
5907 #define B_BE_RXDMA_ERR_FLAG_IDCT BIT(5)
5908 #define B_BE_SET_FC_ERROR_FLAG_IDCT BIT(4)
5909 #define B_BE__TXBD_LEN0_ERR_IDCT BIT(3)
5910 #define B_BE__TXBD_4KBOUND_ERR_IDCT BIT(2)
5911 #define B_BE_RXMDA_STUCK_IDCT BIT(1)
5912 #define B_BE_TXMDA_STUCK_IDCT BIT(0)
5921 #define B_BE_HCI_FC_WD_FULL_COND_MASK GENMASK(5, 4)
5922 #define B_BE_HCI_FC_CH12_EN BIT(3)
5924 #define B_BE_HCI_FC_EN BIT(0)
5928 #define B_BE_PREC_PAGE_CH011_V1_MASK GENMASK(5, 0)
5931 #define B_BE_CH0_GRP BIT(31)
5968 #define B_BE_CMAC_SHARE_CRPRT BIT(31)
5969 #define B_BE_CMAC_SHARE_EN BIT(30)
5970 #define B_BE_FORCE_BTCOEX_REG_GCKEN BIT(24)
5971 #define B_BE_FORCE_CMAC_SHARE_COMMON_REG_GCKEN BIT(16)
5972 #define B_BE_FORCE_CMAC_SHARE_REG_GCKEN BIT(15)
5973 #define B_BE_RESPBA_EN BIT(2)
5974 #define B_BE_ADDRSRCH_EN BIT(1)
5975 #define B_BE_BTCOEX_EN BIT(0)
5980 #define B_BE_MACID_ACQ_GRP1_CLR_P BIT(3)
5981 #define B_BE_MACID_ACQ_GRP0_CLR_P BIT(2)
5982 #define B_BE_R_MACID_ACQ_CHK_EN BIT(0)
5987 #define B_BE_WL_ACT2_VAL BIT(25)
5988 #define B_BE_WL_ACT2_SWCTRL BIT(24)
5989 #define B_BE_WL_ACT_VAL BIT(23)
5990 #define B_BE_WL_ACT_SWCTRL BIT(22)
5991 #define B_BE_GNT_BT_RX_BB1_VAL BIT(21)
5992 #define B_BE_GNT_BT_RX_BB1_SWCTRL BIT(20)
5993 #define B_BE_GNT_BT_TX_BB1_VAL BIT(19)
5994 #define B_BE_GNT_BT_TX_BB1_SWCTRL BIT(18)
5995 #define B_BE_GNT_BT_RX_BB0_VAL BIT(17)
5996 #define B_BE_GNT_BT_RX_BB0_SWCTRL BIT(16)
5997 #define B_BE_GNT_BT_TX_BB0_VAL BIT(15)
5998 #define B_BE_GNT_BT_TX_BB0_SWCTRL BIT(14)
5999 #define B_BE_GNT_WL_RX_VAL BIT(13)
6000 #define B_BE_GNT_WL_RX_SWCTRL BIT(12)
6001 #define B_BE_GNT_WL_TX_VAL BIT(11)
6002 #define B_BE_GNT_WL_TX_SWCTRL BIT(10)
6003 #define B_BE_GNT_BT_BB1_VAL BIT(9)
6004 #define B_BE_GNT_BT_BB1_SWCTRL BIT(8)
6005 #define B_BE_GNT_WL_BB1_VAL BIT(7)
6006 #define B_BE_GNT_WL_BB1_SWCTRL BIT(6)
6007 #define B_BE_GNT_BT_BB0_VAL BIT(5)
6008 #define B_BE_GNT_BT_BB0_SWCTRL BIT(4)
6009 #define B_BE_GNT_WL_BB0_VAL BIT(3)
6010 #define B_BE_GNT_WL_BB0_SWCTRL BIT(2)
6011 #define B_BE_GNT_WL_BB_PWR_VAL BIT(1)
6012 #define B_BE_GNT_WL_BB_PWR_SWCTRL BIT(0)
6019 #define B_BE_CMAC_CRPRT BIT(31)
6020 #define B_BE_CMAC_EN BIT(30)
6021 #define B_BE_CMAC_TXEN BIT(29)
6022 #define B_BE_CMAC_RXEN BIT(28)
6023 #define B_BE_FORCE_RESP_PKTCTL_GCKEN BIT(26)
6024 #define B_BE_FORCE_SIGB_REG_GCKEN BIT(25)
6025 #define B_BE_FORCE_POWER_REG_GCKEN BIT(23)
6026 #define B_BE_FORCE_RMAC_REG_GCKEN BIT(22)
6027 #define B_BE_FORCE_TRXPTCL_REG_GCKEN BIT(21)
6028 #define B_BE_FORCE_TMAC_REG_GCKEN BIT(20)
6029 #define B_BE_FORCE_CMAC_DMA_REG_GCKEN BIT(19)
6030 #define B_BE_FORCE_PTCL_REG_GCKEN BIT(18)
6031 #define B_BE_FORCE_SCHEDULER_RREG_GCKEN BIT(17)
6032 #define B_BE_FORCE_CMAC_COMMON_REG_GCKEN BIT(16)
6033 #define B_BE_FORCE_CMACREG_GCKEN BIT(15)
6034 #define B_BE_TXTIME_EN BIT(8)
6035 #define B_BE_RESP_PKTCTL_EN BIT(7)
6036 #define B_BE_SIGB_EN BIT(6)
6037 #define B_BE_PHYINTF_EN BIT(5)
6038 #define B_BE_CMAC_DMA_EN BIT(4)
6039 #define B_BE_PTCLTOP_EN BIT(3)
6040 #define B_BE_SCHEDULER_EN BIT(2)
6041 #define B_BE_TMAC_EN BIT(1)
6042 #define B_BE_RMAC_EN BIT(0)
6051 #define B_BE_CMAC_CKEN BIT(30)
6052 #define B_BE_BCN_P1_P4_CKEN BIT(15)
6053 #define B_BE_BCN_P0MB1_15_CKEN BIT(14)
6054 #define B_BE_TXTIME_CKEN BIT(8)
6055 #define B_BE_RESP_PKTCTL_CKEN BIT(7)
6056 #define B_BE_SIGB_CKEN BIT(6)
6057 #define B_BE_PHYINTF_CKEN BIT(5)
6058 #define B_BE_CMAC_DMA_CKEN BIT(4)
6059 #define B_BE_PTCLTOP_CKEN BIT(3)
6060 #define B_BE_SCHEDULER_CKEN BIT(2)
6061 #define B_BE_TMAC_CKEN BIT(1)
6062 #define B_BE_RMAC_CKEN BIT(0)
6070 #define B_BE_CMAC_ASSERTION BIT(31)
6114 #define B_BE_CMAC_FW_ERR_IDCT_EN BIT(16)
6115 #define B_BE_PTCL_TX_IDLETO_IDCT_EN BIT(9)
6116 #define B_BE_WMAC_RX_IDLETO_IDCT_EN BIT(8)
6117 #define B_BE_WMAC_TX_ERR_IND_EN BIT(7)
6118 #define B_BE_WMAC_RX_ERR_IND_EN BIT(6)
6119 #define B_BE_TXPWR_CTRL_ERR_IND_EN BIT(5)
6120 #define B_BE_PHYINTF_ERR_IND_EN BIT(4)
6121 #define B_BE_DMA_TOP_ERR_IND_EN BIT(3)
6122 #define B_BE_RESP_PKTCTL_ERR_IND_EN BIT(2)
6123 #define B_BE_PTCL_TOP_ERR_IND_EN BIT(1)
6124 #define B_BE_SCHEDULE_TOP_ERR_IND_EN BIT(0)
6128 #define B_BE_CMAC_FW_ERR_IDCT BIT(16)
6129 #define B_BE_PTCL_TX_IDLETO_IDCT BIT(9)
6130 #define B_BE_WMAC_RX_IDLETO_IDCT BIT(8)
6131 #define B_BE_WMAC_TX_ERR_IND BIT(7)
6132 #define B_BE_WMAC_RX_ERR_IND BIT(6)
6133 #define B_BE_TXPWR_CTRL_ERR_IND BIT(5)
6134 #define B_BE_PHYINTF_ERR_IND BIT(4)
6135 #define B_BE_DMA_TOP_ERR_IND BIT(3)
6136 #define B_BE_RESP_PKTCTL_ERR_IDCT BIT(2)
6137 #define B_BE_PTCL_TOP_ERR_IND BIT(1)
6138 #define B_BE_SCHEDULE_TOP_ERR_IND BIT(0)
6158 #define B_BE_SER_L0_SUBMODULE_BIT31_CNT BIT(31)
6159 #define B_BE_SER_L0_SUBMODULE_BIT30_CNT BIT(30)
6160 #define B_BE_SER_L0_SUBMODULE_BIT29_CNT BIT(29)
6161 #define B_BE_SER_L0_SUBMODULE_BIT28_CNT BIT(28)
6162 #define B_BE_SER_L0_SUBMODULE_BIT27_CNT BIT(27)
6163 #define B_BE_SER_L0_SUBMODULE_BIT26_CNT BIT(26)
6164 #define B_BE_SER_L0_SUBMODULE_BIT25_CNT BIT(25)
6165 #define B_BE_SER_L0_SUBMODULE_BIT24_CNT BIT(24)
6166 #define B_BE_SER_L0_SUBMODULE_BIT23_CNT BIT(23)
6167 #define B_BE_SER_L0_SUBMODULE_BIT22_CNT BIT(22)
6168 #define B_BE_SER_L0_SUBMODULE_BIT21_CNT BIT(21)
6169 #define B_BE_SER_L0_SUBMODULE_BIT20_CNT BIT(20)
6170 #define B_BE_SER_L0_SUBMODULE_BIT19_CNT BIT(19)
6171 #define B_BE_SER_L0_SUBMODULE_BIT18_CNT BIT(18)
6172 #define B_BE_SER_L0_SUBMODULE_BIT17_CNT BIT(17)
6173 #define B_BE_SER_L0_SUBMODULE_BIT16_CNT BIT(16)
6174 #define B_BE_SER_L0_SUBMODULE_BIT15_CNT BIT(15)
6175 #define B_BE_SER_L0_SUBMODULE_BIT14_CNT BIT(14)
6176 #define B_BE_SER_L0_SUBMODULE_BIT13_CNT BIT(13)
6177 #define B_BE_SER_L0_SUBMODULE_BIT12_CNT BIT(12)
6178 #define B_BE_SER_L0_SUBMODULE_BIT11_CNT BIT(11)
6179 #define B_BE_SER_L0_SUBMODULE_BIT10_CNT BIT(10)
6180 #define B_BE_SER_L0_SUBMODULE_BIT9_CNT BIT(9)
6181 #define B_BE_SER_L0_SUBMODULE_BIT8_CNT BIT(8)
6182 #define B_BE_SER_L0_SUBMODULE_BIT7_CNT BIT(7)
6183 #define B_BE_SER_L0_SUBMODULE_BIT6_CNT BIT(6)
6184 #define B_BE_SER_L0_SUBMODULE_BIT5_CNT BIT(5)
6185 #define B_BE_SER_L0_SUBMODULE_BIT4_CNT BIT(4)
6186 #define B_BE_SER_L0_SUBMODULE_BIT3_CNT BIT(3)
6187 #define B_BE_SER_L0_SUBMODULE_BIT2_CNT BIT(2)
6188 #define B_BE_SER_L0_SUBMODULE_BIT1_CNT BIT(1)
6189 #define B_BE_SER_L0_SUBMODULE_BIT0_CNT BIT(0)
6193 #define B_BE_P0_SYNC_NOW_P BIT(30)
6194 #define B_BE_P0_SYNC_ONCE_P BIT(29)
6195 #define B_BE_P0_AUTO_SYNC BIT(28)
6224 #define B_BE_EDCCA_SEC160_EN BIT(23)
6225 #define B_BE_EDCCA_SEC80_EN BIT(22)
6226 #define B_BE_EDCCA_SEC40_EN BIT(21)
6227 #define B_BE_EDCCA_SEC20_EN BIT(20)
6228 #define B_BE_SEC160_EN BIT(19)
6229 #define B_BE_CCA_BITMAP_EN BIT(18)
6230 #define B_BE_TXPKTCTL_RST_EDCA_EN BIT(17)
6231 #define B_BE_WMAC_RST_EDCA_EN BIT(16)
6232 #define B_BE_TXFAIL_BRK_TXOP_EN BIT(11)
6233 #define B_BE_EDCCA_PER20_BITMAP_SIFS_EN BIT(10)
6234 #define B_BE_NO_GNT_WL_BRK_TXOP_EN BIT(9)
6235 #define B_BE_NAV_BRK_TXOP_EN BIT(8)
6236 #define B_BE_TX_NAV_EN BIT(7)
6237 #define B_BE_BCN_IGNORE_EDCCA BIT(6)
6238 #define B_BE_NO_GNT_WL_EN BIT(5)
6239 #define B_BE_EDCCA_EN BIT(4)
6240 #define B_BE_SEC80_EN BIT(3)
6241 #define B_BE_SEC40_EN BIT(2)
6242 #define B_BE_SEC20_EN BIT(1)
6243 #define B_BE_CCA_EN BIT(0)
6251 #define B_BE_SR_TX_EN BIT(2)
6252 #define B_BE_NAV_BLK_MGQ BIT(1)
6253 #define B_BE_NAV_BLK_HGQ BIT(0)
6264 #define B_BE_MUEDCA_WMM_SEL BIT(8)
6265 #define B_BE_SET_MUEDCATIMER_TF_MASK GENMASK(5, 4)
6266 #define B_BE_SET_MUEDCATIMER_TF_0 BIT(4)
6268 #define B_BE_MUEDCA_EN_0 BIT(0)
6272 #define B_BE_CTN_TXEN_TWT_3 BIT(17)
6273 #define B_BE_CTN_TXEN_TWT_2 BIT(16)
6274 #define B_BE_CTN_TXEN_TWT_1 BIT(15)
6275 #define B_BE_CTN_TXEN_TWT_0 BIT(14)
6276 #define B_BE_CTN_TXEN_ULQ BIT(13)
6277 #define B_BE_CTN_TXEN_BCNQ BIT(12)
6278 #define B_BE_CTN_TXEN_HGQ BIT(11)
6279 #define B_BE_CTN_TXEN_CPUMGQ BIT(10)
6280 #define B_BE_CTN_TXEN_MGQ1 BIT(9)
6281 #define B_BE_CTN_TXEN_MGQ BIT(8)
6282 #define B_BE_CTN_TXEN_VO_1 BIT(7)
6283 #define B_BE_CTN_TXEN_VI_1 BIT(6)
6284 #define B_BE_CTN_TXEN_BK_1 BIT(5)
6285 #define B_BE_CTN_TXEN_BE_1 BIT(4)
6286 #define B_BE_CTN_TXEN_VO_0 BIT(3)
6287 #define B_BE_CTN_TXEN_VI_0 BIT(2)
6288 #define B_BE_CTN_TXEN_BK_0 BIT(1)
6289 #define B_BE_CTN_TXEN_BE_0 BIT(0)
6294 #define B_BE_TB_CHK_TX_NAV BIT(15)
6295 #define B_BE_TB_CHK_INTRA_NAV BIT(14)
6296 #define B_BE_TB_CHK_BASIC_NAV BIT(13)
6297 #define B_BE_TB_CHK_NO_GNT_WL BIT(12)
6298 #define B_BE_TB_CHK_EDCCA_S160 BIT(11)
6299 #define B_BE_TB_CHK_EDCCA_S80 BIT(10)
6300 #define B_BE_TB_CHK_EDCCA_S40 BIT(9)
6301 #define B_BE_TB_CHK_EDCCA_S20 BIT(8)
6302 #define B_BE_TB_CHK_CCA_S160 BIT(7)
6303 #define B_BE_TB_CHK_CCA_S80 BIT(6)
6304 #define B_BE_TB_CHK_CCA_S40 BIT(5)
6305 #define B_BE_TB_CHK_CCA_S20 BIT(4)
6306 #define B_BE_TB_CHK_EDCCA_BITMAP BIT(3)
6307 #define B_BE_TB_CHK_CCA_BITMAP BIT(2)
6308 #define B_BE_TB_CHK_EDCCA_P20 BIT(1)
6309 #define B_BE_TB_CHK_CCA_P20 BIT(0)
6313 #define B_BE_HE_SIFS_CHK_TX_NAV BIT(15)
6314 #define B_BE_HE_SIFS_CHK_INTRA_NAV BIT(14)
6315 #define B_BE_HE_SIFS_CHK_BASIC_NAV BIT(13)
6316 #define B_BE_HE_SIFS_CHK_NO_GNT_WL BIT(12)
6317 #define B_BE_HE_SIFS_CHK_EDCCA_S160 BIT(11)
6318 #define B_BE_HE_SIFS_CHK_EDCCA_S80 BIT(10)
6319 #define B_BE_HE_SIFS_CHK_EDCCA_S40 BIT(9)
6320 #define B_BE_HE_SIFS_CHK_EDCCA_S20 BIT(8)
6321 #define B_BE_HE_SIFS_CHK_CCA_S160 BIT(7)
6322 #define B_BE_HE_SIFS_CHK_CCA_S80 BIT(6)
6323 #define B_BE_HE_SIFS_CHK_CCA_S40 BIT(5)
6324 #define B_BE_HE_SIFS_CHK_CCA_S20 BIT(4)
6325 #define B_BE_HE_SIFS_CHK_EDCCA_BITMAP BIT(3)
6326 #define B_BE_HE_SIFS_CHK_CCA_BITMAP BIT(2)
6327 #define B_BE_HE_SIFS_CHK_EDCCA_P20 BIT(1)
6328 #define B_BE_HE_SIFS_CHK_CCA_P20 BIT(0)
6332 #define B_BE_HE_CTN_CHK_TX_NAV BIT(15)
6333 #define B_BE_HE_CTN_CHK_INTRA_NAV BIT(14)
6334 #define B_BE_HE_CTN_CHK_BASIC_NAV BIT(13)
6335 #define B_BE_HE_CTN_CHK_NO_GNT_WL BIT(12)
6336 #define B_BE_HE_CTN_CHK_EDCCA_S160 BIT(11)
6337 #define B_BE_HE_CTN_CHK_EDCCA_S80 BIT(10)
6338 #define B_BE_HE_CTN_CHK_EDCCA_S40 BIT(9)
6339 #define B_BE_HE_CTN_CHK_EDCCA_S20 BIT(8)
6340 #define B_BE_HE_CTN_CHK_CCA_S160 BIT(7)
6341 #define B_BE_HE_CTN_CHK_CCA_S80 BIT(6)
6342 #define B_BE_HE_CTN_CHK_CCA_S40 BIT(5)
6343 #define B_BE_HE_CTN_CHK_CCA_S20 BIT(4)
6344 #define B_BE_HE_CTN_CHK_EDCCA_BITMAP BIT(3)
6345 #define B_BE_HE_CTN_CHK_CCA_BITMAP BIT(2)
6346 #define B_BE_HE_CTN_CHK_EDCCA_P20 BIT(1)
6347 #define B_BE_HE_CTN_CHK_CCA_P20 BIT(0)
6351 #define B_BE_FSM_TIMEOUT_ERR_INT_EN BIT(0)
6357 #define B_BE_SORT_NON_IDLE_ERR_INT BIT(1)
6358 #define B_BE_FSM_TIMEOUT_ERR_INT BIT(0)
6362 #define B_BE_BCN_ERLY_SORT_EN_P0 BIT(18)
6363 #define B_BE_PROHIB_END_CAL_EN_P0 BIT(17)
6364 #define B_BE_BRK_SETUP_P0 BIT(16)
6365 #define B_BE_TBTT_UPD_SHIFT_SEL_P0 BIT(15)
6366 #define B_BE_BCN_DROP_ALLOW_P0 BIT(14)
6367 #define B_BE_TBTT_PROHIB_EN_P0 BIT(13)
6368 #define B_BE_BCNTX_EN_P0 BIT(12)
6370 #define B_BE_BCN_FORCETX_EN_P0 BIT(9)
6371 #define B_BE_TXBCN_BTCCA_EN_P0 BIT(8)
6372 #define B_BE_BCNERR_CNT_EN_P0 BIT(7)
6373 #define B_BE_BCN_AGRES_P0 BIT(6)
6374 #define B_BE_TSFTR_RST_P0 BIT(5)
6375 #define B_BE_RX_BSSID_FIT_EN_P0 BIT(4)
6376 #define B_BE_TSF_UDT_EN_P0 BIT(3)
6377 #define B_BE_PORT_FUNC_EN_P0 BIT(2)
6378 #define B_BE_TXBCN_RPT_EN_P0 BIT(1)
6379 #define B_BE_RXBCN_RPT_EN_P0 BIT(0)
6422 #define B_BE_BCN_ERR_FLAG_SRCHEND_P0 BIT(3)
6423 #define B_BE_BCN_ERR_FLAG_INVALID_P0 BIT(2)
6424 #define B_BE_BCN_ERR_FLAG_CMP_P0 BIT(1)
6425 #define B_BE_BCN_ERR_FLAG_LOCK_P0 BIT(0)
6453 #define B_BE_MBSSID_MODE_SEL BIT(20)
6455 #define B_BE_P0MB15_EN BIT(15)
6456 #define B_BE_P0MB14_EN BIT(14)
6457 #define B_BE_P0MB13_EN BIT(13)
6458 #define B_BE_P0MB12_EN BIT(12)
6459 #define B_BE_P0MB11_EN BIT(11)
6460 #define B_BE_P0MB10_EN BIT(10)
6461 #define B_BE_P0MB9_EN BIT(9)
6462 #define B_BE_P0MB8_EN BIT(8)
6463 #define B_BE_P0MB7_EN BIT(7)
6464 #define B_BE_P0MB6_EN BIT(6)
6465 #define B_BE_P0MB5_EN BIT(5)
6466 #define B_BE_P0MB4_EN BIT(4)
6467 #define B_BE_P0MB3_EN BIT(3)
6468 #define B_BE_P0MB2_EN BIT(2)
6469 #define B_BE_P0MB1_EN BIT(1)
6479 #define B_BE_CPUMGQ_LIFETIME_EN BIT(8)
6480 #define B_BE_MGQ_LIFETIME_EN BIT(7)
6481 #define B_BE_LIFETIME_EN BIT(6)
6482 #define B_BE_DIS_PTCL_CLK_GATING BIT(5)
6483 #define B_BE_PTCL_TRIGGER_SS_EN_UL BIT(4)
6484 #define B_BE_PTCL_TRIGGER_SS_EN_1 BIT(3)
6485 #define B_BE_PTCL_TRIGGER_SS_EN_0 BIT(2)
6486 #define B_BE_CMAC_TX_MODE_1 BIT(1)
6487 #define B_BE_CMAC_TX_MODE_0 BIT(0)
6491 #define B_BE_TB_PPDU_BK_DIS BIT(15)
6492 #define B_BE_TB_PPDU_BE_DIS BIT(14)
6493 #define B_BE_TB_PPDU_VI_DIS BIT(13)
6494 #define B_BE_TB_PPDU_VO_DIS BIT(12)
6495 #define B_BE_QOSNULL_UPD_MUEDCA_EN BIT(3)
6496 #define B_BE_TB_BYPASS_TXPWR BIT(2)
6517 #define B_BE_HW_CTS2SELF_EN BIT(16)
6525 #define B_BE_OFDM_CCK_ERR_PROC BIT(6)
6526 #define B_BE_PKT_LAST_TX BIT(5)
6527 #define B_BE_BAND_MODE BIT(4)
6529 #define B_BE_RTS_LIMIT_IN_OFDM6 BIT(1)
6530 #define B_BE_CHECK_CCK_EN BIT(0)
6534 #define B_BE_GI_LTF_FB_SEL BIT(30)
6542 #define B_BE_BT_PLT_RST BIT(9)
6543 #define B_BE_PLT_EN BIT(8)
6544 #define B_BE_RX_PLT_GNT_LTE_RX BIT(7)
6545 #define B_BE_RX_PLT_GNT_BT_RX BIT(6)
6546 #define B_BE_RX_PLT_GNT_BT_TX BIT(5)
6547 #define B_BE_RX_PLT_GNT_WL BIT(4)
6548 #define B_BE_TX_PLT_GNT_LTE_RX BIT(3)
6549 #define B_BE_TX_PLT_GNT_BT_RX BIT(2)
6550 #define B_BE_TX_PLT_GNT_BT_TX BIT(1)
6551 #define B_BE_TX_PLT_GNT_WL BIT(0)
6558 #define B_BE_BSS_COLOB_BE_PORT_0_MASK GENMASK(5, 0)
6562 #define B_BE_BSS_COLOB_BE_PORT_4_MASK GENMASK(5, 0)
6566 #define B_BE_NO_TRX_TIMEOUT_IMR BIT(1)
6567 #define B_BE_TX_IDLE_TIMEOUT_IMR BIT(0)
6573 #define B_BE_PTCL_ERROR_FLAG_IMR BIT(31)
6574 #define B_BE_FSM1_TIMEOUT_ERR_INT_EN BIT(1)
6575 #define B_BE_FSM_TIMEOUT_ERR_INT_EN BIT(0)
6585 #define B_BE_PTCL_ERROR_FLAG_ISR BIT(31)
6586 #define B_BE_FSM1_TIMEOUT_ERR BIT(1)
6587 #define B_BE_FSM_TIMEOUT_ERR BIT(0)
6591 #define B_BE_F2PCMD_PKTID_IMR BIT(30)
6592 #define B_BE_F2PCMD_RD_PKTID_IMR BIT(29)
6593 #define B_BE_F2PCMD_ASSIGN_PKTID_IMR BIT(28)
6594 #define B_BE_F2PCMD_USER_ALLC_IMR BIT(27)
6595 #define B_BE_RX_SPF_U0_PKTID_IMR BIT(26)
6596 #define B_BE_TX_SPF_U1_PKTID_IMR BIT(25)
6597 #define B_BE_TX_SPF_U2_PKTID_IMR BIT(24)
6598 #define B_BE_TX_SPF_U3_PKTID_IMR BIT(23)
6599 #define B_BE_TX_RECORD_PKTID_IMR BIT(22)
6600 #define B_BE_TWTSP_QSEL_IMR BIT(14)
6601 #define B_BE_F2P_RLS_CTN_SEL_IMR BIT(13)
6602 #define B_BE_BCNQ_ORDER_IMR BIT(12)
6603 #define B_BE_Q_PKTID_IMR BIT(11)
6604 #define B_BE_D_PKTID_IMR BIT(10)
6605 #define B_BE_TXPRT_FULL_DROP_IMR BIT(9)
6606 #define B_BE_F2PCMDRPT_FULL_DROP_IMR BIT(8)
6627 #define B_BE_F2PCMD_PKTID_ERR BIT(30)
6628 #define B_BE_F2PCMD_RD_PKTID_ERR BIT(29)
6629 #define B_BE_F2PCMD_ASSIGN_PKTID_ERR BIT(28)
6630 #define B_BE_F2PCMD_USER_ALLC_ERR BIT(27)
6631 #define B_BE_RX_SPF_U0_PKTID_ERR BIT(26)
6632 #define B_BE_TX_SPF_U1_PKTID_ERR BIT(25)
6633 #define B_BE_TX_SPF_U2_PKTID_ERR BIT(24)
6634 #define B_BE_TX_SPF_U3_PKTID_ERR BIT(23)
6635 #define B_BE_TX_RECORD_PKTID_ERR BIT(22)
6636 #define B_BE_TWTSP_QSEL_ERR BIT(14)
6637 #define B_BE_F2P_RLS_CTN_SEL_ERR BIT(13)
6638 #define B_BE_BCNQ_ORDER_ERR BIT(12)
6639 #define B_BE_Q_PKTID_ERR BIT(11)
6640 #define B_BE_D_PKTID_ERR BIT(10)
6641 #define B_BE_TXPRT_FULL_DROP_ERR BIT(9)
6642 #define B_BE_F2PCMDRPT_FULL_DROP_ERR BIT(8)
6646 #define B_BE_PTCL_FSM2_TO_MODE BIT(30)
6648 #define B_BE_PTCL_FSM1_TO_MODE BIT(22)
6650 #define B_BE_PTCL_FSM0_TO_MODE BIT(14)
6652 #define B_BE_PTCL_TX_ARB_TO_MODE BIT(6)
6653 #define B_BE_PTCL_TX_ARB_TO_THR_MASK GENMASK(5, 0)
6657 #define B_BE_PTCL_TXOP_STAT BIT(8)
6658 #define B_BE_PTCL_BUSY BIT(7)
6659 #define B_BE_PTCL_DROP BIT(5)
6668 #define B_BE_RX_CSI_NOT_RELEASE_ERROR BIT(31)
6669 #define B_BE_RX_GET_NULL_PKT_ERROR BIT(30)
6670 #define B_BE_RX_RU0_FSM_HANG_ERROR BIT(29)
6671 #define B_BE_RX_RU1_FSM_HANG_ERROR BIT(28)
6672 #define B_BE_RX_RU2_FSM_HANG_ERROR BIT(27)
6673 #define B_BE_RX_RU3_FSM_HANG_ERROR BIT(26)
6674 #define B_BE_RX_RU4_FSM_HANG_ERROR BIT(25)
6675 #define B_BE_RX_RU5_FSM_HANG_ERROR BIT(24)
6676 #define B_BE_RX_RU6_FSM_HANG_ERROR BIT(23)
6677 #define B_BE_RX_RU7_FSM_HANG_ERROR BIT(22)
6678 #define B_BE_RX_RXSTS_FSM_HANG_ERROR BIT(21)
6679 #define B_BE_RX_CSI_FSM_HANG_ERROR BIT(20)
6680 #define B_BE_RX_TXRPT_FSM_HANG_ERROR BIT(19)
6681 #define B_BE_RX_F2PCMD_FSM_HANG_ERROR BIT(18)
6682 #define B_BE_RX_RU0_ZERO_LENGTH_ERROR BIT(17)
6683 #define B_BE_RX_RU1_ZERO_LENGTH_ERROR BIT(16)
6684 #define B_BE_RX_RU2_ZERO_LENGTH_ERROR BIT(15)
6685 #define B_BE_RX_RU3_ZERO_LENGTH_ERROR BIT(14)
6686 #define B_BE_RX_RU4_ZERO_LENGTH_ERROR BIT(13)
6687 #define B_BE_RX_RU5_ZERO_LENGTH_ERROR BIT(12)
6688 #define B_BE_RX_RU6_ZERO_LENGTH_ERROR BIT(11)
6689 #define B_BE_RX_RU7_ZERO_LENGTH_ERROR BIT(10)
6690 #define B_BE_RX_RXSTS_ZERO_LENGTH_ERROR BIT(9)
6691 #define B_BE_RX_CSI_ZERO_LENGTH_ERROR BIT(8)
6692 #define B_BE_PLE_DATA_OPT_FSM_HANG BIT(7)
6693 #define B_BE_PLE_RXDATA_REQUEST_BUFFER_FSM_HANG BIT(6)
6694 #define B_BE_PLE_TXRPT_REQUEST_BUFFER_FSM_HANG BIT(5)
6695 #define B_BE_PLE_WD_OPT_FSM_HANG BIT(4)
6696 #define B_BE_PLE_ENQ_FSM_HANG BIT(3)
6697 #define B_BE_RXDATA_ENQUE_ORDER_ERROR BIT(2)
6698 #define B_BE_RXSTS_ENQUE_ORDER_ERROR BIT(1)
6699 #define B_BE_RX_CSI_PKT_NUM_ERROR BIT(0)
6703 #define B_BE_RX_CSI_NOT_RELEASE_ERROR_IMR BIT(31)
6704 #define B_BE_RX_GET_NULL_PKT_ERROR_IMR BIT(30)
6705 #define B_BE_RX_RU0_FSM_HANG_ERROR_IMR BIT(29)
6706 #define B_BE_RX_RU1_FSM_HANG_ERROR_IMR BIT(28)
6707 #define B_BE_RX_RU2_FSM_HANG_ERROR_IMR BIT(27)
6708 #define B_BE_RX_RU3_FSM_HANG_ERROR_IMR BIT(26)
6709 #define B_BE_RX_RU4_FSM_HANG_ERROR_IMR BIT(25)
6710 #define B_BE_RX_RU5_FSM_HANG_ERROR_IMR BIT(24)
6711 #define B_BE_RX_RU6_FSM_HANG_ERROR_IMR BIT(23)
6712 #define B_BE_RX_RU7_FSM_HANG_ERROR_IMR BIT(22)
6713 #define B_BE_RX_RXSTS_FSM_HANG_ERROR_IMR BIT(21)
6714 #define B_BE_RX_CSI_FSM_HANG_ERROR_IMR BIT(20)
6715 #define B_BE_RX_TXRPT_FSM_HANG_ERROR_IMR BIT(19)
6716 #define B_BE_RX_F2PCMD_FSM_HANG_ERROR_IMR BIT(18)
6717 #define B_BE_RX_RU0_ZERO_LENGTH_ERROR_IMR BIT(17)
6718 #define B_BE_RX_RU1_ZERO_LENGTH_ERROR_IMR BIT(16)
6719 #define B_BE_RX_RU2_ZERO_LENGTH_ERROR_IMR BIT(15)
6720 #define B_BE_RX_RU3_ZERO_LENGTH_ERROR_IMR BIT(14)
6721 #define B_BE_RX_RU4_ZERO_LENGTH_ERROR_IMR BIT(13)
6722 #define B_BE_RX_RU5_ZERO_LENGTH_ERROR_IMR BIT(12)
6723 #define B_BE_RX_RU6_ZERO_LENGTH_ERROR_IMR BIT(11)
6724 #define B_BE_RX_RU7_ZERO_LENGTH_ERROR_IMR BIT(10)
6725 #define B_BE_RX_RXSTS_ZERO_LENGTH_ERROR_IMR BIT(9)
6726 #define B_BE_RX_CSI_ZERO_LENGTH_ERROR_IMR BIT(8)
6727 #define B_BE_PLE_DATA_OPT_FSM_HANG_IMR BIT(7)
6728 #define B_BE_PLE_RXDATA_REQUEST_BUFFER_FSM_HANG_IMR BIT(6)
6729 #define B_BE_PLE_TXRPT_REQUEST_BUFFER_FSM_HANG_IMR BIT(5)
6730 #define B_BE_PLE_WD_OPT_FSM_HANG_IMR BIT(4)
6731 #define B_BE_PLE_ENQ_FSM_HANG_IMR BIT(3)
6732 #define B_BE_RXDATA_ENQUE_ORDER_ERROR_IMR BIT(2)
6733 #define B_BE_RXSTS_ENQUE_ORDER_ERROR_IMR BIT(1)
6734 #define B_BE_RX_CSI_PKT_NUM_ERROR_IMR BIT(0)
6791 #define B_BE_TX_RU0_FSM_HANG_ERROR BIT(31)
6792 #define B_BE_TX_RU1_FSM_HANG_ERROR BIT(30)
6793 #define B_BE_TX_RU2_FSM_HANG_ERROR BIT(29)
6794 #define B_BE_TX_RU3_FSM_HANG_ERROR BIT(28)
6795 #define B_BE_TX_RU4_FSM_HANG_ERROR BIT(27)
6796 #define B_BE_TX_RU5_FSM_HANG_ERROR BIT(26)
6797 #define B_BE_TX_RU6_FSM_HANG_ERROR BIT(25)
6798 #define B_BE_TX_RU7_FSM_HANG_ERROR BIT(24)
6799 #define B_BE_TX_RU8_FSM_HANG_ERROR BIT(23)
6800 #define B_BE_TX_RU9_FSM_HANG_ERROR BIT(22)
6801 #define B_BE_TX_RU10_FSM_HANG_ERROR BIT(21)
6802 #define B_BE_TX_RU11_FSM_HANG_ERROR BIT(20)
6803 #define B_BE_TX_RU12_FSM_HANG_ERROR BIT(19)
6804 #define B_BE_TX_RU13_FSM_HANG_ERROR BIT(18)
6805 #define B_BE_TX_RU14_FSM_HANG_ERROR BIT(17)
6806 #define B_BE_TX_RU15_FSM_HANG_ERROR BIT(16)
6807 #define B_BE_TX_CSI_FSM_HANG_ERROR BIT(15)
6808 #define B_BE_TX_WD_PLD_ID_FSM_HANG_ERROR BIT(14)
6812 #define B_BE_TX_RU0_FSM_HANG_ERROR_IMR BIT(31)
6813 #define B_BE_TX_RU1_FSM_HANG_ERROR_IMR BIT(30)
6814 #define B_BE_TX_RU2_FSM_HANG_ERROR_IMR BIT(29)
6815 #define B_BE_TX_RU3_FSM_HANG_ERROR_IMR BIT(28)
6816 #define B_BE_TX_RU4_FSM_HANG_ERROR_IMR BIT(27)
6817 #define B_BE_TX_RU5_FSM_HANG_ERROR_IMR BIT(26)
6818 #define B_BE_TX_RU6_FSM_HANG_ERROR_IMR BIT(25)
6819 #define B_BE_TX_RU7_FSM_HANG_ERROR_IMR BIT(24)
6820 #define B_BE_TX_RU8_FSM_HANG_ERROR_IMR BIT(23)
6821 #define B_BE_TX_RU9_FSM_HANG_ERROR_IMR BIT(22)
6822 #define B_BE_TX_RU10_FSM_HANG_ERROR_IMR BIT(21)
6823 #define B_BE_TX_RU11_FSM_HANG_ERROR_IMR BIT(20)
6824 #define B_BE_TX_RU12_FSM_HANG_ERROR_IMR BIT(19)
6825 #define B_BE_TX_RU13_FSM_HANG_ERROR_IMR BIT(18)
6826 #define B_BE_TX_RU14_FSM_HANG_ERROR_IMR BIT(17)
6827 #define B_BE_TX_RU15_FSM_HANG_ERROR_IMR BIT(16)
6828 #define B_BE_TX_CSI_FSM_HANG_ERROR_IMR BIT(15)
6829 #define B_BE_TX_WD_PLD_ID_FSM_HANG_ERROR_IMR BIT(14)
6869 #define B_BE_RX_RU8_FSM_HANG_ERROR BIT(29)
6870 #define B_BE_RX_RU9_FSM_HANG_ERROR BIT(28)
6871 #define B_BE_RX_RU10_FSM_HANG_ERROR BIT(27)
6872 #define B_BE_RX_RU11_FSM_HANG_ERROR BIT(26)
6873 #define B_BE_RX_RU12_FSM_HANG_ERROR BIT(25)
6874 #define B_BE_RX_RU13_FSM_HANG_ERROR BIT(24)
6875 #define B_BE_RX_RU14_FSM_HANG_ERROR BIT(23)
6876 #define B_BE_RX_RU15_FSM_HANG_ERROR BIT(22)
6877 #define B_BE_RX_RU8_ZERO_LENGTH_ERROR BIT(17)
6878 #define B_BE_RX_RU9_ZERO_LENGTH_ERROR BIT(16)
6879 #define B_BE_RX_RU10_ZERO_LENGTH_ERROR BIT(15)
6880 #define B_BE_RX_RU11_ZERO_LENGTH_ERROR BIT(14)
6881 #define B_BE_RX_RU12_ZERO_LENGTH_ERROR BIT(13)
6882 #define B_BE_RX_RU13_ZERO_LENGTH_ERROR BIT(12)
6883 #define B_BE_RX_RU14_ZERO_LENGTH_ERROR BIT(11)
6884 #define B_BE_RX_RU15_ZERO_LENGTH_ERROR BIT(10)
6888 #define B_BE_RX_RU8_FSM_HANG_ERROR_IMR BIT(29)
6889 #define B_BE_RX_RU9_FSM_HANG_ERROR_IMR BIT(28)
6890 #define B_BE_RX_RU10_FSM_HANG_ERROR_IMR BIT(27)
6891 #define B_BE_RX_RU11_FSM_HANG_ERROR_IMR BIT(26)
6892 #define B_BE_RX_RU12_FSM_HANG_ERROR_IMR BIT(25)
6893 #define B_BE_RX_RU13_FSM_HANG_ERROR_IMR BIT(24)
6894 #define B_BE_RX_RU14_FSM_HANG_ERROR_IMR BIT(23)
6895 #define B_BE_RX_RU15_FSM_HANG_ERROR_IMR BIT(22)
6896 #define B_BE_RX_RU8_ZERO_LENGTH_ERROR_IMR BIT(17)
6897 #define B_BE_RX_RU9_ZERO_LENGTH_ERROR_IMR BIT(16)
6898 #define B_BE_RX_RU10_ZERO_LENGTH_ERROR_IMR BIT(15)
6899 #define B_BE_RX_RU11_ZERO_LENGTH_ERROR_IMR BIT(14)
6900 #define B_BE_RX_RU12_ZERO_LENGTH_ERROR_IMR BIT(13)
6901 #define B_BE_RX_RU13_ZERO_LENGTH_ERROR_IMR BIT(12)
6902 #define B_BE_RX_RU14_ZERO_LENGTH_ERROR_IMR BIT(11)
6903 #define B_BE_RX_RU15_ZERO_LENGTH_ERROR_IMR BIT(10)
6941 #define B_BE_UPD_HGQMD BIT(1)
6942 #define B_BE_UPD_TIMIE BIT(0)
6949 #define B_BE_UL_EHT_MUMIMO_LTF_MODE BIT(30)
6950 #define B_BE_UL_HE_MUMIMO_LTF_MODE BIT(29)
6958 #define B_BE_RSP_STATIC_RTS_CHK_SERV_BW_EN BIT(30)
6959 #define B_BE_RSP_TBPPDU_CHK_PWR BIT(29)
6960 #define B_BE_RESP_PAIR_MACID_LEN_EN BIT(25)
6961 #define B_BE_RESP_TX_ABORT_TEST_EN BIT(24)
6962 #define B_BE_RESP_ER_SU_RU106_EN BIT(23)
6963 #define B_BE_RESP_ER_SU_EN BIT(22)
6964 #define B_BE_TXDATA_END_PS_OPT BIT(18)
6965 #define B_BE_CHECK_SOUNDING_SEQ BIT(17)
6966 #define B_BE_RXBA_IGNOREA2 BIT(16)
6972 #define B_BE_WMAC_RESP_STBC_EN BIT(31)
6973 #define B_BE_WMAC_RXFTM_TXACK_SB BIT(30)
6974 #define B_BE_WMAC_RXFTM_TXACKBWEQ BIT(29)
6975 #define B_BE_RESP_TB_CHK_TXTIME BIT(24)
6976 #define B_BE_RSP_CHK_CCA BIT(23)
6977 #define B_BE_WMAC_LDPC_EN BIT(22)
6978 #define B_BE_WMAC_SGIEN BIT(21)
6979 #define B_BE_WMAC_SPLCPEN BIT(20)
6980 #define B_BE_RESP_EHT_MCS15_REF BIT(19)
6981 #define B_BE_RESP_EHT_MCS14_REF BIT(18)
6982 #define B_BE_WMAC_BESP_EARLY_TXBA BIT(17)
6983 #define B_BE_WMAC_MBA_DUR_FORCE BIT(16)
6990 #define B_BE_WMAC_RESP_SR_MODE_EN BIT(31)
6993 #define B_BE_WMAC_RESP_DOPPLEB_BE_EN BIT(21)
6994 #define B_BE_WMAC_RESP_DCM_EN BIT(20)
6995 #define B_BE_WMAC_CLR_ABORT_RESP_TX_CNT BIT(15)
6996 #define B_BE_WMAC_RESP_REF_RATE_SEL BIT(12)
7001 #define B_BE_MACLBK_DIS_GCLK BIT(30)
7002 #define B_BE_MACLBK_STS_EN BIT(29)
7007 #define B_BE_MACLBK_EN BIT(0)
7011 #define B_BE_WMAC_NAV_UPPER_EN BIT(26)
7013 #define B_BE_WMAC_PLCP_UP_NAV_EN BIT(17)
7014 #define B_BE_WMAC_TF_UP_NAV_EN BIT(16)
7022 #define B_BE_RXTRIG_RU26_DIS BIT(21)
7023 #define B_BE_RXTRIG_FCSCHK_EN BIT(20)
7025 #define B_BE_RXTRIG_EN BIT(16)
7030 #define B_BE_WMAC_FTM_TIMEOUT_MODE BIT(30)
7032 #define B_BE_WMAC_MODE BIT(22)
7034 #define B_BE_RMAC_BFMER BIT(9)
7035 #define B_BE_RMAC_FTM BIT(8)
7036 #define B_BE_RMAC_CSI BIT(7)
7037 #define B_BE_TMAC_MIMO_CTRL BIT(6)
7038 #define B_BE_TMAC_RXTB BIT(5)
7039 #define B_BE_TMAC_HWSIGB_GEN BIT(4)
7040 #define B_BE_TMAC_TXPLCP BIT(3)
7041 #define B_BE_TMAC_RESP BIT(2)
7042 #define B_BE_TMAC_TXCTL BIT(1)
7043 #define B_BE_TMAC_MACTX BIT(0)
7067 #define B_BE_BFMER_ERR_FLAG BIT(9)
7068 #define B_BE_FTM_ERROR_FLAG_CLR BIT(8)
7069 #define B_BE_CSI_ERROR_FLAG_CLR BIT(7)
7070 #define B_BE_MIMOCTRL_ERROR_FLAG_CLR BIT(6)
7071 #define B_BE_RXTB_ERROR_FLAG_CLR BIT(5)
7072 #define B_BE_HWSIGB_GEN_ERROR_FLAG_CLR BIT(4)
7073 #define B_BE_TXPLCP_ERROR_FLAG_CLR BIT(3)
7074 #define B_BE_RESP_ERROR_FLAG_CLR BIT(2)
7075 #define B_BE_TXCTL_ERROR_FLAG_CLR BIT(1)
7076 #define B_BE_MACTX_ERROR_FLAG_CLR BIT(0)
7091 #define B_BE_CSI_ON_TIMEOUT_EN BIT(5)
7092 #define B_BE_STS_ON_TIMEOUT_EN BIT(4)
7093 #define B_BE_DATA_ON_TIMEOUT_EN BIT(3)
7094 #define B_BE_OFDM_CCA_TIMEOUT_EN BIT(2)
7095 #define B_BE_CCK_CCA_TIMEOUT_EN BIT(1)
7096 #define B_BE_PHY_TXON_TIMEOUT_EN BIT(0)
7107 #define B_BE_CSI_ON_TIMEOUT_ERR BIT(5)
7108 #define B_BE_STS_ON_TIMEOUT_ERR BIT(4)
7109 #define B_BE_DATA_ON_TIMEOUT_ERR BIT(3)
7110 #define B_BE_OFDM_CCA_TIMEOUT_ERR BIT(2)
7111 #define B_BE_CCK_CCA_TIMEOUT_ERR BIT(1)
7112 #define B_BE_PHY_TXON_TIMEOUT_ERR BIT(0)
7120 #define B_BE_BFMEE_MIMO_EN_SEL BIT(8)
7121 #define B_BE_BFMEE_MU_BFEE_DIS BIT(7)
7122 #define B_BE_BFMEE_CHECK_RPTPOLL_MACID_DIS BIT(6)
7123 #define B_BE_BFMEE_NOCHK_BFPOLL_BMP BIT(5)
7124 #define B_BE_BFMEE_VHTBFRPT_CHK BIT(4)
7125 #define B_BE_BFMEE_EHT_NDPA_EN BIT(3)
7126 #define B_BE_BFMEE_HE_NDPA_EN BIT(2)
7127 #define B_BE_BFMEE_VHT_NDPA_EN BIT(1)
7128 #define B_BE_BFMEE_HT_NDPA_EN BIT(0)
7132 #define B_BE_BFMEE_CSISEQ_SEL BIT(29)
7133 #define B_BE_BFMEE_BFPARAM_SEL BIT(28)
7135 #define B_BE_BFMEE_BF_PORT_SEL BIT(23)
7136 #define B_BE_BFMEE_USE_NSTS BIT(22)
7137 #define B_BE_BFMEE_CSI_RATE_FB_EN BIT(21)
7138 #define B_BE_BFMEE_CSI_GID_SEL BIT(20)
7140 #define B_BE_BFMEE_CSI_FORCE_RETE_EN BIT(17)
7141 #define B_BE_BFMEE_CSI_USE_NDPARATE BIT(16)
7142 #define B_BE_BFMEE_CSI_WITHHTC_EN BIT(15)
7143 #define B_BE_BFMEE_CSIINFO0_BF_EN BIT(14)
7144 #define B_BE_BFMEE_CSIINFO0_STBC_EN BIT(13)
7145 #define B_BE_BFMEE_CSIINFO0_LDPC_EN BIT(12)
7149 #define B_BE_BFMEE_CSIINFO0_NR_MASK GENMASK(5, 3)
7171 #define B_BE_ACK_BA_RESP_LEGACY_CHK_NSTR BIT(16)
7172 #define B_BE_ACK_BA_RESP_LEGACY_CHK_TX_NAV BIT(15)
7173 #define B_BE_ACK_BA_RESP_LEGACY_CHK_INTRA_NAV BIT(14)
7174 #define B_BE_ACK_BA_RESP_LEGACY_CHK_BASIC_NAV BIT(13)
7175 #define B_BE_ACK_BA_RESP_LEGACY_CHK_BTCCA BIT(12)
7176 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA160 BIT(11)
7177 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA80 BIT(10)
7178 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA40 BIT(9)
7179 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_EDCCA20 BIT(8)
7180 #define B_BE_ACK_BA_RESP_LEGACY_CHK_EDCCA_PER20_BMP BIT(7)
7181 #define B_BE_ACK_BA_RESP_LEGACY_CHK_CCA_PER20_BMP BIT(6)
7182 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA160 BIT(5)
7183 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA80 BIT(4)
7184 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA40 BIT(3)
7185 #define B_BE_ACK_BA_RESP_LEGACY_CHK_SEC_CCA20 BIT(2)
7186 #define B_BE_ACK_BA_RESP_LEGACY_CHK_EDCCA BIT(1)
7187 #define B_BE_ACK_BA_RESP_LEGACY_CHK_CCA BIT(0)
7191 #define B_BE_ACK_BA_RESP_HE_CHK_NSTR BIT(16)
7192 #define B_BE_ACK_BA_RESP_HE_CHK_TX_NAV BIT(15)
7193 #define B_BE_ACK_BA_RESP_HE_CHK_INTRA_NAV BIT(14)
7194 #define B_BE_ACK_BA_RESP_HE_CHK_BASIC_NAV BIT(13)
7195 #define B_BE_ACK_BA_RESP_HE_CHK_BTCCA BIT(12)
7196 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA160 BIT(11)
7197 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA80 BIT(10)
7198 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA40 BIT(9)
7199 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_EDCCA20 BIT(8)
7200 #define B_BE_ACK_BA_RESP_HE_CHK_EDCCA_PER20_BMP BIT(7)
7201 #define B_BE_ACK_BA_RESP_HE_CHK_CCA_PER20_BMP BIT(6)
7202 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA160 BIT(5)
7203 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA80 BIT(4)
7204 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA40 BIT(3)
7205 #define B_BE_ACK_BA_RESP_HE_CHK_SEC_CCA20 BIT(2)
7206 #define B_BE_ACK_BA_RESP_HE_CHK_EDCCA BIT(1)
7207 #define B_BE_ACK_BA_RESP_HE_CHK_CCA BIT(0)
7211 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_NSTR BIT(16)
7212 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_TX_NAV BIT(15)
7213 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_INTRA_NAV BIT(14)
7214 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_BASIC_NAV BIT(13)
7215 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_BTCCA BIT(12)
7216 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA160 BIT(11)
7217 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA80 BIT(10)
7218 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA40 BIT(9)
7219 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_EDCCA20 BIT(8)
7220 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_EDCCA_PER20_BMP BIT(7)
7221 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_CCA_PER20_BMP BIT(6)
7222 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA160 BIT(5)
7223 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA80 BIT(4)
7224 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA40 BIT(3)
7225 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_SEC_CCA20 BIT(2)
7226 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_EDCCA BIT(1)
7227 #define B_BE_ACK_BA_EHT_LEG_PUNC_CHK_CCA BIT(0)
7231 #define B_BE_BUSY_CHKSN BIT(15)
7232 #define B_BE_DYN_CHEN BIT(14)
7233 #define B_BE_AUTO_RST BIT(13)
7234 #define B_BE_TIMER_SEL BIT(12)
7235 #define B_BE_STOP_RX_IN BIT(11)
7236 #define B_BE_PSR_RDY_CHKDIS BIT(10)
7239 #define B_BE_PHY_RPT_SZ_MASK GENMASK(5, 4)
7240 #define B_BE_CH_EN BIT(0)
7248 #define B_BE_RX_DLK_RST_FSM BIT(3)
7249 #define B_BE_RX_DLK_RST_SKIPDMA BIT(2)
7250 #define B_BE_RX_DLK_RST_EN BIT(1)
7251 #define B_BE_RX_DLK_INT_EN BIT(0)
7256 #define B_BE_PLCP_RXFA_RESET_EN BIT(11)
7257 #define B_BE_DIS_CHK_MIN_LEN BIT(8)
7258 #define B_BE_HE_SIGB_CRC_CHK BIT(6)
7259 #define B_BE_VHT_MU_SIGB_CRC_CHK BIT(5)
7260 #define B_BE_VHT_SU_SIGB_CRC_CHK BIT(4)
7261 #define B_BE_SIGA_CRC_CHK BIT(3)
7262 #define B_BE_LSIG_PARITY_CHK_EN BIT(2)
7263 #define B_BE_CCK_SIG_CHK BIT(1)
7264 #define B_BE_CCK_CRC_CHK BIT(0)
7269 #define B_BE_UNSPT_TYPE BIT(22)
7271 #define B_BE_A_FTM_REQ BIT(14)
7272 #define B_BE_A_ERR_PKT BIT(13)
7273 #define B_BE_A_UNSUP_PKT BIT(12)
7274 #define B_BE_A_CRC32_ERR BIT(11)
7276 #define B_BE_A_BCN_CHK_EN BIT(7)
7277 #define B_BE_A_MC_LIST_CAM_MATCH BIT(6)
7278 #define B_BE_A_BC_CAM_MATCH BIT(5)
7279 #define B_BE_A_UC_CAM_MATCH BIT(4)
7280 #define B_BE_A_MC BIT(3)
7281 #define B_BE_A_BC BIT(2)
7282 #define B_BE_A_A1_MATCH BIT(1)
7283 #define B_BE_SNIFFER_MODE BIT(0)
7304 #define B_BE_ADDR_CAM_IORST BIT(10)
7305 #define B_BE_DIS_ADDR_CLK_GATED BIT(9)
7306 #define B_BE_ADDR_CAM_CLR BIT(8)
7307 #define B_BE_ADDR_CAM_A2_B0_CHK BIT(2)
7308 #define B_BE_ADDR_CAM_SRCH_PERPKT BIT(1)
7309 #define B_BE_ADDR_CAM_EN BIT(0)
7313 #define B_BE_BACAM_SKIP_ALL_QOSNULL BIT(24)
7314 #define B_BE_BACAM_STD_SSN_SEL BIT(20)
7317 #define B_BE_BACAM_SHIFT_POLL BIT(7)
7318 #define B_BE_BACAM_IORST BIT(6)
7319 #define B_BE_BACAM_GCK_DIS BIT(5)
7320 #define B_BE_COMPL_VAL BIT(3)
7321 #define B_BE_SSN_SEL BIT(2)
7329 #define B_BE_STAT_IORST BIT(13)
7330 #define B_BE_STAT_GCKDIS BIT(12)
7332 #define B_BE_PPDU_STAT_RPT_TRIG BIT(8)
7333 #define B_BE_PPDU_STAT_RPT_DMA BIT(6)
7334 #define B_BE_PPDU_STAT_RPT_CRC32 BIT(5)
7335 #define B_BE_PPDU_STAT_RPT_ADDR BIT(4)
7336 #define B_BE_APP_PLCP_HDR_RPT BIT(3)
7337 #define B_BE_APP_RX_CNT_RPT BIT(2)
7338 #define B_BE_PPDU_MAC_INFO BIT(1)
7339 #define B_BE_PPDU_STAT_RPT_EN BIT(0)
7343 #define B_BE_SR_OP_MODE_MASK GENMASK(5, 4)
7344 #define B_BE_SRG_CHK_EN BIT(2)
7345 #define B_BE_SR_CTRL_PLCP_EN BIT(1)
7346 #define B_BE_SR_EN BIT(0)
7350 #define B_BE_BSSID_MATCH BIT(3)
7351 #define B_BE_PARTIAL_AID_MATCH BIT(2)
7352 #define B_BE_BSSCOLOR_MATCH BIT(1)
7353 #define B_BE_PLCP_SRC_EN BIT(0)
7357 #define B_BE_CSIPRT_EHTSU_AID_EN BIT(26)
7358 #define B_BE_CSIPRT_HESU_AID_EN BIT(25)
7359 #define B_BE_CSIPRT_VHTSU_AID_EN BIT(24)
7363 #define B_BE_RX_ERR_TRIG_ACT_TO BIT(9)
7364 #define B_BE_RX_ERR_STS_ACT_TO BIT(8)
7365 #define B_BE_RX_ERR_CSI_ACT_TO BIT(7)
7366 #define B_BE_RX_ERR_ACT_TO BIT(6)
7367 #define B_BE_CSI_DATAON_ASSERT_TO BIT(5)
7368 #define B_BE_DATAON_ASSERT_TO BIT(4)
7369 #define B_BE_CCA_ASSERT_TO BIT(3)
7370 #define B_BE_RX_ERR_DMA_TO BIT(2)
7371 #define B_BE_RX_ERR_DATA_TO BIT(1)
7372 #define B_BE_RX_ERR_CCA_TO BIT(0)
7376 #define B_BE_RX_ERR_TRIG_ACT_TO_MSK BIT(9)
7377 #define B_BE_RX_ERR_STS_ACT_TO_MSK BIT(8)
7378 #define B_BE_RX_ERR_CSI_ACT_TO_MSK BIT(7)
7379 #define B_BE_RX_ERR_ACT_TO_MSK BIT(6)
7380 #define B_BE_CSI_DATAON_ASSERT_TO_MSK BIT(5)
7381 #define B_BE_DATAON_ASSERT_TO_MSK BIT(4)
7382 #define B_BE_CCA_ASSERT_TO_MSK BIT(3)
7383 #define B_BE_RX_ERR_DMA_TO_MSK BIT(2)
7384 #define B_BE_RX_ERR_DATA_TO_MSK BIT(1)
7385 #define B_BE_RX_ERR_CCA_TO_MSK BIT(0)
7402 #define B_BE_PLCP_CLOSE_RX_UNSPUUORT BIT(19)
7403 #define B_BE_PLCP_CLOSE_RX_BB_BRK BIT(18)
7404 #define B_BE_PLCP_CLOSE_RX_PSDU_PRES BIT(17)
7405 #define B_BE_PLCP_CLOSE_RX_NDP BIT(16)
7406 #define B_BE_PLCP_NSS_SRC BIT(11)
7407 #define B_BE_PLCP_DOPPLEB_BE_SRC BIT(10)
7408 #define B_BE_PLCP_STBC_SRC BIT(9)
7409 #define B_BE_PLCP_SU_PSDU_LEN_SRC BIT(8)
7410 #define B_BE_PLCP_RXSB_SRC BIT(7)
7411 #define B_BE_PLCP_BW_SRC_MASK GENMASK(6, 5)
7412 #define B_BE_PLCP_GILTF_SRC BIT(4)
7413 #define B_BE_PLCP_NSTS_SRC BIT(3)
7414 #define B_BE_PLCP_MCS_SRC BIT(2)
7415 #define B_BE_PLCP_CH20_WIDATA_SRC BIT(1)
7416 #define B_BE_PLCP_PPDU_TYPE_SRC BIT(0)
7425 #define B_BE_RESP_TBL_FLAG_ERR_ISR_EN BIT(17)
7426 #define B_BE_RESP_SEC_DOUBLE_HIT_ERR_ISR_EN BIT(16)
7427 #define B_BE_RESP_WRPTR_CROSS_ERR_ISR_EN BIT(15)
7428 #define B_BE_RESP_TOO_MANY_PLD_ERR_ISR_EN BIT(14)
7429 #define B_BE_RESP_TXDMA_READ_DATA_ERR_ISR_EN BIT(13)
7430 #define B_BE_RESP_PLDID_RDY_ERR_ISR_EN BIT(12)
7431 #define B_BE_RESP_RX_OVERWRITE_ERR_ISR_EN BIT(11)
7432 #define B_BE_RESP_RXDMA_WRPTR_INVLD_ERR_ISR_EN BIT(10)
7433 #define B_BE_RESP_RXDMA_REQ_INVLD_ERR_ISR_EN BIT(9)
7434 #define B_BE_RESP_RXDMA_REQ_MACID_ERR_ISR_EN BIT(8)
7435 #define B_BE_RESP_TXCMD_TX_ST_ABORT_ERR_ISR_EN BIT(6)
7436 #define B_BE_RESP_TXCMD_DMAC_PROC_ERR_ISR_EN BIT(5)
7437 #define B_BE_RESP_TXCMD_TBL_ERR_ISR_EN BIT(4)
7438 #define B_BE_RESP_INITCMD_RX_ST_ABORT_ERR_ISR_EN BIT(3)
7439 #define B_BE_RESP_INITCMD_RESERVD_PAGE_ABORT_ERR_ISR_EN BIT(2)
7440 #define B_BE_RESP_INITCMD_TX_ST_ABORT_ERR_ISR_EN BIT(1)
7441 #define B_BE_RESP_DMAC_PROC_ERR_ISR_EN BIT(0)
7480 #define B_BE_PWR_FORCE_LMT_ON BIT(6)
7484 #define B_BE_FORCE_PWR_BY_RATE_EN BIT(19)
7493 #define B_BE_PWR_CTRL_SEL BIT(16)
7494 #define B_BE_PWR_FORCE_RATE_ON BIT(29)
7497 #define B_BE_PWR_FORCE_RU_ON BIT(18)
7498 #define B_BE_PWR_FORCE_RU_ENON BIT(28)
7500 #define B_BE_PWR_FORCE_MACID_ON BIT(9)
7503 #define B_BE_PWR_BT_EN BIT(23)
7528 #define B_BE_FSM_TIMEOUT_ERR_INT_EN BIT(0)
7543 #define RR_MOD_DPK GENMASK(19, 5)
7547 #define RR_MOD_RXB GENMASK(9, 5)
7559 #define RR_MOD_M_RXBB GENMASK(9, 5)
7560 #define RR_MOD_LO_SEL BIT(1)
7563 #define RR_MODOPT_M_TXPWR GENMASK(5, 0)
7567 #define RR_RSV1_RST BIT(0)
7569 #define RR_BBDC_SEL BIT(0)
7588 #define RR_CFGCH_POW_LCK BIT(15)
7589 #define RR_CFGCH_TRX_AH BIT(14)
7590 #define RR_CFGCH_BCN BIT(13)
7591 #define RR_CFGCH_BW2 BIT(12)
7609 #define RR_APK_MOD GENMASK(5, 4)
7619 #define RR_RXKPLL_OFF GENMASK(5, 0)
7620 #define RR_RXKPLL_POW BIT(19)
7625 #define RR_RXK_SEL2G BIT(8)
7626 #define RR_RXK_SEL5G BIT(7)
7627 #define RR_RXK_PLLEN BIT(5)
7635 #define RR_LUTWD0_LB GENMASK(5, 0)
7637 #define RR_TM_TRI BIT(19)
7643 #define RR_TXG1_ATT2 BIT(19)
7644 #define RR_TXG1_ATT1 BIT(11)
7646 #define RR_TXG2_ATT0 BIT(11)
7649 #define RR_TXGA_TRK_EN BIT(7)
7651 #define RR_TXGA_LOK_EN BIT(0)
7653 #define RR_TXGA_V1_TRK_EN BIT(7)
7656 #define RR_GAINTX_PAD GENMASK(9, 5)
7662 #define RR_TXMO_FIQ GENMASK(5, 2)
7666 #define RR_TXRSV_GAPK BIT(19)
7668 #define RR_BIAS_GAPK BIT(19)
7689 #define RR_TXVBUF_DACEN BIT(5)
7691 #define RR_TXPOW_TXA BIT(8)
7692 #define RR_TXPOW_TXAS BIT(7)
7693 #define RR_TXPOW_TXG BIT(1)
7726 #define RR_RXBB2_DAC_EN BIT(13)
7727 #define RR_RXBB2_CKT BIT(12)
7730 #define RR_RXBB2_EBW GENMASK(6, 5)
7737 #define RR_DCK_DONE GENMASK(7, 5)
7738 #define RR_DCK_FINE BIT(1)
7739 #define RR_DCK_LV BIT(0)
7743 #define RR_DCK1_DONE BIT(5)
7745 #define RR_DCK1_SEL BIT(3)
7749 #define RR_DCKC_CHK BIT(3)
7756 #define RR_TIA_N6 BIT(8)
7772 #define RR_VCI_ON BIT(7)
7774 #define RR_LPF_BUSY BIT(8)
7778 #define RR_SYNFB_LK BIT(15)
7781 #define RR_LCKST_BIN BIT(0)
7783 #define RR_LCK_TRGSEL BIT(8)
7784 #define RR_LCK_ST BIT(4)
7786 #define RR_MMD_RST_EN BIT(8)
7787 #define RR_MMD_RST_SYN BIT(6)
7789 #define RR_VCO2 BIT(19)
7793 #define RR_SYNLUT_MOD BIT(4)
7796 #define RR_RCKD_BW BIT(2)
7799 #define RR_LUTDBG_TIA BIT(12)
7800 #define RR_LUTDBG_LOK BIT(2)
7802 #define RR_CAL_RW BIT(19)
7804 #define RR_LUTWE2_RTXBW BIT(2)
7805 #define RR_LUTWE2_DIS BIT(6)
7807 #define RR_LUTWE_LOK BIT(2)
7809 #define RR_WCAL BIT(16)
7810 #define RR_RFC_CKEN BIT(1)
7814 #define B_CLK_640M BIT(2)
7816 #define B_P0_RSTB_WATCH_DOG BIT(0)
7817 #define B_P1_RSTB_WATCH_DOG BIT(1)
7818 #define B_UPD_P0_EN BIT(31)
7822 #define B_CHK_LPS_STAT BIT(0)
7824 #define B_SPOOF_CG_EN BIT(17)
7829 #define B_DFS_CG_EN BIT(1)
7830 #define B_DFS_FFT_EN BIT(0)
7839 #define B_ANAPAR_EN1 BIT(31)
7840 #define B_ANAPAR_ADCCLK BIT(30)
7841 #define B_ANAPAR_FLTRST BIT(22)
7843 #define B_ANAPAR_EN BIT(16)
7856 #define B_SWSI_DATA_BIT_MASK_EN_V1 BIT(31)
7873 #define B_EN_SND_WO_NDP BIT(1)
7879 #define B_RXCCA_BE1_DIS BIT(0)
7881 #define B_UPD_GEN_ON BIT(27)
7883 #define B_UPD_CLK_ADC_ON BIT(24)
7884 #define B_ENABLE_CCK BIT(5)
7887 #define B_RSTB_ASYNC_ALL BIT(1)
7889 #define B_P0_HW_ANTSW_DIS_BY_GNT_BT BIT(12)
7895 #define B_STS_DIS_TRIG_BY_FAIL BIT(3)
7896 #define B_STS_DIS_TRIG_BY_BRK BIT(2)
7918 #define B_PMAC_GNT_TXEN BIT(0)
7919 #define B_PMAC_GNT_RXEN BIT(16)
7927 #define B_MAC_SEL_OFDM_TRI_FILTER BIT(31)
7929 #define B_MAC_SEL_PWR_EN BIT(16)
7930 #define B_MAC_SEL_DPD_EN BIT(10)
7933 #define B_PMAC_TXEN_DIS BIT(0)
7936 #define B_PMAC_CTX_EN BIT(0)
7937 #define B_PMAC_PTX_EN BIT(4)
7941 #define B_P80_AT_HIGH_FREQ BIT(26)
7943 #define B_DBCC_80P80_SEL_EVM_RPT_EN BIT(0)
7947 #define B_MEASUREMENT_TRIG_MSK BIT(2)
7948 #define B_CCX_TRIG_OPT_MSK BIT(1)
7949 #define B_CCX_EN_MSK BIT(0)
7951 #define B_RXTD_CKEN BIT(2)
7955 #define B_IFS_COUNTER_CLR_MSK BIT(13)
7956 #define B_IFS_COLLECT_EN BIT(12)
7959 #define B_IFS_T1_EN_MSK BIT(15)
7963 #define B_IFS_T2_EN_MSK BIT(15)
7967 #define B_IFS_T3_EN_MSK BIT(15)
7971 #define B_IFS_T4_EN_MSK BIT(15)
7974 #define B_PD_HIT_DIS BIT(9)
7977 #define B_IOQ_IQK_DPK_EN BIT(1)
7979 #define B_GNT_BT_WGT_EN BIT(21)
7982 #define B_IQK_DPK_RST BIT(0)
7987 #define B_TXGATING_EN BIT(4)
7992 #define B_PD_ARBITER_OFF BIT(31)
7998 #define B_UDP_COEEF BIT(19)
8006 #define B_P0_EN_SOUND_WO_NDP BIT(1)
8012 #define B_SPOOF_ASYNC_RST BIT(15)
8015 #define B_NDP_RU_BRK BIT(0)
8020 #define B_CTLTOP_ON BIT(23)
8031 #define B_P0_RXCK_BW3 BIT(30)
8033 #define B_P0_RXCK_ON BIT(19)
8035 #define B_P0_TXCK_ON BIT(15)
8045 #define B_P0_NRBW_DBG BIT(30)
8046 #define B_P0_NRBW_RSTB BIT(28)
8053 #define B_S0_RXDC2_MEN GENMASK(5, 4)
8061 #define B_EDCCA_RPT_B_FB BIT(7)
8062 #define B_EDCCA_RPT_B_P20 BIT(6)
8063 #define B_EDCCA_RPT_B_S20 BIT(5)
8064 #define B_EDCCA_RPT_B_S40 BIT(4)
8065 #define B_EDCCA_RPT_B_S80 BIT(3)
8068 #define B_SWSI_W_BUSY_V1 BIT(24)
8069 #define B_SWSI_R_BUSY_V1 BIT(25)
8070 #define B_SWSI_R_DATA_DONE_V1 BIT(26)
8108 #define B_IFSCNT_DONE_MSK BIT(16)
8115 #define B_TSSI_CWRPT_RDY BIT(16)
8122 #define B_TXAGC_RF GENMASK(5, 0)
8135 #define B_ADC_FIFO_A3 BIT(28)
8136 #define B_ADC_FIFO_A2 BIT(24)
8137 #define B_ADC_FIFO_A1 BIT(20)
8138 #define B_ADC_FIFO_A0 BIT(16)
8156 #define B_11B_RXCCA_DIS_V1 BIT(0)
8160 #define B_RXCCA_DIS BIT(31)
8162 #define B_RXCCA_DIS_V1 BIT(0)
8164 #define B_RXSC_EN BIT(0)
8172 #define B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY1 BIT(14)
8173 #define B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY0 BIT(13)
8175 #define B_DBCC_80P80_SEL_EVM_RPT2_EN BIT(0)
8181 #define B_IQKDPK_HC BIT(28)
8186 #define B_HWSI_ADD_RD BIT(2)
8188 #define B_HWSI_ADD_RUN BIT(1)
8189 #define B_HWSI_ADD_BUSY BIT(0)
8195 #define B_HWSI_VAL_RDONE BIT(31)
8196 #define B_HWSI_VAL_BUSY BIT(29)
8198 #define B_P1_EN_SOUND_WO_NDP BIT(1)
8204 #define B_P1_RXCK_BW3 BIT(30)
8206 #define B_P1_RXCK_ON BIT(19)
8216 #define B_P1_DBGMOD_ON BIT(30)
8221 #define B_S1_RXDC2_EN GENMASK(5, 4)
8247 #define B_MUIC_EN BIT(0)
8249 #define B_BT_RXBY_WBADC_A BIT(31)
8251 #define B_BT_SHARE_A BIT(0)
8252 #define B_BT_TRK_OFF_A BIT(1)
8253 #define B_BTG_PATH_A BIT(4)
8263 #define B_SEG0CSI_EN BIT(23)
8267 #define B_BSS_CLR_MAP_VLD0 BIT(28)
8274 #define B_T2F_GI_COMB_EN BIT(2)
8277 #define B_BT_DYN_DC_EST_EN_MSK BIT(31)
8279 #define B_ASSIGN_SBD_OPT_EN_V1 BIT(31)
8281 #define B_ASSIGN_SBD_OPT_EN BIT(24)
8285 #define B_DAC_CLK_IDX BIT(31)
8288 #define B_DCFO_OPT_EN BIT(29)
8291 #define B_BANDEDGE_EN BIT(30)
8310 #define B_BT_RXBY_WBADC_B BIT(31)
8312 #define B_BT_SHARE_B BIT(0)
8313 #define B_BT_TRK_OFF_B BIT(1)
8314 #define B_BTG_PATH_B BIT(4)
8348 #define B_PATH0_LNA_ERR_G1_G_MSK GENMASK(5, 0)
8353 #define B_PATH0_LNA_ERR_G3_A_MSK GENMASK(5, 0)
8359 #define B_PATH0_LNA_ERR_G6_G_MSK GENMASK(5, 0)
8366 #define B_PATH0_TIA_ERR_G1_A_MSK GENMASK(5, 0)
8370 #define B_PATH0_RXB_INIT_IDX_MSK GENMASK(9, 5)
8377 #define B_PATH0_TIA_INIT_IDX_MSK BIT(17)
8382 #define B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
8387 #define B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
8398 #define B_CDD_EVM_CHK_EN BIT(0)
8400 #define B_PATH0_BAND_SEL_MSK_V1 BIT(17)
8401 #define B_PATH0_BAND_NRBW_EN_V1 BIT(16)
8403 #define B_PATH0_BT_SHARE_V1 BIT(19)
8405 #define B_PATH0_BTG_PATH_V1 BIT(22)
8408 #define B_P0_NBIIDX_NOTCH_EN BIT(12)
8411 #define B_P0_NBIIDX_NOTCH_EN_V1 BIT(12)
8415 #define B_P0_AGC_EN BIT(31)
8420 #define B_PATH0_TIA_INIT_IDX_MSK_V1 BIT(9)
8422 #define B_PATH1_TIA_INIT_IDX_MSK BIT(17)
8426 #define B_PATH1_RXB_INIT_IDX_MSK GENMASK(9, 5)
8433 #define B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
8438 #define B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
8444 #define B_PATH1_BAND_SEL_MSK_V1 BIT(17)
8445 #define B_PATH1_BAND_NRBW_EN_V1 BIT(16)
8447 #define B_PATH1_BT_SHARE_V1 BIT(19)
8449 #define B_PATH1_BTG_PATH_V1 BIT(22)
8452 #define B_P1_NBIIDX_NOTCH_EN BIT(12)
8454 #define B_PKT_POP_EN BIT(8)
8463 #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1 BIT(30)
8464 #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK BIT(29)
8469 #define B_2P4G_BAND_SEL BIT(1)
8482 #define B_BT_SHARE BIT(14)
8490 #define B_CUSTOMIZE_Q_MATRIX_EN BIT(0)
8509 #define B_PD_BOOST_EN BIT(7)
8522 #define B_P1_AGC_EN BIT(31)
8524 #define B_PATH1_TIA_INIT_IDX_MSK_V1 BIT(9)
8546 #define B_PATH0_NOTCH_EN BIT(12)
8549 #define B_PATH0_NOTCH2_EN BIT(12)
8553 #define B_PATH0_5MDET_EN BIT(12)
8554 #define B_PATH0_5MDET_SB2 BIT(8)
8555 #define B_PATH0_5MDET_SB0 BIT(6)
8556 #define B_PATH0_5MDET_TH GENMASK(5, 0)
8560 #define B_PATH1_NOTCH_EN BIT(12)
8563 #define B_PATH1_NOTCH2_EN BIT(12)
8567 #define B_PATH1_5MDET_EN BIT(12)
8568 #define B_PATH1_5MDET_SB2 BIT(8)
8569 #define B_PATH1_5MDET_SB0 BIT(6)
8570 #define B_PATH1_5MDET_TH GENMASK(5, 0)
8572 #define B_S0S1_CSI_WGT_EN BIT(0)
8579 #define B_CHINFO_SCAL BIT(8)
8591 #define B_RX_BW40_2XFFT_EN_MSK_V1 BIT(26)
8599 #define B_BMODE_PDTH_LIMIT_EN_MSK_V1 BIT(30)
8601 #define B_BSS_CLR_VLD0_V2 BIT(2)
8605 #define B_CFO_COMP_VALID_BIT BIT(29)
8625 #define B_DAC_VAL BIT(31)
8627 #define B_DPD_DIS BIT(14)
8628 #define B_DPD_GDIS BIT(13)
8629 #define B_IQK_RFC_ON BIT(1)
8631 #define B_TXPWRB_ON BIT(28)
8634 #define B_DPD_OFT_EN BIT(28)
8639 #define B_P0_TSSIC_BYPASS BIT(11)
8643 #define B_TXPWRB_RDY BIT(15)
8646 #define B_P0_TMETER_DIS BIT(16)
8647 #define B_P0_TMETER_TRK BIT(24)
8649 #define B_P0_ADCFF_EN BIT(24)
8651 #define B_P1_TSSIC_BYPASS BIT(11)
8653 #define B_P0_TSSI_TRK_EN BIT(30)
8655 #define B_P0_TSSI_OFT_EN BIT(28)
8658 #define B_P0_TSSI_EN BIT(31)
8662 #define B_P0_RFCTM_EN BIT(29)
8665 #define R_P0_RFCTM_RDY BIT(26)
8667 #define B_P0_BT_FORCE_ANTIDX_EN BIT(12)
8668 #define B_P0_TRSW_X BIT(2)
8669 #define B_P0_TRSW_A BIT(1)
8670 #define B_P0_TX_ANT_SEL BIT(1)
8671 #define B_P0_TRSW_B BIT(0)
8672 #define B_P0_ANT_TRAIN_EN BIT(0)
8673 #define B_P0_TRSW_SO_A2 GENMASK(7, 5)
8675 #define B_P0_ANTSEL_SW_5G BIT(25)
8676 #define B_P0_ANTSEL_SW_2G BIT(23)
8677 #define B_P0_ANTSEL_BTG_TRX BIT(21)
8678 #define B_P0_ANTSEL_CGCS_CTRL BIT(17)
8679 #define B_P0_ANTSEL_HW_CTRL BIT(16)
8691 #define B_P0_RFM_DIS_WL BIT(7)
8692 #define B_P0_RFM_TX_OPT BIT(6)
8693 #define B_P0_RFM_BT_EN BIT(5)
8696 #define B_P0_PATH_RST BIT(27)
8700 #define B_P0_TXPW_RSTB_MANON BIT(30)
8701 #define B_P0_TXPW_RSTB_TSSI BIT(31)
8706 #define B_P0_TSSI_MV_CLR BIT(14)
8708 #define B_TXGAIN_SCALE_EN BIT(19)
8711 #define B_P0_DAC_COMP_POST_DPD_EN BIT(31)
8715 #define B_S0_DACKI_EN BIT(3)
8724 #define B_S0_DACKQ_EN BIT(3)
8736 #define B_DCFO_OPT_EN_V1 BIT(17)
8740 #define B_TXFCTR_EN BIT(19)
8769 #define B_SEGSND_EN BIT(31)
8771 #define B_DBCC_EN BIT(0)
8773 #define B_BW40_2XFFT BIT(31)
8781 #define B_ANT_BT_SHARE BIT(16)
8797 #define B_EHT_MCS14 BIT(31)
8800 #define B_EHT_MCS15 BIT(31)
8803 #define B_TB_EN BIT(23)
8804 #define B_HEMU_EN BIT(21)
8805 #define B_HEERSU_EN BIT(19)
8806 #define B_EHTTB_EN BIT(15)
8809 #define B_SU_PUNC_EN BIT(1)
8811 #define B_HWGEN_EN BIT(25)
8812 #define B_PWROFST_COMP BIT(20)
8816 #define B_DBCC_FA BIT(12)
8831 #define B_P1_TXPW_RDY BIT(15)
8833 #define B_P1_TSSIC_BYPASS BIT(11)
8836 #define B_P1_TMETER_DIS BIT(16)
8837 #define B_P1_TMETER_TRK BIT(24)
8839 #define B_P1_TSSI_TRK_EN BIT(30)
8841 #define B_P1_TSSI_OFT_EN BIT(28)
8844 #define B_P1_TSSI_EN BIT(31)
8849 #define R_P1_RFCTM_RDY BIT(26)
8853 #define B_P1_PATH_RST BIT(27)
8855 #define B_P1_ADCFF_EN BIT(24)
8857 #define B_P1_TXPW_RSTB_MANON BIT(30)
8858 #define B_P1_TXPW_RSTB_TSSI BIT(31)
8863 #define B_P1_TSSI_MV_CLR BIT(14)
8865 #define B_P1_DAC_COMP_POST_DPD_EN BIT(31)
8869 #define B_S1_DACKI_EN BIT(3)
8878 #define B_S1_DACKQ_EN BIT(3)
8888 #define B_NCTL_RPT_FLG BIT(26)
8904 #define B_IQK_CFG_SET GENMASK(5, 4)
8911 #define B_MDPK_SYNC_SEL BIT(31)
8915 #define B_MDPK_RX_DCK_EN BIT(31)
8923 #define B_DPK_IDL BIT(8)
8925 #define B_LDL_NORM_MA BIT(16)
8929 #define B_DPK_CTL_EN BIT(28)
8933 #define B_DPK_CFG2_ST BIT(14)
8942 #define B_IDL_DN BIT(31)
8943 #define B_IDL_MD530 BIT(1)
8944 #define B_IDL_MD500 BIT(0)
8946 #define B_GAPK_ADR BIT(0)
8949 #define B_DPK_MPA_T0 BIT(10)
8950 #define B_DPK_MPA_T1 BIT(9)
8951 #define B_DPK_MPA_T2 BIT(8)
8953 #define B_DPK_WR_ST BIT(29)
8955 #define B_DPK_TRK_DIS BIT(31)
8957 #define B_PRT_COM_SYNERR BIT(30)
8962 #define B_PRT_COM_RXOV BIT(8)
8965 #define B_PRT_COM_RXBB GENMASK(5, 0)
8967 #define B_PRT_COM_DONE BIT(0)
8970 #define B_COEF_SEL_IQC BIT(0)
8972 #define B_COEF_SEL_MDPD BIT(8)
8974 #define B_COEF_SEL_EN BIT(31)
8977 #define B_IQK_RES_K BIT(28)
8982 #define B_RXIQC_BYPASS BIT(0)
8983 #define B_RXIQC_BYPASS2 BIT(2)
8987 #define B_KIP_DBCC BIT(0)
8988 #define B_KIP_RFGAIN BIT(8)
8997 #define B_CFIR_LUT_SEL BIT(8)
8998 #define B_CFIR_LUT_SET BIT(4)
8999 #define B_CFIR_LUT_G5 BIT(5)
9000 #define B_CFIR_LUT_G3 BIT(3)
9001 #define B_CFIR_LUT_G2 BIT(2)
9008 #define B_DPD_LBK BIT(7)
9020 #define B_TXAGC_RFK_CH0 GENMASK(5, 0)
9022 #define B_DPD_COM_OF BIT(15)
9025 #define B_KIP_IQP_IQSW GENMASK(5, 0)
9030 #define B_LOAD_COEF_MDPD BIT(16)
9032 #define B_LOAD_COEF_DI BIT(1)
9033 #define B_LOAD_COEF_AUTO BIT(0)
9041 #define B_RPT_PER_TH GENMASK(5, 0)
9043 #define B_IQRSN_K1 BIT(28)
9044 #define B_IQRSN_K2 BIT(16)
9067 #define B_IQKINF_F_RX BIT(3)
9068 #define B_IQKINF_FTX BIT(2)
9069 #define B_IQKINF_FFIN BIT(1)
9070 #define B_IQKINF_FCOR BIT(0)
9081 #define B_DCOF0_RST BIT(17)
9085 #define B_DCOF1_RST BIT(17)
9086 #define B_DCOF1_S BIT(0)
9091 #define B_DCOF9_RST BIT(17)
9093 #define B_DACK_S0P0_OK BIT(31)
9098 #define B_DACK_S0P2_OK BIT(2)
9102 #define B_DACK_S0P1_OK BIT(31)
9107 #define B_DACK_S0P3_OK BIT(2)
9111 #define B_DRCK_LAT BIT(9)
9114 #define B_DRCK_IDLE BIT(9)
9115 #define B_DRCK_EN BIT(6)
9119 #define B_DRCK_POL BIT(3)
9121 #define B_DRCK_V1_SEL BIT(9)
9122 #define B_DRCK_V1_KICK BIT(6)
9126 #define B_DRCK_RS_DONE BIT(3)
9134 #define B_P0_CFCH_EX BIT(13)
9135 #define B_P0_CFCH_BW1 GENMASK(8, 5)
9137 #define B_WDADC_SEL GENMASK(5, 4)
9146 #define B_ADDCK_DS BIT(16)
9148 #define B_ADDCK0_TRG BIT(11)
9149 #define B_ADDCK0_IQ BIT(10)
9151 #define B_ADDCK0_MAN GENMASK(5, 4)
9152 #define B_ADDCK0_EN BIT(4)
9154 #define B_ADDCK0_RST BIT(2)
9164 #define B_DACK10_RST BIT(17)
9168 #define B_DACK1_RST BIT(17)
9169 #define B_DACK1_EN BIT(0)
9174 #define B_DACK2_RST BIT(17)
9175 #define B_DACK2_EN BIT(0)
9177 #define B_DACK_S1P0_OK BIT(31)
9183 #define B_DACK_S1P2_OK BIT(2)
9187 #define B_DACK_S1P1_OK BIT(31)
9193 #define B_DACK_S1P3_OK BIT(2)
9199 #define B_PATH0_BW_SEL_MSK_V1 GENMASK(8, 5)
9201 #define B_PATH1_BW_SEL_EX BIT(13)
9202 #define B_PATH1_BW_SEL_MSK_V1 GENMASK(8, 5)
9207 #define B_ADDCK1_TRG BIT(11)
9209 #define B_ADDCK1_MAN GENMASK(5, 4)
9210 #define B_ADDCK1_EN BIT(4)
9211 #define B_ADDCK1_RST BIT(2)
9220 #define B_DACKN0_EN BIT(0)
9224 #define B_DACKN1_ON BIT(0)
9226 #define B_DACKN2_ON BIT(0)
9228 #define B_DACKN3_ON BIT(0)
9230 #define B_GAIN_MAP0_EN BIT(0)
9232 #define B_GAIN_MAP1_EN BIT(0)
9238 #define B_IQK_DPK_PRST BIT(27)
9240 #define B_TXPWR_RSTA BIT(16)
9243 #define B_TSSI_CONT_EN BIT(3)
9257 #define B_TXPWR_RSTB BIT(16)
9261 #define B_AX_WDT_EN BIT(31)
9262 #define B_AX_WDT_OPT_RESET_PLATFORM_EN BIT(29)
9263 #define B_AX_IO_HANG_IMR BIT(27)
9264 #define B_AX_IO_HANG_CMAC_RDATA_EN BIT(26)
9265 #define B_AX_IO_HANG_DMAC_EN BIT(25)
9266 #define B_AX_WDT_CLR BIT(16)
9271 #define B_AX_FS_WDT_INT BIT(8)
9272 #define B_AX_FS_WDT_INT_MSK BIT(0)