Lines Matching refs:rf_path
794 u32 rtw89_phy_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
801 if (rf_path >= rtwdev->chip->rf_path_num) {
802 rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
807 direct_addr = base_addr[rf_path] + (addr << 2);
817 enum rtw89_rf_path rf_path, u32 addr, u32 mask)
833 val = FIELD_PREP(B_SWSI_READ_ADDR_PATH_V1, rf_path) |
849 u32 rtw89_phy_read_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
854 if (rf_path >= rtwdev->chip->rf_path_num) {
855 rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
860 return rtw89_phy_read_rf(rtwdev, rf_path, addr, mask);
862 return rtw89_phy_read_rf_a(rtwdev, rf_path, addr, mask);
867 enum rtw89_rf_path rf_path, u32 addr)
875 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_CTL_MASK, 0x1);
878 rtwdev, r_addr_ofst[rf_path], B_HWSI_VAL_BUSY);
884 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_MASK, addr);
885 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_RD, 0x1);
890 rtwdev, r_addr_ofst[rf_path], B_HWSI_VAL_RDONE);
897 val = rtw89_phy_read32_mask(rtwdev, r_addr_ofst[rf_path], RFREG_MASK);
899 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_POLL_MASK, 0);
905 enum rtw89_rf_path rf_path, u32 addr, u32 mask)
909 val = rtw89_phy_read_full_rf_v2_a(rtwdev, rf_path, addr);
914 u32 rtw89_phy_read_rf_v2(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
919 if (rf_path >= rtwdev->chip->rf_path_num) {
920 rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
925 return rtw89_phy_read_rf(rtwdev, rf_path, addr, mask);
927 return rtw89_phy_read_rf_v2_a(rtwdev, rf_path, addr, mask);
931 bool rtw89_phy_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
938 if (rf_path >= rtwdev->chip->rf_path_num) {
939 rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
944 direct_addr = base_addr[rf_path] + (addr << 2);
957 enum rtw89_rf_path rf_path, u32 addr, u32 mask,
984 FIELD_PREP(B_SWSI_DATA_PATH_V1, rf_path) |
993 bool rtw89_phy_write_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
998 if (rf_path >= rtwdev->chip->rf_path_num) {
999 rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
1004 return rtw89_phy_write_rf(rtwdev, rf_path, addr, mask, data);
1006 return rtw89_phy_write_rf_a(rtwdev, rf_path, addr, mask, data);
1011 bool rtw89_phy_write_full_rf_v2_a(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
1022 rtwdev, addr_is_idle[rf_path], BIT(29));
1031 rtw89_phy_write32(rtwdev, addr_ofst[rf_path], val);
1037 bool rtw89_phy_write_rf_a_v2(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
1045 val = rtw89_phy_read_full_rf_v2_a(rtwdev, rf_path, addr);
1050 return rtw89_phy_write_full_rf_v2_a(rtwdev, rf_path, addr, val);
1053 bool rtw89_phy_write_rf_v2(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
1058 if (rf_path >= rtwdev->chip->rf_path_num) {
1059 rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
1064 return rtw89_phy_write_rf(rtwdev, rf_path, addr, mask, data);
1066 return rtw89_phy_write_rf_a_v2(rtwdev, rf_path, addr, mask, data);
1085 enum rtw89_rf_path rf_path,
1315 enum rtw89_rf_path rf_path,
1362 enum rtw89_rf_path rf_path,
1370 rf_path, info->curr_idx);
1409 enum rtw89_rf_path rf_path,
1421 rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path,
1427 enum rtw89_rf_path rf_path,
1443 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data);
1444 rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path,
1451 enum rtw89_rf_path rf_path,
1454 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data);
1459 rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path,
1550 enum rtw89_rf_path rf_path,
1555 enum rtw89_rf_path rf_path = table->rf_path;
1610 config(rtwdev, reg, rf_path, extra_data);
1647 enum rtw89_rf_path rf_path, void *data);
1661 rf_reg_info->rf_path = rf_table->rf_path;
1670 rf_reg_info->rf_path);