Lines Matching +full:csi +full:- +full:no +full:- +full:ss
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
20 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy0_phy1_offset()
22 return phy->phy0_phy1_offset(rtwdev, addr); in rtw89_phy0_phy1_offset()
28 u32 bit_rate = report->bit_rate; in get_max_amsdu_len()
35 if (report->might_fallback_legacy) in get_max_amsdu_len()
38 /* lower than 20M vht 2ss mcs8, make it small */ in get_max_amsdu_len()
42 /* lower than 40M vht 2ss mcs9, make it medium */ in get_max_amsdu_len()
46 /* not yet 80M vht 2ss mcs8/9, make it twice regular packet size */ in get_max_amsdu_len()
50 return rtwdev->chip->max_amsdu_limit; in get_max_amsdu_len()
66 ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; in get_mcs_ra_mask()
69 ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; in get_mcs_ra_mask()
81 struct ieee80211_sta_he_cap cap = link_sta->he_cap; in get_he_ra_mask()
84 switch (link_sta->bandwidth) { in get_he_ra_mask()
127 struct ieee80211_sta_eht_cap *eht_cap = &link_sta->eht_cap; in get_eht_ra_mask()
129 u8 *he_phy_cap = link_sta->he_cap.he_cap_elem.phy_cap_info; in get_eht_ra_mask()
131 switch (link_sta->bandwidth) { in get_eht_ra_mask()
133 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._320; in get_eht_ra_mask()
135 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
137 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._160; in get_eht_ra_mask()
139 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
141 if (vif->type == NL80211_IFTYPE_AP && in get_eht_ra_mask()
143 mcs_nss_20mhz = &eht_cap->eht_mcs_nss_supp.only_20mhz; in get_eht_ra_mask()
145 return get_eht_mcs_ra_mask(mcs_nss_20mhz->rx_tx_max_nss, 7, 4); in get_eht_ra_mask()
150 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._80; in get_eht_ra_mask()
152 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
206 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_mask_cfg()
210 if (!rtwsta_link->use_cfg_mask) in rtw89_phy_ra_mask_cfg()
211 return -1; in rtw89_phy_ra_mask_cfg()
213 switch (chan->band_type) { in rtw89_phy_ra_mask_cfg()
216 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, in rtw89_phy_ra_mask_cfg()
221 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, in rtw89_phy_ra_mask_cfg()
226 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, in rtw89_phy_ra_mask_cfg()
230 rtw89_warn(rtwdev, "unhandled band type %d\n", chan->band_type); in rtw89_phy_ra_mask_cfg()
231 return -1; in rtw89_phy_ra_mask_cfg()
234 if (link_sta->he_cap.has_he) { in rtw89_phy_ra_mask_cfg()
235 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], in rtw89_phy_ra_mask_cfg()
237 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], in rtw89_phy_ra_mask_cfg()
239 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_mask_cfg()
240 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw89_phy_ra_mask_cfg()
242 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw89_phy_ra_mask_cfg()
244 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_mask_cfg()
245 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw89_phy_ra_mask_cfg()
247 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw89_phy_ra_mask_cfg()
276 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_gi_ltf()
277 u8 band = chan->band_type; in rtw89_phy_ra_gi_ltf()
279 u8 he_ltf = mask->control[nl_band].he_ltf; in rtw89_phy_ra_gi_ltf()
280 u8 he_gi = mask->control[nl_band].he_gi; in rtw89_phy_ra_gi_ltf()
284 if (rtwdev->chip->chip_id == RTL8852C && in rtw89_phy_ra_gi_ltf()
285 chan->band_width == RTW89_CHANNEL_WIDTH_160 && in rtw89_phy_ra_gi_ltf()
291 if (!(rtwsta_link->use_cfg_mask && link_sta->he_cap.has_he)) in rtw89_phy_ra_gi_ltf()
313 bool p2p, bool csi) in rtw89_phy_ra_sta_update() argument
315 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif_link->rate_pattern; in rtw89_phy_ra_sta_update()
316 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_sta_update()
318 rtwvif_link->chanctx_idx); in rtw89_phy_ra_sta_update()
320 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi); in rtw89_phy_ra_sta_update()
335 if (link_sta->eht_cap.has_eht) { in rtw89_phy_ra_sta_update()
339 if (rtwdev->hal.no_mcs_12_13) in rtw89_phy_ra_sta_update()
346 } else if (link_sta->he_cap.has_he) { in rtw89_phy_ra_sta_update()
351 if (link_sta->he_cap.he_cap_elem.phy_cap_info[2] & in rtw89_phy_ra_sta_update()
354 if (link_sta->he_cap.he_cap_elem.phy_cap_info[1] & in rtw89_phy_ra_sta_update()
359 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_sta_update()
360 u16 mcs_map = le16_to_cpu(link_sta->vht_cap.vht_mcs.rx_mcs_map); in rtw89_phy_ra_sta_update()
364 /* MCS9 (non-20MHz), MCS8, MCS7 */ in rtw89_phy_ra_sta_update()
365 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_20) in rtw89_phy_ra_sta_update()
370 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) in rtw89_phy_ra_sta_update()
372 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) in rtw89_phy_ra_sta_update()
374 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_sta_update()
377 ra_mask |= ((u64)link_sta->ht_cap.mcs.rx_mask[3] << 48) | in rtw89_phy_ra_sta_update()
378 ((u64)link_sta->ht_cap.mcs.rx_mask[2] << 36) | in rtw89_phy_ra_sta_update()
379 ((u64)link_sta->ht_cap.mcs.rx_mask[1] << 24) | in rtw89_phy_ra_sta_update()
380 ((u64)link_sta->ht_cap.mcs.rx_mask[0] << 12); in rtw89_phy_ra_sta_update()
382 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) in rtw89_phy_ra_sta_update()
384 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) in rtw89_phy_ra_sta_update()
388 switch (chan->band_type) { in rtw89_phy_ra_sta_update()
390 ra_mask |= link_sta->supp_rates[NL80211_BAND_2GHZ]; in rtw89_phy_ra_sta_update()
391 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xf) in rtw89_phy_ra_sta_update()
393 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xff0) in rtw89_phy_ra_sta_update()
397 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_5GHZ] << 4; in rtw89_phy_ra_sta_update()
401 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_6GHZ] << 4; in rtw89_phy_ra_sta_update()
413 for (i = 0; i < rtwdev->hal.tx_nss; i++) in rtw89_phy_ra_sta_update()
430 switch (link_sta->bandwidth) { in rtw89_phy_ra_sta_update()
433 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
434 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160); in rtw89_phy_ra_sta_update()
438 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
439 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); in rtw89_phy_ra_sta_update()
443 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
444 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40); in rtw89_phy_ra_sta_update()
448 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
449 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20); in rtw89_phy_ra_sta_update()
453 if (link_sta->he_cap.he_cap_elem.phy_cap_info[3] & in rtw89_phy_ra_sta_update()
455 ra->dcm_cap = 1; in rtw89_phy_ra_sta_update()
457 if (rate_pattern->enable && !p2p) { in rtw89_phy_ra_sta_update()
459 ra_mask &= rate_pattern->ra_mask; in rtw89_phy_ra_sta_update()
460 mode = rate_pattern->ra_mode; in rtw89_phy_ra_sta_update()
463 ra->bw_cap = bw_mode; in rtw89_phy_ra_sta_update()
464 ra->er_cap = rtwsta_link->er_cap; in rtw89_phy_ra_sta_update()
465 ra->mode_ctrl = mode; in rtw89_phy_ra_sta_update()
466 ra->macid = rtwsta_link->mac_id; in rtw89_phy_ra_sta_update()
467 ra->stbc_cap = stbc_en; in rtw89_phy_ra_sta_update()
468 ra->ldpc_cap = ldpc_en; in rtw89_phy_ra_sta_update()
469 ra->ss_num = min(link_sta->rx_nss, rtwdev->hal.tx_nss) - 1; in rtw89_phy_ra_sta_update()
470 ra->en_sgi = sgi; in rtw89_phy_ra_sta_update()
471 ra->ra_mask = ra_mask; in rtw89_phy_ra_sta_update()
472 ra->fix_giltf_en = fix_giltf_en; in rtw89_phy_ra_sta_update()
473 ra->fix_giltf = fix_giltf; in rtw89_phy_ra_sta_update()
475 if (!csi) in rtw89_phy_ra_sta_update()
478 ra->fixed_csi_rate_en = false; in rtw89_phy_ra_sta_update()
479 ra->ra_csi_rate_en = true; in rtw89_phy_ra_sta_update()
480 ra->cr_tbl_sel = false; in rtw89_phy_ra_sta_update()
481 ra->band_num = rtwvif_link->phy_idx; in rtw89_phy_ra_sta_update()
482 ra->csi_bw = bw_mode; in rtw89_phy_ra_sta_update()
483 ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32; in rtw89_phy_ra_sta_update()
484 ra->csi_mcs_ss_idx = 5; in rtw89_phy_ra_sta_update()
485 ra->csi_mode = csi_mode; in rtw89_phy_ra_sta_update()
492 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_update_sta_link()
494 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_update_sta_link()
501 link_sta, vif->p2p, false); in rtw89_phy_ra_update_sta_link()
506 ra->upd_mask = 1; in rtw89_phy_ra_update_sta_link()
508 ra->upd_bw_nss_mask = 1; in rtw89_phy_ra_update_sta_link()
512 ra->macid, in rtw89_phy_ra_update_sta_link()
513 ra->bw_cap, in rtw89_phy_ra_update_sta_link()
514 ra->ss_num, in rtw89_phy_ra_update_sta_link()
515 ra->en_sgi, in rtw89_phy_ra_update_sta_link()
516 ra->giltf); in rtw89_phy_ra_update_sta_link()
548 if (next->enable) in __check_rate_pattern()
552 next->rate = rate_base + c; in __check_rate_pattern()
553 next->ra_mode = ra_mode; in __check_rate_pattern()
554 next->ra_mask = ra_mask; in __check_rate_pattern()
555 next->enable = true; in __check_rate_pattern()
574 rtwvif_link->chanctx_idx); in __rtw89_phy_rate_pattern_vif()
593 u8 band = chan->band_type; in __rtw89_phy_rate_pattern_vif()
595 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen; in __rtw89_phy_rate_pattern_vif()
596 u8 tx_nss = rtwdev->hal.tx_nss; in __rtw89_phy_rate_pattern_vif()
602 mask->control[nl_band].he_mcs[i], in __rtw89_phy_rate_pattern_vif()
609 mask->control[nl_band].vht_mcs[i], in __rtw89_phy_rate_pattern_vif()
616 mask->control[nl_band].ht_mcs[i], in __rtw89_phy_rate_pattern_vif()
624 sband = rtwdev->hw->wiphy->bands[nl_band]; in __rtw89_phy_rate_pattern_vif()
629 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
630 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
635 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
636 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
643 rtwvif_link->rate_pattern = next_pattern; in __rtw89_phy_rate_pattern_vif()
659 rtwvif_link->rate_pattern.enable = false; in __rtw89_phy_rate_pattern_vif()
684 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_ra_update()
691 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_assoc()
693 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_assoc()
694 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi) >> RSSI_FACTOR; in rtw89_phy_ra_assoc()
696 bool csi; in rtw89_phy_ra_assoc() local
701 csi = rtw89_sta_has_beamformer_cap(link_sta); in rtw89_phy_ra_assoc()
704 link_sta, vif->p2p, csi); in rtw89_phy_ra_assoc()
709 ra->init_rate_lv = 1; in rtw89_phy_ra_assoc()
711 ra->init_rate_lv = 2; in rtw89_phy_ra_assoc()
713 ra->init_rate_lv = 3; in rtw89_phy_ra_assoc()
715 ra->init_rate_lv = 0; in rtw89_phy_ra_assoc()
716 ra->upd_all = 1; in rtw89_phy_ra_assoc()
719 ra->macid, in rtw89_phy_ra_assoc()
720 ra->mode_ctrl, in rtw89_phy_ra_assoc()
721 ra->bw_cap, in rtw89_phy_ra_assoc()
722 ra->ss_num, in rtw89_phy_ra_assoc()
723 ra->init_rate_lv); in rtw89_phy_ra_assoc()
726 ra->dcm_cap, in rtw89_phy_ra_assoc()
727 ra->er_cap, in rtw89_phy_ra_assoc()
728 ra->ldpc_cap, in rtw89_phy_ra_assoc()
729 ra->stbc_cap, in rtw89_phy_ra_assoc()
730 ra->en_sgi, in rtw89_phy_ra_assoc()
731 ra->giltf); in rtw89_phy_ra_assoc()
733 rtw89_fw_h2c_ra(rtwdev, ra, csi); in rtw89_phy_ra_assoc()
740 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsc()
741 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsc()
742 u8 central_ch = chan->channel; in rtw89_phy_get_txsc()
756 txsc_idx = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
758 txsc_idx = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
765 tmp = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
767 tmp = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
789 txsc_idx = (10 - (pri_ch - central_ch)) >> 1; in rtw89_phy_get_txsc()
791 txsc_idx = ((central_ch - pri_ch) >> 1) + 5; in rtw89_phy_get_txsc()
809 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsb()
810 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsb()
811 u8 central_ch = chan->channel; in rtw89_phy_get_txsb()
823 txsb_idx = (pri_ch - central_ch + 6) / 4; in rtw89_phy_get_txsb()
829 txsb_idx = (pri_ch - central_ch + 14) / 4; in rtw89_phy_get_txsb()
831 txsb_idx = (pri_ch - central_ch + 12) / 8; in rtw89_phy_get_txsb()
837 txsb_idx = (pri_ch - central_ch + 30) / 4; in rtw89_phy_get_txsb()
839 txsb_idx = (pri_ch - central_ch + 28) / 8; in rtw89_phy_get_txsb()
841 txsb_idx = (pri_ch - central_ch + 24) / 16; in rtw89_phy_get_txsb()
862 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_read_rf()
863 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_read_rf()
866 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf()
907 if (!test_bit(RTW89_FLAG_UNPLUGGED, rtwdev->flags)) in rtw89_phy_read_rf_a()
920 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v1()
985 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v2()
1000 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_write_rf()
1001 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_write_rf()
1004 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf()
1064 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v1()
1124 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v2()
1138 return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; in rtw89_chip_rf_v1()
1144 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_bb_reset()
1146 chip->ops->bb_reset(rtwdev, phy_idx); in __rtw89_phy_bb_reset()
1152 if (rtwdev->dbcc_en) in rtw89_phy_bb_reset()
1163 if (reg->addr == 0xfe) { in rtw89_phy_config_bb_reg()
1165 } else if (reg->addr == 0xfd) { in rtw89_phy_config_bb_reg()
1167 } else if (reg->addr == 0xfc) { in rtw89_phy_config_bb_reg()
1169 } else if (reg->addr == 0xfb) { in rtw89_phy_config_bb_reg()
1171 } else if (reg->addr == 0xfa) { in rtw89_phy_config_bb_reg()
1173 } else if (reg->addr == 0xf9) { in rtw89_phy_config_bb_reg()
1175 } else if (reg->data == BYPASS_CR_DATA) { in rtw89_phy_config_bb_reg()
1176 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Bypass CR 0x%x\n", reg->addr); in rtw89_phy_config_bb_reg()
1178 addr = reg->addr; in rtw89_phy_config_bb_reg()
1181 addr += rtw89_phy0_phy1_offset(rtwdev, reg->addr); in rtw89_phy_config_bb_reg()
1183 rtw89_phy_write32(rtwdev, addr, reg->data); in rtw89_phy_config_bb_reg()
1207 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_error()
1216 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1220 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1224 gain->tia_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1246 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_rpl_ofst()
1257 gain->rpl_ofst_20[gband][path] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1261 gain->rpl_ofst_40[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1266 gain->rpl_ofst_40[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1272 gain->rpl_ofst_80[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1277 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1283 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1289 gain->rpl_ofst_160[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1294 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1300 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1306 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1312 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1328 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_bypass()
1337 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1341 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1355 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_op1db()
1364 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1368 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1372 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1376 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1391 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_config_bb_gain_ax()
1392 union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; in rtw89_phy_config_bb_gain_ax()
1393 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_config_bb_gain_ax()
1398 if (arg.path >= chip->rf_path_num) in rtw89_phy_config_bb_gain_ax()
1408 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1411 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1414 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1417 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1421 if (efuse->rfe_type < 50) in rtw89_phy_config_bb_gain_ax()
1427 arg.addr, reg->data, arg.cfg_type); in rtw89_phy_config_bb_gain_ax()
1438 u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1439 u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1443 rf_path, info->curr_idx); in rtw89_phy_cofig_rf_reg_store()
1447 info->rtw89_phy_config_rf_h2c[page][idx] = in rtw89_phy_cofig_rf_reg_store()
1448 cpu_to_le32((reg->addr << 20) | reg->data); in rtw89_phy_cofig_rf_reg_store()
1449 info->curr_idx++; in rtw89_phy_cofig_rf_reg_store()
1455 u16 remain = info->curr_idx; in rtw89_phy_config_rf_reg_fw()
1464 ret = -EINVAL; in rtw89_phy_config_rf_reg_fw()
1468 for (i = 0; i < RTW89_H2C_RF_PAGE_NUM && remain; i++, remain -= len) { in rtw89_phy_config_rf_reg_fw()
1475 info->curr_idx = 0; in rtw89_phy_config_rf_reg_fw()
1485 u32 addr = reg->addr; in rtw89_phy_config_rf_reg_noio()
1503 if (reg->addr == 0xfe) { in rtw89_phy_config_rf_reg()
1505 } else if (reg->addr == 0xfd) { in rtw89_phy_config_rf_reg()
1507 } else if (reg->addr == 0xfc) { in rtw89_phy_config_rf_reg()
1509 } else if (reg->addr == 0xfb) { in rtw89_phy_config_rf_reg()
1511 } else if (reg->addr == 0xfa) { in rtw89_phy_config_rf_reg()
1513 } else if (reg->addr == 0xf9) { in rtw89_phy_config_rf_reg()
1516 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data); in rtw89_phy_config_rf_reg()
1527 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data); in rtw89_phy_config_rf_reg_v1()
1529 if (reg->addr < 0x100) in rtw89_phy_config_rf_reg_v1()
1550 for (i = 0; i < table->n_regs; i++) { in rtw89_phy_sel_headline()
1551 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1552 headline = get_phy_headline(reg->addr); in rtw89_phy_sel_headline()
1563 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1564 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1574 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1575 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1584 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1585 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1586 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1601 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1602 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1603 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1616 return -EINVAL; in rtw89_phy_sel_headline()
1628 enum rtw89_rf_path rf_path = table->rf_path; in rtw89_phy_init_reg()
1629 u8 rfe = rtwdev->efuse.rfe_type; in rtw89_phy_init_reg()
1630 u8 cv = rtwdev->hal.cv; in rtw89_phy_init_reg()
1646 cfg_target = get_phy_target(table->regs[headline_idx].addr); in rtw89_phy_init_reg()
1647 for (i = headline_size; i < table->n_regs; i++) { in rtw89_phy_init_reg()
1648 reg = &table->regs[i]; in rtw89_phy_init_reg()
1649 cond = get_phy_cond(reg->addr); in rtw89_phy_init_reg()
1653 target = get_phy_target(reg->addr); in rtw89_phy_init_reg()
1659 reg->addr, reg->data); in rtw89_phy_init_reg()
1691 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_bb_reg()
1692 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_bb_reg()
1696 bb_table = elm_info->bb_tbl ? elm_info->bb_tbl : chip->bb_table; in rtw89_phy_init_bb_reg()
1698 if (rtwdev->dbcc_en) in rtw89_phy_init_bb_reg()
1704 bb_gain_table = elm_info->bb_gain ? elm_info->bb_gain : chip->bb_gain_table; in rtw89_phy_init_bb_reg()
1707 chip->phy_def->config_bb_gain, NULL); in rtw89_phy_init_bb_reg()
1723 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_reg()
1724 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_reg()
1733 for (path = RF_PATH_A; path < chip->rf_path_num; path++) { in rtw89_phy_init_rf_reg()
1734 rf_table = elm_info->rf_radio[path] ? in rtw89_phy_init_rf_reg()
1735 elm_info->rf_radio[path] : chip->rf_table[path]; in rtw89_phy_init_rf_reg()
1736 rf_reg_info->rf_path = rf_table->rf_path; in rtw89_phy_init_rf_reg()
1740 config = rf_table->config ? rf_table->config : in rtw89_phy_init_rf_reg()
1745 rf_reg_info->rf_path); in rtw89_phy_init_rf_reg()
1752 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_preinit_rf_nctl_ax()
1760 if (chip->chip_id != RTL8851B) in rtw89_phy_preinit_rf_nctl_ax()
1762 if (chip->chip_id == RTL8852B || chip->chip_id == RTL8852BT) in rtw89_phy_preinit_rf_nctl_ax()
1780 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_nctl()
1781 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_nctl()
1786 nctl_table = elm_info->rf_nctl ? elm_info->rf_nctl : chip->nctl_table; in rtw89_phy_init_rf_nctl()
1789 if (chip->nctl_post_table) in rtw89_phy_init_rf_nctl()
1790 rtw89_rfk_parser(rtwdev, chip->nctl_post_table); in rtw89_phy_init_rf_nctl()
1827 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx()
1836 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_set()
1845 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_clr()
1854 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_read32_idx()
1865 if (!rtwdev->dbcc_en) in rtw89_phy_set_phy_regs()
1878 for (i = 0; i < tbl->size; i++) { in rtw89_phy_write_reg3_tbl()
1879 reg3 = &tbl->reg3[i]; in rtw89_phy_write_reg3_tbl()
1880 rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); in rtw89_phy_write_reg3_tbl()
1899 #define RTW89_ANT_GAIN_2GHZ_MIN -8
1901 #define RTW89_ANT_GAIN_5GHZ_MIN -8
1903 #define RTW89_ANT_GAIN_6GHZ_MIN -8
1912 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_init()
1913 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ant_gain_init()
1921 if (!chip->support_ant_gain) in rtw89_phy_ant_gain_init()
1946 ant_gain->regd_enabled |= BIT(regd); in rtw89_phy_ant_gain_init()
1955 val = RTW89_ANT_GAIN_REF_2GHZ - in rtw89_phy_ant_gain_init()
1964 val = RTW89_ANT_GAIN_REF_5GHZ - in rtw89_phy_ant_gain_init()
1975 val = RTW89_ANT_GAIN_REF_6GHZ - in rtw89_phy_ant_gain_init()
1980 ant_gain->offset[i][j] = val; in rtw89_phy_ant_gain_init()
2029 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_query()
2036 subband_l = span->ant_gain_subband_low; in rtw89_phy_ant_gain_query()
2037 subband_h = span->ant_gain_subband_high; in rtw89_phy_ant_gain_query()
2047 return min(ant_gain->offset[path][subband_l], in rtw89_phy_ant_gain_query()
2048 ant_gain->offset[path][subband_h]); in rtw89_phy_ant_gain_query()
2058 if (RTW89_CHK_FW_FEATURE(NO_POWER_DIFFERENCE, &rtwdev->fw)) in rtw89_phy_ant_gain_offset()
2066 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_can_apply_ant_gain()
2067 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_can_apply_ant_gain()
2068 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_can_apply_ant_gain()
2071 if (!chip->support_ant_gain) in rtw89_can_apply_ant_gain()
2074 if (ant_gain->block_country || !(ant_gain->regd_enabled & BIT(regd))) in rtw89_can_apply_ant_gain()
2077 if (!rfe_parms->has_da) in rtw89_can_apply_ant_gain()
2088 if (!rtw89_can_apply_ant_gain(rtwdev, chan->band_type)) in rtw89_phy_ant_gain_pwr_offset()
2091 if (RTW89_CHK_FW_FEATURE(NO_POWER_DIFFERENCE, &rtwdev->fw)) in rtw89_phy_ant_gain_pwr_offset()
2094 offset_patha = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_A, chan->freq); in rtw89_phy_ant_gain_pwr_offset()
2095 offset_pathb = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_B, chan->freq); in rtw89_phy_ant_gain_pwr_offset()
2097 return rtw89_phy_txpwr_rf_to_bb(rtwdev, offset_patha - offset_pathb); in rtw89_phy_ant_gain_pwr_offset()
2107 if (!rtw89_can_apply_ant_gain(rtwdev, chan->band_type)) { in rtw89_print_ant_gain()
2108 p += scnprintf(p, end - p, "no DAG is applied\n"); in rtw89_print_ant_gain()
2112 offset_patha = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_A, chan->freq); in rtw89_print_ant_gain()
2113 offset_pathb = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_B, chan->freq); in rtw89_print_ant_gain()
2115 p += scnprintf(p, end - p, "ChainA offset: %d dBm\n", offset_patha); in rtw89_print_ant_gain()
2116 p += scnprintf(p, end - p, "ChainB offset: %d dBm\n", offset_pathb); in rtw89_print_ant_gain()
2119 return p - buf; in rtw89_print_ant_gain()
2142 switch (desc->rs) { in rtw89_phy_raw_byr_seek()
2144 return &head->cck[desc->idx]; in rtw89_phy_raw_byr_seek()
2146 return &head->ofdm[desc->idx]; in rtw89_phy_raw_byr_seek()
2148 return &head->mcs[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
2150 return &head->hedcm[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
2152 return &head->offset[desc->idx]; in rtw89_phy_raw_byr_seek()
2154 rtw89_warn(rtwdev, "unrecognized byr rs: %d\n", desc->rs); in rtw89_phy_raw_byr_seek()
2155 return &head->trap; in rtw89_phy_raw_byr_seek()
2162 const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data; in rtw89_phy_load_txpwr_byrate()
2163 const struct rtw89_txpwr_byrate_cfg *end = cfg + tbl->size; in rtw89_phy_load_txpwr_byrate()
2171 byr_head = &rtwdev->byr[cfg->band][0]; in rtw89_phy_load_txpwr_byrate()
2172 desc.rs = cfg->rs; in rtw89_phy_load_txpwr_byrate()
2173 desc.nss = cfg->nss; in rtw89_phy_load_txpwr_byrate()
2174 data = cfg->data; in rtw89_phy_load_txpwr_byrate()
2176 for (i = 0; i < cfg->len; i++, data >>= 8) { in rtw89_phy_load_txpwr_byrate()
2177 desc.idx = cfg->shf + i; in rtw89_phy_load_txpwr_byrate()
2191 dbm -= tssi_max_deviation; in rtw89_phy_txpwr_dbm_without_tolerance()
2198 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_get_tpe_constraint()
2199 const struct rtw89_reg_6ghz_tpe *tpe = ®ulatory->reg_6ghz_tpe; in rtw89_phy_get_tpe_constraint()
2202 if (band == RTW89_BAND_6G && tpe->valid) in rtw89_phy_get_tpe_constraint()
2203 cstr = rtw89_phy_txpwr_dbm_without_tolerance(tpe->constraint); in rtw89_phy_get_tpe_constraint()
2214 if (rate_desc->rs == RTW89_RS_CCK) in rtw89_phy_read_txpwr_byrate()
2217 byr_head = &rtwdev->byr[band][bw]; in rtw89_phy_read_txpwr_byrate()
2227 return (channel_6g - 1) / 2; in rtw89_channel_6g_to_idx()
2229 return (channel_6g - 3) / 2; in rtw89_channel_6g_to_idx()
2231 return (channel_6g - 5) / 2; in rtw89_channel_6g_to_idx()
2233 return (channel_6g - 7) / 2; in rtw89_channel_6g_to_idx()
2235 return (channel_6g - 9) / 2; in rtw89_channel_6g_to_idx()
2237 return (channel_6g - 11) / 2; in rtw89_channel_6g_to_idx()
2239 return (channel_6g - 13) / 2; in rtw89_channel_6g_to_idx()
2241 return (channel_6g - 15) / 2; in rtw89_channel_6g_to_idx()
2255 return channel - 1; in rtw89_channel_to_idx()
2257 return (channel - 36) / 2; in rtw89_channel_to_idx()
2259 return ((channel - 100) / 2) + 15; in rtw89_channel_to_idx()
2261 return ((channel - 149) / 2) + 38; in rtw89_channel_to_idx()
2271 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit()
2272 const struct rtw89_txpwr_rule_2ghz *rule_da_2ghz = &rfe_parms->rule_da_2ghz; in rtw89_phy_read_txpwr_limit()
2273 const struct rtw89_txpwr_rule_5ghz *rule_da_5ghz = &rfe_parms->rule_da_5ghz; in rtw89_phy_read_txpwr_limit()
2274 const struct rtw89_txpwr_rule_6ghz *rule_da_6ghz = &rfe_parms->rule_da_6ghz; in rtw89_phy_read_txpwr_limit()
2275 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit()
2276 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit()
2277 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit()
2278 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit()
2285 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit()
2295 da_lmt = (*rule_da_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2297 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2301 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2305 da_lmt = (*rule_da_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2307 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2311 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2315 da_lmt = (*rule_da_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit()
2317 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit()
2321 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW] in rtw89_phy_read_txpwr_limit()
2357 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2359 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_20m_ax()
2361 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2363 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_20m_ax()
2372 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2373 ntx, RTW89_RS_CCK, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2374 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_40m_ax()
2376 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2378 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2380 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2381 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2384 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2397 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_80m_ax()
2399 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2401 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_80m_ax()
2402 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2404 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_80m_ax()
2405 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2408 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2411 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2413 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2414 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2417 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2422 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2427 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_80m_ax()
2441 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_160m_ax()
2445 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2447 ntx, RTW89_RS_MCS, ch - 14); in rtw89_phy_fill_txpwr_limit_160m_ax()
2448 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2450 ntx, RTW89_RS_MCS, ch - 10); in rtw89_phy_fill_txpwr_limit_160m_ax()
2451 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2453 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_160m_ax()
2454 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2456 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_160m_ax()
2457 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[4], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2460 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[5], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2463 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[6], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2466 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[7], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2471 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2473 ntx, RTW89_RS_MCS, ch - 12); in rtw89_phy_fill_txpwr_limit_160m_ax()
2474 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2476 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2477 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2480 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2485 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2487 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2488 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2493 __fill_txpwr_limit_nonbf_bf(lmt->mcs_160m, band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2499 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2504 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2508 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2513 lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2522 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ax()
2523 u8 pri_ch = chan->primary_channel; in rtw89_phy_fill_txpwr_limit_ax()
2524 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ax()
2525 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ax()
2551 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit_ru()
2552 const struct rtw89_txpwr_rule_2ghz *rule_da_2ghz = &rfe_parms->rule_da_2ghz; in rtw89_phy_read_txpwr_limit_ru()
2553 const struct rtw89_txpwr_rule_5ghz *rule_da_5ghz = &rfe_parms->rule_da_5ghz; in rtw89_phy_read_txpwr_limit_ru()
2554 const struct rtw89_txpwr_rule_6ghz *rule_da_6ghz = &rfe_parms->rule_da_6ghz; in rtw89_phy_read_txpwr_limit_ru()
2555 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit_ru()
2556 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit_ru()
2557 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit_ru()
2558 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit_ru()
2565 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit_ru()
2575 da_lmt_ru = (*rule_da_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2577 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2581 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2585 da_lmt_ru = (*rule_da_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2587 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2591 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2595 da_lmt_ru = (*rule_da_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2597 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2601 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW] in rtw89_phy_read_txpwr_limit_ru()
2626 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2629 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2632 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2642 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2644 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2645 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2648 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2650 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2651 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2654 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2656 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2657 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2667 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2669 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2670 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2672 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2673 lmt_ru->ru26[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2676 lmt_ru->ru26[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2679 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2681 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2682 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2684 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2685 lmt_ru->ru52[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2688 lmt_ru->ru52[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2691 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2693 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2694 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2696 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2697 lmt_ru->ru106[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2700 lmt_ru->ru106[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2710 static const int ofst[] = { -14, -10, -6, -2, 2, 6, 10, 14 }; in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2719 lmt_ru->ru26[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2723 lmt_ru->ru52[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2727 lmt_ru->ru106[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2740 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ru_ax()
2741 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ru_ax()
2742 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ru_ax()
2770 u8 max_nss_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_byrate_ax()
2778 u8 band = chan->band_type; in rtw89_phy_set_txpwr_byrate_ax()
2779 u8 ch = chan->channel; in rtw89_phy_set_txpwr_byrate_ax()
2831 u8 band = chan->band_type; in rtw89_phy_set_txpwr_offset_ax()
2855 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ax()
2857 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ax()
2858 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ax()
2890 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ru_ax()
2892 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ru_ax()
2893 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ru_ax()
2930 struct rtw89_dev *rtwdev = ra_data->rtwdev; in __rtw89_phy_c2h_ra_rpt_iter()
2932 (const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data; in __rtw89_phy_c2h_ra_rpt_iter()
2933 struct rtw89_ra_report *ra_report = &rtwsta_link->ra_report; in __rtw89_phy_c2h_ra_rpt_iter()
2934 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_c2h_ra_rpt_iter()
2935 bool format_v1 = chip->chip_gen == RTW89_CHIP_BE; in __rtw89_phy_c2h_ra_rpt_iter()
2942 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MACID); in __rtw89_phy_c2h_ra_rpt_iter()
2943 if (mac_id != rtwsta_link->mac_id) in __rtw89_phy_c2h_ra_rpt_iter()
2946 rate = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MCSNSS); in __rtw89_phy_c2h_ra_rpt_iter()
2947 bw = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW); in __rtw89_phy_c2h_ra_rpt_iter()
2948 giltf = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_GILTF); in __rtw89_phy_c2h_ra_rpt_iter()
2949 mode = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL); in __rtw89_phy_c2h_ra_rpt_iter()
2952 t = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MCSNSS_B7); in __rtw89_phy_c2h_ra_rpt_iter()
2954 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2956 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2966 memset(&ra_report->txrate, 0, sizeof(ra_report->txrate)); in __rtw89_phy_c2h_ra_rpt_iter()
2970 ra_report->txrate.legacy = legacy_bitrate; in __rtw89_phy_c2h_ra_rpt_iter()
2973 ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2974 if (RTW89_CHK_FW_FEATURE(OLD_HT_RA_FORMAT, &rtwdev->fw)) in __rtw89_phy_c2h_ra_rpt_iter()
2979 ra_report->txrate.mcs = rate; in __rtw89_phy_c2h_ra_rpt_iter()
2981 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2982 mcs = ra_report->txrate.mcs & 0x07; in __rtw89_phy_c2h_ra_rpt_iter()
2985 ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2986 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2989 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2993 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2994 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2997 ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2998 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
3001 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
3005 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
3007 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
3009 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
3010 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
3013 ra_report->txrate.flags |= RATE_INFO_FLAGS_EHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
3014 ra_report->txrate.mcs = u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS_V1); in __rtw89_phy_c2h_ra_rpt_iter()
3015 ra_report->txrate.nss = u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS_V1) + 1; in __rtw89_phy_c2h_ra_rpt_iter()
3017 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
3019 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
3021 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
3022 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
3026 ra_report->txrate.bw = rtw89_hw_to_rate_info_bw(bw); in __rtw89_phy_c2h_ra_rpt_iter()
3027 ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); in __rtw89_phy_c2h_ra_rpt_iter()
3028 ra_report->hw_rate = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
3033 ra_report->might_fallback_legacy = mcs <= 2; in __rtw89_phy_c2h_ra_rpt_iter()
3034 link_sta->agg.max_rc_amsdu_len = get_max_amsdu_len(rtwdev, ra_report); in __rtw89_phy_c2h_ra_rpt_iter()
3035 rtwsta_link->max_agg_wait = link_sta->agg.max_rc_amsdu_len / 1500 - 1; in __rtw89_phy_c2h_ra_rpt_iter()
3063 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_c2h_ra_rpt()
3085 (const struct rtw89_c2h_fw_scan_rpt *)c2h->data; in rtw89_phy_c2h_fw_scan_rpt()
3088 "%s: band: %u, op_chan: %u, PD_low_bd(ofdm, cck): (-%d, %d), phy_idx: %u\n", in rtw89_phy_c2h_fw_scan_rpt()
3089 __func__, c2h_rpt->band, c2h_rpt->center_ch, in rtw89_phy_c2h_fw_scan_rpt()
3090 PD_LOWER_BOUND_BASE - (c2h_rpt->ofdm_pd_idx << 1), in rtw89_phy_c2h_fw_scan_rpt()
3091 c2h_rpt->cck_pd_idx, c2h_rpt->phy_idx); in rtw89_phy_c2h_fw_scan_rpt()
3124 "[IQK] iqk->is_iqk_init = %x\n", iqk->is_iqk_init); in rtw89_phy_c2h_rfk_rpt_log()
3126 "[IQK] iqk->is_reload = %x\n", iqk->is_reload); in rtw89_phy_c2h_rfk_rpt_log()
3128 "[IQK] iqk->is_nbiqk = %x\n", iqk->is_nbiqk); in rtw89_phy_c2h_rfk_rpt_log()
3130 "[IQK] iqk->txiqk_en = %x\n", iqk->txiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
3132 "[IQK] iqk->rxiqk_en = %x\n", iqk->rxiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
3134 "[IQK] iqk->lok_en = %x\n", iqk->lok_en); in rtw89_phy_c2h_rfk_rpt_log()
3136 "[IQK] iqk->iqk_xym_en = %x\n", iqk->iqk_xym_en); in rtw89_phy_c2h_rfk_rpt_log()
3138 "[IQK] iqk->iqk_sram_en = %x\n", iqk->iqk_sram_en); in rtw89_phy_c2h_rfk_rpt_log()
3140 "[IQK] iqk->iqk_fft_en = %x\n", iqk->iqk_fft_en); in rtw89_phy_c2h_rfk_rpt_log()
3142 "[IQK] iqk->is_fw_iqk = %x\n", iqk->is_fw_iqk); in rtw89_phy_c2h_rfk_rpt_log()
3144 "[IQK] iqk->is_iqk_enable = %x\n", iqk->is_iqk_enable); in rtw89_phy_c2h_rfk_rpt_log()
3146 "[IQK] iqk->iqk_cfir_en = %x\n", iqk->iqk_cfir_en); in rtw89_phy_c2h_rfk_rpt_log()
3148 "[IQK] iqk->thermal_rek_en = %x\n", iqk->thermal_rek_en); in rtw89_phy_c2h_rfk_rpt_log()
3150 "[IQK] iqk->version = %x\n", iqk->version); in rtw89_phy_c2h_rfk_rpt_log()
3152 "[IQK] iqk->phy = %x\n", iqk->phy); in rtw89_phy_c2h_rfk_rpt_log()
3154 "[IQK] iqk->fwk_status = %x\n", iqk->fwk_status); in rtw89_phy_c2h_rfk_rpt_log()
3159 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_band[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3160 i, iqk->iqk_band[i]); in rtw89_phy_c2h_rfk_rpt_log()
3161 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_ch[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3162 i, iqk->iqk_ch[i]); in rtw89_phy_c2h_rfk_rpt_log()
3163 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_bw[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3164 i, iqk->iqk_bw[i]); in rtw89_phy_c2h_rfk_rpt_log()
3165 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_idac[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3166 i, le32_to_cpu(iqk->lok_idac[i])); in rtw89_phy_c2h_rfk_rpt_log()
3167 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_vbuf[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3168 i, le32_to_cpu(iqk->lok_vbuf[i])); in rtw89_phy_c2h_rfk_rpt_log()
3169 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_tx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3170 i, iqk->iqk_tx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
3171 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_rx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3172 i, iqk->iqk_rx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
3175 "[IQK] iqk->rftxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3176 i, j, le32_to_cpu(iqk->rftxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3179 "[IQK] iqk->tx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3180 i, j, le32_to_cpu(iqk->tx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3183 "[IQK] iqk->rfrxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3184 i, j, le32_to_cpu(iqk->rfrxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3187 "[IQK] iqk->rx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3188 i, j, le32_to_cpu(iqk->rx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3198 dpk->ver, dpk->idx, dpk->band, dpk->bw, dpk->ch, dpk->path_ok); in rtw89_phy_c2h_rfk_rpt_log()
3201 dpk->txagc, dpk->ther, dpk->gs, dpk->dc_i, dpk->dc_q); in rtw89_phy_c2h_rfk_rpt_log()
3204 dpk->corr_val, dpk->corr_idx, dpk->is_timeout, dpk->rxbb_ov); in rtw89_phy_c2h_rfk_rpt_log()
3215 dack->fwdack_ver, dack->fwdack_info_ver, 0x2); in rtw89_phy_c2h_rfk_rpt_log()
3219 dack->addck_timeout, dack->cdack_timeout, dack->dadck_timeout, in rtw89_phy_c2h_rfk_rpt_log()
3220 dack->adgaink_timeout, dack->msbk_timeout); in rtw89_phy_c2h_rfk_rpt_log()
3222 "[DACK]DACK fail = 0x%x\n", dack->dack_fail); in rtw89_phy_c2h_rfk_rpt_log()
3224 "[DACK]S0 WBADCK = [0x%x]\n", dack->wbdck_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3226 "[DACK]S1 WBADCK = [0x%x]\n", dack->wbdck_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3228 "[DACK]DRCK = [0x%x]\n", dack->rck_d); in rtw89_phy_c2h_rfk_rpt_log()
3230 dack->cdack_d[0][0][0], dack->cdack_d[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3232 dack->cdack_d[0][1][0], dack->cdack_d[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3234 dack->cdack_d[1][0][0], dack->cdack_d[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3236 dack->cdack_d[1][1][0], dack->cdack_d[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3239 ((u32)dack->addck2_hd[0][0][0] << 8) | dack->addck2_ld[0][0][0], in rtw89_phy_c2h_rfk_rpt_log()
3240 ((u32)dack->addck2_hd[0][0][1] << 8) | dack->addck2_ld[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3242 ((u32)dack->addck2_hd[0][1][0] << 8) | dack->addck2_ld[0][1][0], in rtw89_phy_c2h_rfk_rpt_log()
3243 ((u32)dack->addck2_hd[0][1][1] << 8) | dack->addck2_ld[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3245 ((u32)dack->addck2_hd[1][0][0] << 8) | dack->addck2_ld[1][0][0], in rtw89_phy_c2h_rfk_rpt_log()
3246 ((u32)dack->addck2_hd[1][0][1] << 8) | dack->addck2_ld[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3248 ((u32)dack->addck2_hd[1][1][0] << 8) | dack->addck2_ld[1][1][0], in rtw89_phy_c2h_rfk_rpt_log()
3249 ((u32)dack->addck2_hd[1][1][1] << 8) | dack->addck2_ld[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3252 dack->adgaink_d[0][0], dack->adgaink_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3254 dack->adgaink_d[1][0], dack->adgaink_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3257 dack->dadck_d[0][0], dack->dadck_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3259 dack->dadck_d[1][0], dack->dadck_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3262 ((u32)dack->biask_hd[0][0] << 8) | dack->biask_ld[0][0]); in rtw89_phy_c2h_rfk_rpt_log()
3264 ((u32)dack->biask_hd[1][0] << 8) | dack->biask_ld[1][0]); in rtw89_phy_c2h_rfk_rpt_log()
3269 dack->msbk_d[0][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
3274 dack->msbk_d[0][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
3279 dack->msbk_d[1][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
3284 dack->msbk_d[1][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
3293 rxdck->ver, rxdck->band, rxdck->bw, rxdck->ch, in rtw89_phy_c2h_rfk_rpt_log()
3294 rxdck->timeout); in rtw89_phy_c2h_rfk_rpt_log()
3306 i, j, k, tssi->alignment_power_cw_h[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3309 i, j, k, tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3312 i, j, k, tssi->alignment_power[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3316 (tssi->alignment_power_cw_h[i][j][k] << 8) + in rtw89_phy_c2h_rfk_rpt_log()
3317 tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3322 i, j, tssi->tssi_alimk_state[i][j]); in rtw89_phy_c2h_rfk_rpt_log()
3325 j, tssi->default_txagc_offset[0][j]); in rtw89_phy_c2h_rfk_rpt_log()
3336 le32_to_cpu(txgapk->r0x8010[0]), in rtw89_phy_c2h_rfk_rpt_log()
3337 le32_to_cpu(txgapk->r0x8010[1])); in rtw89_phy_c2h_rfk_rpt_log()
3339 txgapk->chk_id); in rtw89_phy_c2h_rfk_rpt_log()
3341 le32_to_cpu(txgapk->chk_cnt)); in rtw89_phy_c2h_rfk_rpt_log()
3343 txgapk->ver); in rtw89_phy_c2h_rfk_rpt_log()
3345 txgapk->rsv1); in rtw89_phy_c2h_rfk_rpt_log()
3348 (int)sizeof(txgapk->track_d[0]), txgapk->track_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3350 (int)sizeof(txgapk->power_d[0]), txgapk->power_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3352 (int)sizeof(txgapk->track_d[1]), txgapk->track_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3354 (int)sizeof(txgapk->power_d[1]), txgapk->power_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3369 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_c2h_rfk_run_log()
3378 if (!elm_info->rfk_log_fmt) in rtw89_phy_c2h_rfk_run_log()
3381 elm = elm_info->rfk_log_fmt->elm[func]; in rtw89_phy_c2h_rfk_run_log()
3382 fmt_idx = le32_to_cpu(log->fmt_idx); in rtw89_phy_c2h_rfk_run_log()
3383 if (!elm || fmt_idx >= elm->u.rfk_log_fmt.nr) in rtw89_phy_c2h_rfk_run_log()
3386 offset = le16_to_cpu(elm->u.rfk_log_fmt.offset[fmt_idx]); in rtw89_phy_c2h_rfk_run_log()
3390 rtw89_debug(rtwdev, RTW89_DBG_RFK, &elm->u.common.contents[offset], in rtw89_phy_c2h_rfk_run_log()
3391 le32_to_cpu(log->arg[0]), le32_to_cpu(log->arg[1]), in rtw89_phy_c2h_rfk_run_log()
3392 le32_to_cpu(log->arg[2]), le32_to_cpu(log->arg[3])); in rtw89_phy_c2h_rfk_run_log()
3401 struct rtw89_c2h_hdr *c2h_hdr = (struct rtw89_c2h_hdr *)c2h->data; in rtw89_phy_c2h_rfk_log()
3416 len -= sizeof(*c2h_hdr); in rtw89_phy_c2h_rfk_log()
3424 content_len = le16_to_cpu(log_hdr->len); in rtw89_phy_c2h_rfk_log()
3430 switch (log_hdr->type) { in rtw89_phy_c2h_rfk_log()
3433 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3438 rfk_name, content_len, log_hdr->content); in rtw89_phy_c2h_rfk_log()
3442 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3449 len -= chunk_len; in rtw89_phy_c2h_rfk_log()
3509 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_prep()
3511 wait->state = RTW89_RFK_STATE_START; in rtw89_phy_rfk_report_prep()
3512 wait->start_time = ktime_get(); in rtw89_phy_rfk_report_prep()
3513 reinit_completion(&wait->completion); in rtw89_phy_rfk_report_prep()
3520 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_wait()
3524 if (test_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags)) { in rtw89_phy_rfk_report_wait()
3529 time_left = wait_for_completion_timeout(&wait->completion, in rtw89_phy_rfk_report_wait()
3533 return -ETIMEDOUT; in rtw89_phy_rfk_report_wait()
3534 } else if (wait->state != RTW89_RFK_STATE_OK) { in rtw89_phy_rfk_report_wait()
3536 rfk_name, wait->state); in rtw89_phy_rfk_report_wait()
3537 return -EFAULT; in rtw89_phy_rfk_report_wait()
3543 rfk_name, ktime_ms_delta(ktime_get(), wait->start_time)); in rtw89_phy_rfk_report_wait()
3546 rfk_name, ktime_ms_delta(ktime_get(), (intmax_t)wait->start_time)); in rtw89_phy_rfk_report_wait()
3556 (const struct rtw89_c2h_rfk_report *)c2h->data; in rtw89_phy_c2h_rfk_report_state()
3557 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_c2h_rfk_report_state()
3559 wait->state = report->state; in rtw89_phy_c2h_rfk_report_state()
3560 wait->version = report->version; in rtw89_phy_c2h_rfk_report_state()
3562 complete(&wait->completion); in rtw89_phy_c2h_rfk_report_state()
3566 wait->state, wait->version, in rtw89_phy_c2h_rfk_report_state()
3567 (int)(len - sizeof(report->hdr)), &report->state); in rtw89_phy_c2h_rfk_report_state()
3574 (const struct rtw89_c2h_rf_tas_info *)c2h->data; in rtw89_phy_c2h_rfk_log_tas_pwr()
3575 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_phy_c2h_rfk_log_tas_pwr()
3576 struct rtw89_tas_info *tas = &rtwdev->tas; in rtw89_phy_c2h_rfk_log_tas_pwr()
3581 if (!tas->enable || src == RTW89_SAR_SOURCE_NONE) in rtw89_phy_c2h_rfk_log_tas_pwr()
3584 cur_idx = le32_to_cpu(rf_tas->cur_idx); in rtw89_phy_c2h_rfk_log_tas_pwr()
3586 txpwr = (s16)le16_to_cpu(rf_tas->txpwr_history[i]); in rtw89_phy_c2h_rfk_log_tas_pwr()
3594 tas->instant_txpwr = rtw89_db_to_linear(0); in rtw89_phy_c2h_rfk_log_tas_pwr()
3596 tas->instant_txpwr = DIV_ROUND_DOWN_ULL(linear, cur_idx); in rtw89_phy_c2h_rfk_log_tas_pwr()
4092 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_de()
4093 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_de()
4094 u8 ch = chan->channel; in phy_tssi_get_ofdm_de()
4114 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
4115 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
4122 val = tssi_info->tssi_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
4140 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
4141 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
4148 val = tssi_info->tssi_6g_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
4162 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_trim_de()
4163 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_trim_de()
4164 u8 ch = chan->channel; in phy_tssi_get_ofdm_trim_de()
4184 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
4185 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
4192 val = tssi_info->tssi_trim[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
4211 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
4212 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
4219 val = tssi_info->tssi_trim_6g[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
4234 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4235 u8 ch = chan->channel; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4248 h2c->curr_tssi_trim_de[i] = trim_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4254 cck_de = tssi_info->tssi_cck[i][gidx]; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4257 h2c->curr_tssi_cck_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4258 h2c->curr_tssi_cck_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4259 h2c->curr_tssi_cck_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4260 h2c->curr_tssi_efuse_cck_de[i] = cck_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4268 h2c->curr_tssi_ofdm_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4269 h2c->curr_tssi_ofdm_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4270 h2c->curr_tssi_ofdm_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4271 h2c->curr_tssi_ofdm_de_80m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4272 h2c->curr_tssi_ofdm_de_160m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4273 h2c->curr_tssi_ofdm_de_320m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4274 h2c->curr_tssi_efuse_ofdm_de[i] = ofdm_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4286 struct rtw89_fw_txpwr_track_cfg *trk = rtwdev->fw.elm_info.txpwr_trk; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4287 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4290 u8 subband = chan->subband_type; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4299 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4300 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4301 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4302 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4305 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4306 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4307 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4308 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4311 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4312 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4313 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4314 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4317 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4318 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4319 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4320 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4324 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4325 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4326 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4327 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4331 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4332 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4333 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4334 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4338 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4339 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4340 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4341 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4345 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4346 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4347 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4348 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4356 thermal = tssi_info->thermal[path]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4361 h2c->pg_thermal[path] = 0x38; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4362 memset(h2c->ftable[path], 0, sizeof(h2c->ftable[path])); in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4366 h2c->pg_thermal[path] = thermal; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4372 thm_up[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4375 for (j = 127; j >= 64; j--) in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4377 -thm_down[path][i++] : in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4378 -thm_down[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4381 h2c->ftable[path][i + 0] = thm_ofst[i + 3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4382 h2c->ftable[path][i + 1] = thm_ofst[i + 2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4383 h2c->ftable[path][i + 2] = thm_ofst[i + 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4384 h2c->ftable[path][i + 3] = thm_ofst[i + 0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4396 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_get_xcap_reg()
4400 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_get_xcap_reg()
4402 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_get_xcap_reg()
4404 return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); in rtw89_phy_cfo_get_xcap_reg()
4410 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_set_xcap_reg()
4414 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_set_xcap_reg()
4416 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_set_xcap_reg()
4418 rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); in rtw89_phy_cfo_set_xcap_reg()
4424 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_set_crystal_cap()
4425 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_cfo_set_crystal_cap()
4428 if (!force && cfo->crystal_cap == crystal_cap) in rtw89_phy_cfo_set_crystal_cap()
4430 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) { in rtw89_phy_cfo_set_crystal_cap()
4443 cfo->crystal_cap = sc_xi_val; in rtw89_phy_cfo_set_crystal_cap()
4444 cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); in rtw89_phy_cfo_set_crystal_cap()
4449 cfo->x_cap_ofst); in rtw89_phy_cfo_set_crystal_cap()
4455 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_reset()
4458 cfo->def_x_cap = cfo->crystal_cap_default & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_reset()
4459 cfo->is_adjust = false; in rtw89_phy_cfo_reset()
4460 if (cfo->crystal_cap == cfo->def_x_cap) in rtw89_phy_cfo_reset()
4462 cap = cfo->crystal_cap; in rtw89_phy_cfo_reset()
4463 cap += (cap > cfo->def_x_cap ? -1 : 1); in rtw89_phy_cfo_reset()
4466 "(0x%x) approach to dflt_val=(0x%x)\n", cfo->crystal_cap, in rtw89_phy_cfo_reset()
4467 cfo->def_x_cap); in rtw89_phy_cfo_reset()
4472 const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp; in rtw89_dcfo_comp()
4473 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_dcfo_comp()
4478 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_dcfo_comp()
4490 sign = curr_cfo > 0 ? 1 : -1; in rtw89_dcfo_comp()
4493 if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) in rtw89_dcfo_comp()
4494 cfo_avg_312 = -cfo_avg_312; in rtw89_dcfo_comp()
4495 rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, in rtw89_dcfo_comp()
4501 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_dcfo_comp_init()
4502 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_dcfo_comp_init()
4503 const struct rtw89_cfo_regs *cfo = phy->cfo; in rtw89_dcfo_comp_init()
4505 rtw89_phy_set_phy_regs(rtwdev, cfo->comp_seg0, cfo->valid_0_mask, 1); in rtw89_dcfo_comp_init()
4506 rtw89_phy_set_phy_regs(rtwdev, cfo->comp, cfo->weighting_mask, 8); in rtw89_dcfo_comp_init()
4508 if (chip->chip_gen == RTW89_CHIP_AX) { in rtw89_dcfo_comp_init()
4509 if (chip->cfo_hw_comp) { in rtw89_dcfo_comp_init()
4522 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_init()
4523 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_cfo_init()
4525 cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_init()
4526 cfo->crystal_cap = cfo->crystal_cap_default; in rtw89_phy_cfo_init()
4527 cfo->def_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_init()
4528 cfo->x_cap_ub = min_t(int, cfo->def_x_cap + CFO_BOUND, 0x7f); in rtw89_phy_cfo_init()
4529 cfo->x_cap_lb = max_t(int, cfo->def_x_cap - CFO_BOUND, 0x1); in rtw89_phy_cfo_init()
4530 cfo->is_adjust = false; in rtw89_phy_cfo_init()
4531 cfo->divergence_lock_en = false; in rtw89_phy_cfo_init()
4532 cfo->x_cap_ofst = 0; in rtw89_phy_cfo_init()
4533 cfo->lock_cnt = 0; in rtw89_phy_cfo_init()
4534 cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; in rtw89_phy_cfo_init()
4535 cfo->apply_compensation = false; in rtw89_phy_cfo_init()
4536 cfo->residual_cfo_acc = 0; in rtw89_phy_cfo_init()
4538 cfo->crystal_cap_default); in rtw89_phy_cfo_init()
4539 rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true); in rtw89_phy_cfo_init()
4541 cfo->cfo_timer_ms = 2000; in rtw89_phy_cfo_init()
4542 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_init()
4543 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_init()
4544 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_init()
4545 cfo->cfo_ul_ofdma_acc_mode = RTW89_CFO_UL_OFDMA_ACC_ENABLE; in rtw89_phy_cfo_init()
4551 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_crystal_cap_adjust()
4552 int crystal_cap = cfo->crystal_cap; in rtw89_phy_cfo_crystal_cap_adjust()
4560 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4562 cfo->is_adjust = true; in rtw89_phy_cfo_crystal_cap_adjust()
4565 cfo->is_adjust = false; in rtw89_phy_cfo_crystal_cap_adjust()
4567 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4571 sign = curr_cfo > 0 ? 1 : -1; in rtw89_phy_cfo_crystal_cap_adjust()
4587 cfo->crystal_cap, cfo->def_x_cap); in rtw89_phy_cfo_crystal_cap_adjust()
4592 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_average_cfo_calc()
4593 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_average_cfo_calc()
4599 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_average_cfo_calc()
4603 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_average_cfo_calc()
4605 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_average_cfo_calc()
4606 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_average_cfo_calc()
4608 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_average_cfo_calc()
4609 cfo->dcfo_avg = phy_div(cfo_khz_all << chip->dcfo_comp_sft, in rtw89_phy_average_cfo_calc()
4622 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_multi_sta_cfo_calc()
4623 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_multi_sta_cfo_calc()
4638 if (cfo->rtw89_multi_cfo_mode == RTW89_PKT_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4641 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4643 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_multi_sta_cfo_calc()
4644 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_multi_sta_cfo_calc()
4651 } else if (cfo->rtw89_multi_cfo_mode == RTW89_ENTRY_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4654 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4656 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4657 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4658 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4661 cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4663 sta_cnt = rtwdev->total_sta_assoc; in rtw89_phy_multi_sta_cfo_calc()
4669 } else if (cfo->rtw89_multi_cfo_mode == RTW89_TP_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4671 cfo_tol = cfo->sta_cfo_tolerance; in rtw89_phy_multi_sta_cfo_calc()
4674 if (cfo->cfo_cnt[i] != 0) { in rtw89_phy_multi_sta_cfo_calc()
4675 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4676 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4679 cfo->cfo_avg[i] = cfo->pre_cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4681 max_cfo_lb = max(cfo->cfo_avg[i] - cfo_tol, max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4682 min_cfo_ub = min(cfo->cfo_avg[i] + cfo_tol, min_cfo_ub); in rtw89_phy_multi_sta_cfo_calc()
4683 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4687 i, cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4688 if (sta_cnt >= rtwdev->total_sta_assoc) in rtw89_phy_multi_sta_cfo_calc()
4691 tp_all = stats->rx_throughput; /* need tp for each entry */ in rtw89_phy_multi_sta_cfo_calc()
4706 min_cfo_ub - max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4710 "No intersection of cfo tolerance windows\n"); in rtw89_phy_multi_sta_cfo_calc()
4714 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4722 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_statistics_reset()
4724 memset(&cfo->cfo_tail, 0, sizeof(cfo->cfo_tail)); in rtw89_phy_cfo_statistics_reset()
4725 memset(&cfo->cfo_cnt, 0, sizeof(cfo->cfo_cnt)); in rtw89_phy_cfo_statistics_reset()
4726 cfo->packet_count = 0; in rtw89_phy_cfo_statistics_reset()
4727 cfo->packet_count_pre = 0; in rtw89_phy_cfo_statistics_reset()
4728 cfo->cfo_avg_pre = 0; in rtw89_phy_cfo_statistics_reset()
4733 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_dm()
4736 u8 pre_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_dm()
4737 u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; in rtw89_phy_cfo_dm()
4739 cfo->dcfo_avg = 0; in rtw89_phy_cfo_dm()
4741 rtwdev->total_sta_assoc); in rtw89_phy_cfo_dm()
4742 if (rtwdev->total_sta_assoc == 0 || rtw89_is_mlo_1_1(rtwdev)) { in rtw89_phy_cfo_dm()
4746 if (cfo->packet_count == 0) { in rtw89_phy_cfo_dm()
4750 if (cfo->packet_count == cfo->packet_count_pre) { in rtw89_phy_cfo_dm()
4754 if (rtwdev->total_sta_assoc == 1) in rtw89_phy_cfo_dm()
4758 if (cfo->divergence_lock_en) { in rtw89_phy_cfo_dm()
4759 cfo->lock_cnt++; in rtw89_phy_cfo_dm()
4760 if (cfo->lock_cnt > CFO_PERIOD_CNT) { in rtw89_phy_cfo_dm()
4761 cfo->divergence_lock_en = false; in rtw89_phy_cfo_dm()
4762 cfo->lock_cnt = 0; in rtw89_phy_cfo_dm()
4768 if (cfo->crystal_cap >= cfo->x_cap_ub || in rtw89_phy_cfo_dm()
4769 cfo->crystal_cap <= cfo->x_cap_lb) { in rtw89_phy_cfo_dm()
4770 cfo->divergence_lock_en = true; in rtw89_phy_cfo_dm()
4776 cfo->cfo_avg_pre = new_cfo; in rtw89_phy_cfo_dm()
4777 cfo->dcfo_avg_pre = cfo->dcfo_avg; in rtw89_phy_cfo_dm()
4778 x_cap_update = cfo->crystal_cap != pre_x_cap; in rtw89_phy_cfo_dm()
4780 rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", in rtw89_phy_cfo_dm()
4781 cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, in rtw89_phy_cfo_dm()
4782 cfo->x_cap_ofst); in rtw89_phy_cfo_dm()
4784 if (cfo->dcfo_avg > 0) in rtw89_phy_cfo_dm()
4785 cfo->dcfo_avg -= CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4787 cfo->dcfo_avg += CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4789 rtw89_dcfo_comp(rtwdev, cfo->dcfo_avg); in rtw89_phy_cfo_dm()
4797 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track_work()
4801 if (!cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track_work()
4805 wiphy_delayed_work_queue(wiphy, &rtwdev->cfo_track_work, in rtw89_phy_cfo_track_work()
4806 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_track_work()
4811 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_start_work()
4813 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->cfo_track_work, in rtw89_phy_cfo_start_work()
4814 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_start_work()
4819 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track()
4820 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_cfo_track()
4823 if (stats->rx_tf_periodic > CFO_TF_CNT_TH) in rtw89_phy_cfo_track()
4825 if (cfo->cfo_ul_ofdma_acc_mode == RTW89_CFO_UL_OFDMA_ACC_ENABLE && in rtw89_phy_cfo_track()
4829 switch (cfo->phy_cfo_status) { in rtw89_phy_cfo_track()
4831 if (stats->tx_throughput >= CFO_TP_UPPER) { in rtw89_phy_cfo_track()
4832 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_ENHANCE; in rtw89_phy_cfo_track()
4833 cfo->cfo_trig_by_timer_en = true; in rtw89_phy_cfo_track()
4834 cfo->cfo_timer_ms = CFO_COMP_PERIOD; in rtw89_phy_cfo_track()
4839 if (stats->tx_throughput <= CFO_TP_LOWER) in rtw89_phy_cfo_track()
4840 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4842 cfo->phy_cfo_trk_cnt >= CFO_PERIOD_CNT) in rtw89_phy_cfo_track()
4843 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_HOLD; in rtw89_phy_cfo_track()
4845 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4847 if (cfo->phy_cfo_status == RTW89_PHY_DCFO_STATE_NORMAL) { in rtw89_phy_cfo_track()
4848 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4849 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4853 if (stats->tx_throughput <= CFO_TP_LOWER) { in rtw89_phy_cfo_track()
4854 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4855 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4856 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4858 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4862 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4863 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4868 stats->tx_throughput, cfo->phy_cfo_status, in rtw89_phy_cfo_track()
4869 cfo->cfo_trig_by_timer_en, cfo->phy_cfo_trk_cnt, in rtw89_phy_cfo_track()
4870 ewma_thermal_read(&rtwdev->phystat.avg_thermal[0])); in rtw89_phy_cfo_track()
4871 if (cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track()
4879 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_parse()
4880 u8 macid = phy_ppdu->mac_id; in rtw89_phy_cfo_parse()
4887 cfo->cfo_tail[macid] += cfo_val; in rtw89_phy_cfo_parse()
4888 cfo->cfo_cnt[macid]++; in rtw89_phy_cfo_parse()
4889 cfo->packet_count++; in rtw89_phy_cfo_parse()
4894 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_assoc()
4896 rtwvif_link->chanctx_idx); in rtw89_phy_ul_tb_assoc()
4897 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_assoc()
4899 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_assoc()
4902 rtwvif_link->def_tri_idx = in rtw89_phy_ul_tb_assoc()
4905 if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) in rtw89_phy_ul_tb_assoc()
4906 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4907 else if (chan->band_type >= RTW89_BAND_5G && in rtw89_phy_ul_tb_assoc()
4908 chan->band_width >= RTW89_CHANNEL_WIDTH_40) in rtw89_phy_ul_tb_assoc()
4909 rtwvif_link->dyn_tb_bedge_en = true; in rtw89_phy_ul_tb_assoc()
4911 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4915 ul_tb_info->def_if_bandedge, rtwvif_link->def_tri_idx); in rtw89_phy_ul_tb_assoc()
4918 rtwvif_link->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); in rtw89_phy_ul_tb_assoc()
4949 if (!rtwdev->chip->ul_tb_pwr_diff) in rtw89_phy_ofdma_power_diff()
4952 if (rtwvif_link->pwr_diff_en == rtwvif_link->pre_pwr_diff_en) { in rtw89_phy_ofdma_power_diff()
4953 rtwvif_link->pwr_diff_en = false; in rtw89_phy_ofdma_power_diff()
4957 rtwvif_link->pre_pwr_diff_en = rtwvif_link->pwr_diff_en; in rtw89_phy_ofdma_power_diff()
4958 param = &table[rtwvif_link->pwr_diff_en]; in rtw89_phy_ofdma_power_diff()
4961 param->q_00); in rtw89_phy_ofdma_power_diff()
4963 param->q_11); in rtw89_phy_ofdma_power_diff()
4965 B_CUSTOMIZE_Q_MATRIX_EN, param->q_matrix_en); in rtw89_phy_ofdma_power_diff()
4967 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4969 param->ultb_1t_norm_160); in rtw89_phy_ofdma_power_diff()
4971 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4973 param->ultb_2t_norm_160); in rtw89_phy_ofdma_power_diff()
4975 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM1, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4977 param->com1_norm_1sts); in rtw89_phy_ofdma_power_diff()
4979 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM2, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4981 param->com2_resp_1sts_path); in rtw89_phy_ofdma_power_diff()
4989 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_ul_tb_ctrl_check()
4992 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_ul_tb_ctrl_check()
4995 if (!vif->cfg.assoc) in rtw89_phy_ul_tb_ctrl_check()
4998 if (rtwdev->chip->ul_tb_waveform_ctrl) { in rtw89_phy_ul_tb_ctrl_check()
4999 if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) in rtw89_phy_ul_tb_ctrl_check()
5000 ul_tb_data->high_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
5001 else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) in rtw89_phy_ul_tb_ctrl_check()
5002 ul_tb_data->low_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
5004 ul_tb_data->valid = true; in rtw89_phy_ul_tb_ctrl_check()
5005 ul_tb_data->def_tri_idx = rtwvif_link->def_tri_idx; in rtw89_phy_ul_tb_ctrl_check()
5006 ul_tb_data->dyn_tb_bedge_en = rtwvif_link->dyn_tb_bedge_en; in rtw89_phy_ul_tb_ctrl_check()
5015 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_waveform_ctrl()
5017 if (!rtwdev->chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_waveform_ctrl()
5020 if (ul_tb_data->dyn_tb_bedge_en) { in rtw89_phy_ul_tb_waveform_ctrl()
5021 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
5025 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
5027 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
5030 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
5034 if (ul_tb_info->dyn_tb_tri_en) { in rtw89_phy_ul_tb_waveform_ctrl()
5035 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
5040 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
5043 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
5046 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
5053 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_ctrl_track()
5059 if (!chip->ul_tb_waveform_ctrl && !chip->ul_tb_pwr_diff) in rtw89_phy_ul_tb_ctrl_track()
5062 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_ul_tb_ctrl_track()
5077 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_info_init()
5078 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_info_init()
5080 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_info_init()
5083 ul_tb_info->dyn_tb_tri_en = true; in rtw89_phy_ul_tb_info_init()
5084 ul_tb_info->def_if_bandedge = in rtw89_phy_ul_tb_info_init()
5091 ewma_rssi_init(&antdiv_sts->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
5092 ewma_rssi_init(&antdiv_sts->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
5093 ewma_rssi_init(&antdiv_sts->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
5094 antdiv_sts->pkt_cnt_cck = 0; in rtw89_phy_antdiv_sts_instance_reset()
5095 antdiv_sts->pkt_cnt_ofdm = 0; in rtw89_phy_antdiv_sts_instance_reset()
5096 antdiv_sts->pkt_cnt_non_legacy = 0; in rtw89_phy_antdiv_sts_instance_reset()
5097 antdiv_sts->evm = 0; in rtw89_phy_antdiv_sts_instance_reset()
5104 if (rtw89_get_data_rate_mode(rtwdev, phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) { in rtw89_phy_antdiv_sts_instance_add()
5105 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) { in rtw89_phy_antdiv_sts_instance_add()
5106 ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
5107 stats->pkt_cnt_cck++; in rtw89_phy_antdiv_sts_instance_add()
5109 ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
5110 stats->pkt_cnt_ofdm++; in rtw89_phy_antdiv_sts_instance_add()
5111 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
5114 ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
5115 stats->pkt_cnt_non_legacy++; in rtw89_phy_antdiv_sts_instance_add()
5116 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
5122 if (stats->pkt_cnt_non_legacy >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
5123 stats->pkt_cnt_non_legacy >= stats->pkt_cnt_ofdm) in rtw89_phy_antdiv_sts_instance_get_rssi()
5124 return ewma_rssi_read(&stats->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
5125 else if (stats->pkt_cnt_ofdm >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
5126 stats->pkt_cnt_ofdm >= stats->pkt_cnt_non_legacy) in rtw89_phy_antdiv_sts_instance_get_rssi()
5127 return ewma_rssi_read(&stats->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
5129 return ewma_rssi_read(&stats->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
5134 return phy_div(stats->evm, stats->pkt_cnt_non_legacy + stats->pkt_cnt_ofdm); in rtw89_phy_antdiv_sts_instance_get_evm()
5140 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_parse()
5141 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_parse()
5143 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_parse()
5146 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->target_stats); in rtw89_phy_antdiv_parse()
5148 if (!antdiv->get_stats) in rtw89_phy_antdiv_parse()
5151 if (hal->antenna_rx == RF_A) in rtw89_phy_antdiv_parse()
5152 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->main_stats); in rtw89_phy_antdiv_parse()
5153 else if (hal->antenna_rx == RF_B) in rtw89_phy_antdiv_parse()
5154 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->aux_stats); in rtw89_phy_antdiv_parse()
5187 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_sts_reset()
5189 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_sts_reset()
5190 rtw89_phy_antdiv_sts_instance_reset(&antdiv->main_stats); in rtw89_phy_antdiv_sts_reset()
5191 rtw89_phy_antdiv_sts_instance_reset(&antdiv->aux_stats); in rtw89_phy_antdiv_sts_reset()
5196 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_init()
5197 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_init()
5199 if (!hal->ant_diversity) in rtw89_phy_antdiv_init()
5202 antdiv->get_stats = false; in rtw89_phy_antdiv_init()
5203 antdiv->rssi_pre = 0; in rtw89_phy_antdiv_init()
5210 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_thermal_protect()
5211 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_thermal_protect()
5212 u8 th_max = phystat->last_thermal_max; in rtw89_phy_thermal_protect()
5213 u8 lv = hal->thermal_prot_lv; in rtw89_phy_thermal_protect()
5215 if (!hal->thermal_prot_th || in rtw89_phy_thermal_protect()
5216 (hal->disabled_dm_bitmap & BIT(RTW89_DM_THERMAL_PROTECT))) in rtw89_phy_thermal_protect()
5219 if (th_max > hal->thermal_prot_th && lv < RTW89_THERMAL_PROT_LV_MAX) in rtw89_phy_thermal_protect()
5221 else if (th_max < hal->thermal_prot_th - 2 && lv > 0) in rtw89_phy_thermal_protect()
5222 lv--; in rtw89_phy_thermal_protect()
5226 hal->thermal_prot_lv = lv; in rtw89_phy_thermal_protect()
5230 rtw89_fw_h2c_tx_duty(rtwdev, hal->thermal_prot_lv); in rtw89_phy_thermal_protect()
5235 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_thermal_update()
5239 for (i = 0; i < rtwdev->chip->rf_path_num; i++) { in rtw89_phy_stat_thermal_update()
5242 ewma_thermal_add(&phystat->avg_thermal[i], th); in rtw89_phy_stat_thermal_update()
5246 ewma_thermal_read(&phystat->avg_thermal[i])); in rtw89_phy_stat_thermal_update()
5251 phystat->last_thermal_max = th_max; in rtw89_phy_stat_thermal_update()
5263 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in __rtw89_phy_stat_rssi_update_iter()
5264 struct rtw89_dev *rtwdev = rssi_data->rtwdev; in __rtw89_phy_stat_rssi_update_iter()
5269 rssi_curr = ewma_rssi_read(&rtwsta_link->avg_rssi); in __rtw89_phy_stat_rssi_update_iter()
5270 bb = rtw89_get_bb_ctx(rtwdev, rtwvif_link->phy_idx); in __rtw89_phy_stat_rssi_update_iter()
5271 ch_info = &bb->ch_info; in __rtw89_phy_stat_rssi_update_iter()
5273 if (rssi_curr < ch_info->rssi_min) { in __rtw89_phy_stat_rssi_update_iter()
5274 ch_info->rssi_min = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5275 ch_info->rssi_min_macid = rtwsta_link->mac_id; in __rtw89_phy_stat_rssi_update_iter()
5278 if (rtwsta_link->prev_rssi == 0) { in __rtw89_phy_stat_rssi_update_iter()
5279 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5280 } else if (abs((int)rtwsta_link->prev_rssi - (int)rssi_curr) > in __rtw89_phy_stat_rssi_update_iter()
5282 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5283 rssi_data->rssi_changed = true; in __rtw89_phy_stat_rssi_update_iter()
5307 bb->ch_info.rssi_min = U8_MAX; in rtw89_phy_stat_rssi_update()
5309 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_stat_rssi_update()
5318 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_init()
5321 for (i = 0; i < rtwdev->chip->rf_path_num; i++) in rtw89_phy_stat_init()
5322 ewma_thermal_init(&phystat->avg_thermal[i]); in rtw89_phy_stat_init()
5326 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_init()
5327 memset(&phystat->last_pkt_stat, 0, sizeof(phystat->last_pkt_stat)); in rtw89_phy_stat_init()
5329 ewma_rssi_init(&phystat->bcn_rssi); in rtw89_phy_stat_init()
5331 rtwdev->hal.thermal_prot_lv = 0; in rtw89_phy_stat_init()
5336 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_track()
5342 phystat->last_pkt_stat = phystat->cur_pkt_stat; in rtw89_phy_stat_track()
5343 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_track()
5349 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_us_to_idx()
5351 return time_us >> (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_us_to_idx()
5357 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_idx_to_us()
5359 return idx << (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_idx_to_us()
5365 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_top_setting_init()
5366 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_top_setting_init()
5367 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_top_setting_init()
5369 env->ccx_manual_ctrl = false; in rtw89_phy_ccx_top_setting_init()
5370 env->ccx_ongoing = false; in rtw89_phy_ccx_top_setting_init()
5371 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_top_setting_init()
5372 env->ccx_period = 0; in rtw89_phy_ccx_top_setting_init()
5373 env->ccx_unit_idx = RTW89_CCX_32_US; in rtw89_phy_ccx_top_setting_init()
5375 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->en_mask, 1, bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5376 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1, in rtw89_phy_ccx_top_setting_init()
5377 bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5378 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1, in rtw89_phy_ccx_top_setting_init()
5379 bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5380 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask, in rtw89_phy_ccx_top_setting_init()
5381 RTW89_CCX_EDCCA_BW20_0, bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5388 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_get_report()
5392 numer = report * score + (env->ccx_period >> 1); in rtw89_phy_ccx_get_report()
5393 if (env->ccx_period) in rtw89_phy_ccx_get_report()
5394 ret = numer / env->ccx_period; in rtw89_phy_ccx_get_report()
5396 return ret >= score ? score - 1 : ret; in rtw89_phy_ccx_get_report()
5431 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_racing_release()
5434 "lv:(%d)->(0)\n", env->ccx_rac_lv); in rtw89_phy_ccx_racing_release()
5436 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_release()
5437 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_racing_release()
5438 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ccx_racing_release()
5445 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_th_update_check()
5446 bool is_update = env->ifs_clm_app != para->ifs_clm_app; in rtw89_phy_ifs_clm_th_update_check()
5448 u16 *ifs_th_l = env->ifs_clm_th_l; in rtw89_phy_ifs_clm_th_update_check()
5449 u16 *ifs_th_h = env->ifs_clm_th_h; in rtw89_phy_ifs_clm_th_update_check()
5456 switch (para->ifs_clm_app) { in rtw89_phy_ifs_clm_th_update_check()
5467 ifs_th0_us = para->ifs_clm_manual_th0; in rtw89_phy_ifs_clm_th_update_check()
5468 ifs_th_times = para->ifs_clm_manual_th_times; in rtw89_phy_ifs_clm_th_update_check()
5475 * low[i] = high[i-1] + 1 in rtw89_phy_ifs_clm_th_update_check()
5476 * high[i] = high[i-1] * ifs_th_times in rtw89_phy_ifs_clm_th_update_check()
5483 ifs_th_l[i] = ifs_th_h[i - 1] + 1; in rtw89_phy_ifs_clm_th_update_check()
5484 ifs_th_h_us[i] = ifs_th_h_us[i - 1] * ifs_th_times; in rtw89_phy_ifs_clm_th_update_check()
5491 "No need to update IFS_TH\n"); in rtw89_phy_ifs_clm_th_update_check()
5499 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set_th_reg()
5500 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_set_th_reg()
5501 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set_th_reg()
5504 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5505 env->ifs_clm_th_l[0], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5506 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5507 env->ifs_clm_th_l[1], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5508 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5509 env->ifs_clm_th_l[2], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5510 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5511 env->ifs_clm_th_l[3], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5513 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5514 env->ifs_clm_th_h[0], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5515 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5516 env->ifs_clm_th_h[1], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5517 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5518 env->ifs_clm_th_h[2], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5519 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5520 env->ifs_clm_th_h[3], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5525 i + 1, env->ifs_clm_th_l[i], env->ifs_clm_th_h[i]); in rtw89_phy_ifs_clm_set_th_reg()
5531 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_setting_init()
5532 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_setting_init()
5533 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_setting_init()
5536 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ifs_clm_setting_init()
5537 env->ifs_clm_mntr_time = 0; in rtw89_phy_ifs_clm_setting_init()
5543 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_collect_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5544 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5545 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5546 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5547 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5548 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5549 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5550 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5551 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5552 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5559 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_racing_ctrl()
5565 return -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5569 "ccx_ongoing=%d, level:(%d)->(%d)\n", env->ccx_ongoing, in rtw89_phy_ccx_racing_ctrl()
5570 env->ccx_rac_lv, level); in rtw89_phy_ccx_racing_ctrl()
5572 if (env->ccx_ongoing) { in rtw89_phy_ccx_racing_ctrl()
5573 if (level <= env->ccx_rac_lv) in rtw89_phy_ccx_racing_ctrl()
5574 ret = -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5576 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_ctrl()
5580 env->ccx_rac_lv = level; in rtw89_phy_ccx_racing_ctrl()
5591 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_trigger()
5592 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_trigger()
5593 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_trigger()
5595 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 0, in rtw89_phy_ccx_trigger()
5596 bb->phy_idx); in rtw89_phy_ccx_trigger()
5597 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0, in rtw89_phy_ccx_trigger()
5598 bb->phy_idx); in rtw89_phy_ccx_trigger()
5599 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 1, in rtw89_phy_ccx_trigger()
5600 bb->phy_idx); in rtw89_phy_ccx_trigger()
5601 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1, in rtw89_phy_ccx_trigger()
5602 bb->phy_idx); in rtw89_phy_ccx_trigger()
5604 env->ccx_ongoing = true; in rtw89_phy_ccx_trigger()
5610 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_get_utility()
5614 env->ifs_clm_tx_ratio = in rtw89_phy_ifs_clm_get_utility()
5615 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_tx, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5616 env->ifs_clm_edcca_excl_cca_ratio = in rtw89_phy_ifs_clm_get_utility()
5617 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_edcca_excl_cca, in rtw89_phy_ifs_clm_get_utility()
5619 env->ifs_clm_cck_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5620 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_cckfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5621 env->ifs_clm_ofdm_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5622 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_ofdmfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5623 env->ifs_clm_cck_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5624 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_cckcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5626 env->ifs_clm_ofdm_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5627 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_ofdmcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5629 env->ifs_clm_cck_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5630 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_cckfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5631 env->ifs_clm_ofdm_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5632 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_ofdmfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5635 if (env->ifs_clm_his[i] > ENV_MNTR_IFSCLM_HIS_MAX) { in rtw89_phy_ifs_clm_get_utility()
5636 env->ifs_clm_ifs_avg[i] = ENV_MNTR_FAIL_DWORD; in rtw89_phy_ifs_clm_get_utility()
5638 env->ifs_clm_ifs_avg[i] = in rtw89_phy_ifs_clm_get_utility()
5640 env->ifs_clm_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5643 res = rtw89_phy_ccx_idx_to_us(rtwdev, bb, env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_utility()
5644 res += env->ifs_clm_his[i] >> 1; in rtw89_phy_ifs_clm_get_utility()
5645 if (env->ifs_clm_his[i]) in rtw89_phy_ifs_clm_get_utility()
5646 res /= env->ifs_clm_his[i]; in rtw89_phy_ifs_clm_get_utility()
5649 env->ifs_clm_cca_avg[i] = res; in rtw89_phy_ifs_clm_get_utility()
5653 "IFS-CLM ratio {Tx, EDCCA_exclu_cca} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5654 env->ifs_clm_tx_ratio, env->ifs_clm_edcca_excl_cca_ratio); in rtw89_phy_ifs_clm_get_utility()
5656 "IFS-CLM FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5657 env->ifs_clm_cck_fa_ratio, env->ifs_clm_ofdm_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5659 "IFS-CLM FA permil {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5660 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil); in rtw89_phy_ifs_clm_get_utility()
5662 "IFS-CLM CCA_exclu_FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5663 env->ifs_clm_cck_cca_excl_fa_ratio, in rtw89_phy_ifs_clm_get_utility()
5664 env->ifs_clm_ofdm_cca_excl_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5669 i + 1, env->ifs_clm_his[i], env->ifs_clm_ifs_avg[i], in rtw89_phy_ifs_clm_get_utility()
5670 env->ifs_clm_cca_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5676 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_get_result()
5677 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_get_result()
5678 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_get_result()
5681 if (rtw89_phy_read32_idx(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5682 ccx->ifs_cnt_done_mask, bb->phy_idx) == 0) { in rtw89_phy_ifs_clm_get_result()
5688 env->ifs_clm_tx = in rtw89_phy_ifs_clm_get_result()
5689 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5690 ccx->ifs_clm_tx_cnt_msk, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5691 env->ifs_clm_edcca_excl_cca = in rtw89_phy_ifs_clm_get_result()
5692 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5693 ccx->ifs_clm_edcca_excl_cca_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5694 env->ifs_clm_cckcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5695 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5696 ccx->ifs_clm_cckcca_excl_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5697 env->ifs_clm_ofdmcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5698 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5699 ccx->ifs_clm_ofdmcca_excl_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5700 env->ifs_clm_cckfa = in rtw89_phy_ifs_clm_get_result()
5701 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5702 ccx->ifs_clm_cck_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5703 env->ifs_clm_ofdmfa = in rtw89_phy_ifs_clm_get_result()
5704 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5705 ccx->ifs_clm_ofdm_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5707 env->ifs_clm_his[0] = in rtw89_phy_ifs_clm_get_result()
5708 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5709 ccx->ifs_t1_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5710 env->ifs_clm_his[1] = in rtw89_phy_ifs_clm_get_result()
5711 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5712 ccx->ifs_t2_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5713 env->ifs_clm_his[2] = in rtw89_phy_ifs_clm_get_result()
5714 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5715 ccx->ifs_t3_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5716 env->ifs_clm_his[3] = in rtw89_phy_ifs_clm_get_result()
5717 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5718 ccx->ifs_t4_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5720 env->ifs_clm_avg[0] = in rtw89_phy_ifs_clm_get_result()
5721 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5722 ccx->ifs_t1_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5723 env->ifs_clm_avg[1] = in rtw89_phy_ifs_clm_get_result()
5724 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5725 ccx->ifs_t2_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5726 env->ifs_clm_avg[2] = in rtw89_phy_ifs_clm_get_result()
5727 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5728 ccx->ifs_t3_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5729 env->ifs_clm_avg[3] = in rtw89_phy_ifs_clm_get_result()
5730 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5731 ccx->ifs_t4_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5733 env->ifs_clm_cca[0] = in rtw89_phy_ifs_clm_get_result()
5734 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5735 ccx->ifs_t1_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5736 env->ifs_clm_cca[1] = in rtw89_phy_ifs_clm_get_result()
5737 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5738 ccx->ifs_t2_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5739 env->ifs_clm_cca[2] = in rtw89_phy_ifs_clm_get_result()
5740 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5741 ccx->ifs_t3_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5742 env->ifs_clm_cca[3] = in rtw89_phy_ifs_clm_get_result()
5743 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5744 ccx->ifs_t4_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5746 env->ifs_clm_total_ifs = in rtw89_phy_ifs_clm_get_result()
5747 rtw89_phy_read32_idx(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5748 ccx->ifs_total_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5750 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n", in rtw89_phy_ifs_clm_get_result()
5751 env->ifs_clm_total_ifs); in rtw89_phy_ifs_clm_get_result()
5754 env->ifs_clm_tx, env->ifs_clm_edcca_excl_cca); in rtw89_phy_ifs_clm_get_result()
5756 "IFS-CLM FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5757 env->ifs_clm_cckfa, env->ifs_clm_ofdmfa); in rtw89_phy_ifs_clm_get_result()
5759 "IFS-CLM CCA_exclu_FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5760 env->ifs_clm_cckcca_excl_fa, env->ifs_clm_ofdmcca_excl_fa); in rtw89_phy_ifs_clm_get_result()
5765 "T%d:[%d, %d, %d]\n", i + 1, env->ifs_clm_his[i], in rtw89_phy_ifs_clm_get_result()
5766 env->ifs_clm_avg[i], env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_result()
5777 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set()
5778 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_set()
5779 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set()
5783 if (para->mntr_time == 0) { in rtw89_phy_ifs_clm_set()
5786 return -EINVAL; in rtw89_phy_ifs_clm_set()
5789 if (rtw89_phy_ccx_racing_ctrl(rtwdev, bb, para->rac_lv)) in rtw89_phy_ifs_clm_set()
5790 return -EINVAL; in rtw89_phy_ifs_clm_set()
5792 if (para->mntr_time != env->ifs_clm_mntr_time) { in rtw89_phy_ifs_clm_set()
5793 rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time, in rtw89_phy_ifs_clm_set()
5795 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5796 ccx->ifs_clm_period_mask, period, bb->phy_idx); in rtw89_phy_ifs_clm_set()
5797 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5798 ccx->ifs_clm_cnt_unit_mask, in rtw89_phy_ifs_clm_set()
5799 unit_idx, bb->phy_idx); in rtw89_phy_ifs_clm_set()
5802 "Update IFS-CLM time ((%d)) -> ((%d))\n", in rtw89_phy_ifs_clm_set()
5803 env->ifs_clm_mntr_time, para->mntr_time); in rtw89_phy_ifs_clm_set()
5805 env->ifs_clm_mntr_time = para->mntr_time; in rtw89_phy_ifs_clm_set()
5806 env->ccx_period = (u16)period; in rtw89_phy_ifs_clm_set()
5807 env->ccx_unit_idx = (u8)unit_idx; in rtw89_phy_ifs_clm_set()
5811 env->ifs_clm_app = para->ifs_clm_app; in rtw89_phy_ifs_clm_set()
5821 struct rtw89_env_monitor_info *env = &bb->env_monitor; in __rtw89_phy_env_monitor_track()
5825 env->ccx_watchdog_result = RTW89_PHY_ENV_MON_CCX_FAIL; in __rtw89_phy_env_monitor_track()
5826 if (env->ccx_manual_ctrl) { in __rtw89_phy_env_monitor_track()
5833 "BB-%d env_monitor track\n", bb->phy_idx); in __rtw89_phy_env_monitor_track()
5837 env->ccx_watchdog_result |= RTW89_PHY_ENV_MON_IFS_CLM; in __rtw89_phy_env_monitor_track()
5851 env->ccx_watchdog_result, chk_result); in __rtw89_phy_env_monitor_track()
5865 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_physts_ie_page_valid()
5871 *ie_page -= 1; in rtw89_physts_ie_page_valid()
5873 if (*ie_page == RTW89_EHT_PKT && chip->chip_gen == RTW89_CHIP_AX) in rtw89_physts_ie_page_valid()
5907 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_physts_set_ie_bitmap()
5913 if (chip->chip_id == RTL8852A) in rtw89_physts_set_ie_bitmap()
5924 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_physts_enable_fail_report()
5925 const struct rtw89_physts_regs *physts = phy->physts; in rtw89_physts_enable_fail_report()
5928 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5929 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5930 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5931 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5933 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5934 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5935 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5936 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5943 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_physts_parsing_init()
5951 (i == RTW89_EHT_PKT && chip->chip_gen == RTW89_CHIP_AX)) in __rtw89_physts_parsing_init()
5979 if (rtwdev->dbcc_en) in rtw89_physts_parsing_init()
5986 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_dig_read_gain_table()
5988 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_read_gain_table()
5997 gain_arr = dig->lna_gain_g; in rtw89_phy_dig_read_gain_table()
5999 cfg = chip->dig_table->cfg_lna_g; in rtw89_phy_dig_read_gain_table()
6003 gain_arr = dig->tia_gain_g; in rtw89_phy_dig_read_gain_table()
6005 cfg = chip->dig_table->cfg_tia_g; in rtw89_phy_dig_read_gain_table()
6009 gain_arr = dig->lna_gain_a; in rtw89_phy_dig_read_gain_table()
6011 cfg = chip->dig_table->cfg_lna_a; in rtw89_phy_dig_read_gain_table()
6015 gain_arr = dig->tia_gain_a; in rtw89_phy_dig_read_gain_table()
6017 cfg = chip->dig_table->cfg_tia_a; in rtw89_phy_dig_read_gain_table()
6024 for (i = 0; i < cfg->size; i++) { in rtw89_phy_dig_read_gain_table()
6025 tmp = rtw89_phy_read32_idx(rtwdev, cfg->table[i].addr, in rtw89_phy_dig_read_gain_table()
6026 cfg->table[i].mask, bb->phy_idx); in rtw89_phy_dig_read_gain_table()
6039 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_update_gain_para()
6043 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_update_gain_para()
6047 B_PATH0_IB_PKPW_MSK, bb->phy_idx); in rtw89_phy_dig_update_gain_para()
6048 dig->ib_pkpwr = sign_extend32(tmp >> DIG_GAIN_SHIFT, U8_MAX_BIT); in rtw89_phy_dig_update_gain_para()
6049 dig->ib_pbk = rtw89_phy_read32_idx(rtwdev, R_PATH0_IB_PBK, in rtw89_phy_dig_update_gain_para()
6050 B_PATH0_IB_PBK_MSK, bb->phy_idx); in rtw89_phy_dig_update_gain_para()
6052 dig->ib_pkpwr, dig->ib_pbk); in rtw89_phy_dig_update_gain_para()
6067 struct rtw89_phy_ch_info *ch_info = &bb->ch_info; in rtw89_phy_dig_update_rssi_info()
6068 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_update_rssi_info()
6069 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_rssi_info()
6072 dig->igi_rssi = ch_info->rssi_min >> 1; in rtw89_phy_dig_update_rssi_info()
6074 rtw89_debug(rtwdev, RTW89_DBG_DIG, "RSSI update : NO Link\n"); in rtw89_phy_dig_update_rssi_info()
6075 dig->igi_rssi = rssi_nolink; in rtw89_phy_dig_update_rssi_info()
6082 const struct rtw89_chan *chan = rtw89_mgnt_chan_get(rtwdev, bb->phy_idx); in rtw89_phy_dig_update_para()
6083 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_update_para()
6084 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_para()
6087 switch (chan->band_type) { in rtw89_phy_dig_update_para()
6089 dig->lna_gain = dig->lna_gain_g; in rtw89_phy_dig_update_para()
6090 dig->tia_gain = dig->tia_gain_g; in rtw89_phy_dig_update_para()
6092 dig->force_gaincode_idx_en = false; in rtw89_phy_dig_update_para()
6093 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
6097 dig->lna_gain = dig->lna_gain_a; in rtw89_phy_dig_update_para()
6098 dig->tia_gain = dig->tia_gain_a; in rtw89_phy_dig_update_para()
6100 dig->force_gaincode_idx_en = true; in rtw89_phy_dig_update_para()
6101 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
6104 memcpy(dig->fa_th, fa_th_src, sizeof(dig->fa_th)); in rtw89_phy_dig_update_para()
6105 memcpy(dig->igi_rssi_th, igi_rssi_th, sizeof(dig->igi_rssi_th)); in rtw89_phy_dig_update_para()
6115 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_para_reset()
6117 dig->cur_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
6118 dig->cur_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
6119 dig->cur_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
6120 dig->force_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
6121 dig->force_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
6122 dig->force_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
6124 dig->dyn_igi_max = igi_max_performance_mode; in rtw89_phy_dig_para_reset()
6125 dig->dyn_igi_min = dynamic_igi_min; in rtw89_phy_dig_para_reset()
6126 dig->dyn_pd_th_max = dynamic_pd_threshold_max; in rtw89_phy_dig_para_reset()
6127 dig->pd_low_th_ofst = pd_low_th_offset; in rtw89_phy_dig_para_reset()
6128 dig->is_linked_pre = false; in rtw89_phy_dig_para_reset()
6134 rtw89_debug(rtwdev, RTW89_DBG_DIG, "BB-%d dig_init\n", bb->phy_idx); in __rtw89_phy_dig_init()
6151 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_lna_idx_by_rssi()
6154 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_lna_idx_by_rssi()
6156 else if (rssi < dig->igi_rssi_th[1]) in rtw89_phy_dig_lna_idx_by_rssi()
6158 else if (rssi < dig->igi_rssi_th[2]) in rtw89_phy_dig_lna_idx_by_rssi()
6160 else if (rssi < dig->igi_rssi_th[3]) in rtw89_phy_dig_lna_idx_by_rssi()
6162 else if (rssi < dig->igi_rssi_th[4]) in rtw89_phy_dig_lna_idx_by_rssi()
6173 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_tia_idx_by_rssi()
6176 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_tia_idx_by_rssi()
6190 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_rxb_idx_by_rssi()
6191 s8 lna_gain = dig->lna_gain[set->lna_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
6192 s8 tia_gain = dig->tia_gain[set->tia_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
6197 rxb_idx_tmp += dig->ib_pkpwr - dig->ib_pbk - wb_rssi; in rtw89_phy_dig_rxb_idx_by_rssi()
6210 set->lna_idx = rtw89_phy_dig_lna_idx_by_rssi(rtwdev, bb, rssi); in rtw89_phy_dig_gaincode_by_rssi()
6211 set->tia_idx = rtw89_phy_dig_tia_idx_by_rssi(rtwdev, bb, rssi); in rtw89_phy_dig_gaincode_by_rssi()
6212 set->rxb_idx = rtw89_phy_dig_rxb_idx_by_rssi(rtwdev, bb, rssi, set); in rtw89_phy_dig_gaincode_by_rssi()
6216 rssi, set->lna_idx, set->tia_idx, set->rxb_idx); in rtw89_phy_dig_gaincode_by_rssi()
6224 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_igi_offset_by_env()
6225 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_dig_igi_offset_by_env()
6227 u8 igi_offset = dig->fa_rssi_ofst; in rtw89_phy_dig_igi_offset_by_env()
6230 fa_ratio = env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil; in rtw89_phy_dig_igi_offset_by_env()
6232 if (fa_ratio < dig->fa_th[0]) in rtw89_phy_dig_igi_offset_by_env()
6234 else if (fa_ratio < dig->fa_th[1]) in rtw89_phy_dig_igi_offset_by_env()
6236 else if (fa_ratio < dig->fa_th[2]) in rtw89_phy_dig_igi_offset_by_env()
6238 else if (fa_ratio < dig->fa_th[3]) in rtw89_phy_dig_igi_offset_by_env()
6249 dig->fa_rssi_ofst = igi_offset; in rtw89_phy_dig_igi_offset_by_env()
6252 "fa_th: [+6 (%d) +4 (%d) +2 (%d) 0 (%d) -2 ]\n", in rtw89_phy_dig_igi_offset_by_env()
6253 dig->fa_th[3], dig->fa_th[2], dig->fa_th[1], dig->fa_th[0]); in rtw89_phy_dig_igi_offset_by_env()
6257 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
6258 env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
6265 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_lna_idx()
6267 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
6268 dig_regs->p0_lna_init.mask, lna_idx, bb->phy_idx); in rtw89_phy_dig_set_lna_idx()
6269 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
6270 dig_regs->p1_lna_init.mask, lna_idx, bb->phy_idx); in rtw89_phy_dig_set_lna_idx()
6276 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_tia_idx()
6278 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
6279 dig_regs->p0_tia_init.mask, tia_idx, bb->phy_idx); in rtw89_phy_dig_set_tia_idx()
6280 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
6281 dig_regs->p1_tia_init.mask, tia_idx, bb->phy_idx); in rtw89_phy_dig_set_tia_idx()
6287 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_rxb_idx()
6289 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
6290 dig_regs->p0_rxb_init.mask, rxb_idx, bb->phy_idx); in rtw89_phy_dig_set_rxb_idx()
6291 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
6292 dig_regs->p1_rxb_init.mask, rxb_idx, bb->phy_idx); in rtw89_phy_dig_set_rxb_idx()
6299 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_set_igi_cr()
6314 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_sdagc_follow_pagc_config()
6316 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6317 dig_regs->p0_p20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6318 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6319 dig_regs->p0_s20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6320 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6321 dig_regs->p1_p20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6322 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6323 dig_regs->p1_s20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6331 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_config_igi()
6333 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_config_igi()
6336 if (dig->force_gaincode_idx_en) { in rtw89_phy_dig_config_igi()
6337 rtw89_phy_dig_set_igi_cr(rtwdev, bb, dig->force_gaincode); in rtw89_phy_dig_config_igi()
6341 rtw89_phy_dig_gaincode_by_rssi(rtwdev, bb, dig->igi_fa_rssi, in rtw89_phy_dig_config_igi()
6342 &dig->cur_gaincode); in rtw89_phy_dig_config_igi()
6343 rtw89_phy_dig_set_igi_cr(rtwdev, bb, dig->cur_gaincode); in rtw89_phy_dig_config_igi()
6351 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_dig_cal_under_region()
6352 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_cal_under_region()
6353 u8 under_region = dig->pd_low_th_ofst; in rtw89_phy_dig_cal_under_region()
6355 if (rtwdev->chip->chip_gen == RTW89_CHIP_AX) in rtw89_phy_dig_cal_under_region()
6383 struct rtw89_dig_info *dig = &bb->dig; in __rtw89_phy_dig_dyn_pd_th()
6389 dig->dyn_pd_th_max = dig->igi_rssi; in __rtw89_phy_dig_dyn_pd_th()
6391 final_rssi = min_t(u8, rssi, dig->igi_rssi); in __rtw89_phy_dig_dyn_pd_th()
6396 pd_val = (ofdm_cca_th - under_region - PD_TH_MIN_RSSI) >> 1; in __rtw89_phy_dig_dyn_pd_th()
6413 const struct rtw89_chan *chan = rtw89_mgnt_chan_get(rtwdev, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6414 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_dyn_pd_th()
6415 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_dyn_pd_th()
6416 u8 final_rssi, under_region = dig->pd_low_th_ofst; in rtw89_phy_dig_dyn_pd_th()
6421 dig->bak_dig = pd_val; in rtw89_phy_dig_dyn_pd_th()
6423 rtw89_phy_write32_idx(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6424 dig_regs->pd_lower_bound_mask, pd_val, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6425 rtw89_phy_write32_idx(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6426 dig_regs->pd_spatial_reuse_en, enable, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6428 if (!rtwdev->hal.support_cckpd) in rtw89_phy_dig_dyn_pd_th()
6431 final_rssi = min_t(u8, rssi, dig->igi_rssi); in rtw89_phy_dig_dyn_pd_th()
6433 cck_cca_th = max_t(s8, final_rssi - under_region, CCKPD_TH_MIN_RSSI); in rtw89_phy_dig_dyn_pd_th()
6434 pd_val = (u32)(cck_cca_th - IGI_RSSI_MAX); in rtw89_phy_dig_dyn_pd_th()
6440 rtw89_phy_write32_idx(rtwdev, dig_regs->bmode_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6441 dig_regs->bmode_cca_rssi_limit_en, enable, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6442 rtw89_phy_write32_idx(rtwdev, dig_regs->bmode_pd_lower_bound_reg, in rtw89_phy_dig_dyn_pd_th()
6443 dig_regs->bmode_rssi_nocca_low_th_mask, pd_val, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6448 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_reset()
6450 dig->bypass_dig = false; in rtw89_phy_dig_reset()
6452 rtw89_phy_dig_set_igi_cr(rtwdev, bb, dig->force_gaincode); in rtw89_phy_dig_reset()
6463 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_cal_igi_fa_rssi()
6468 igi_min = max_t(int, dig->igi_rssi - IGI_RSSI_MIN, 0); in rtw89_phy_cal_igi_fa_rssi()
6469 dig->dyn_igi_max = min(igi_min + IGI_OFFSET_MAX, igi_max_performance_mode); in rtw89_phy_cal_igi_fa_rssi()
6470 dig->dyn_igi_min = max(igi_min, ABS_IGI_MIN); in rtw89_phy_cal_igi_fa_rssi()
6472 if (dig->dyn_igi_max >= dig->dyn_igi_min) { in rtw89_phy_cal_igi_fa_rssi()
6473 dig->igi_fa_rssi += dig->fa_rssi_ofst; in rtw89_phy_cal_igi_fa_rssi()
6474 dig->igi_fa_rssi = clamp(dig->igi_fa_rssi, dig->dyn_igi_min, in rtw89_phy_cal_igi_fa_rssi()
6475 dig->dyn_igi_max); in rtw89_phy_cal_igi_fa_rssi()
6477 dig->igi_fa_rssi = dig->dyn_igi_max; in rtw89_phy_cal_igi_fa_rssi()
6493 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_set_mcc_dig()
6498 dig->igi_rssi = rssi_min >> 1; in rtw89_phy_set_mcc_dig()
6499 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_set_mcc_dig()
6501 rtw89_debug(rtwdev, RTW89_DBG_DIG, "RSSI update : NO Link\n"); in rtw89_phy_set_mcc_dig()
6502 dig->igi_rssi = rssi_nolink; in rtw89_phy_set_mcc_dig()
6503 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_set_mcc_dig()
6506 chan = rtw89_chan_get(rtwdev, rtwvif_link->chanctx_idx); in rtw89_phy_set_mcc_dig()
6508 pd_val = __rtw89_phy_dig_dyn_pd_th(rtwdev, bb, dig->igi_fa_rssi, in rtw89_phy_set_mcc_dig()
6510 rtw89_fw_h2c_mcc_dig(rtwdev, rtwvif_link->chanctx_idx, in rtw89_phy_set_mcc_dig()
6515 rtwvif_link->chanctx_idx, chan->primary_channel, in rtw89_phy_set_mcc_dig()
6516 dig->igi_rssi, pd_val); in rtw89_phy_set_mcc_dig()
6522 unsigned int link_id = mcc_dig->rtwvif_link->link_id; in rtw89_phy_set_mcc_dig_iter()
6526 if (rtwsta->rtwvif != mcc_dig->rtwvif_link->rtwvif) in rtw89_phy_set_mcc_dig_iter()
6529 rtwsta_link = rtwsta->links[link_id]; in rtw89_phy_set_mcc_dig_iter()
6533 mcc_dig->has_sta = true; in rtw89_phy_set_mcc_dig_iter()
6534 if (ewma_rssi_read(&rtwsta_link->avg_rssi) < mcc_dig->rssi_min) in rtw89_phy_set_mcc_dig_iter()
6535 mcc_dig->rssi_min = ewma_rssi_read(&rtwsta_link->avg_rssi); in rtw89_phy_set_mcc_dig_iter()
6555 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_dig_mcc()
6567 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_ctrl()
6568 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_ctrl()
6572 if (dig->pause_dig == pause_dig) in rtw89_phy_dig_ctrl()
6579 en_dig = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_ctrl()
6580 pd_val = restore ? dig->bak_dig : 0; in rtw89_phy_dig_ctrl()
6586 rtw89_phy_write32_idx(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_ctrl()
6587 dig_regs->pd_lower_bound_mask, pd_val, bb->phy_idx); in rtw89_phy_dig_ctrl()
6588 rtw89_phy_write32_idx(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_ctrl()
6589 dig_regs->pd_spatial_reuse_en, en_dig, bb->phy_idx); in rtw89_phy_dig_ctrl()
6591 dig->pause_dig = pause_dig; in rtw89_phy_dig_ctrl()
6612 struct rtw89_dig_info *dig = &bb->dig; in __rtw89_phy_dig()
6613 bool is_linked = rtwdev->total_sta_assoc > 0; in __rtw89_phy_dig()
6616 if (unlikely(dig->bypass_dig)) { in __rtw89_phy_dig()
6617 dig->bypass_dig = false; in __rtw89_phy_dig()
6621 rtw89_debug(rtwdev, RTW89_DBG_DIG, "BB-%d dig track\n", bb->phy_idx); in __rtw89_phy_dig()
6631 if (unlikely(dig->pause_dig)) in __rtw89_phy_dig()
6634 if (!dig->is_linked_pre && is_linked) { in __rtw89_phy_dig()
6637 dig->igi_fa_rssi = dig->igi_rssi; in __rtw89_phy_dig()
6638 } else if (dig->is_linked_pre && !is_linked) { in __rtw89_phy_dig()
6641 dig->igi_fa_rssi = dig->igi_rssi; in __rtw89_phy_dig()
6643 dig->is_linked_pre = is_linked; in __rtw89_phy_dig()
6649 dig->igi_rssi, dig->dyn_igi_max, dig->dyn_igi_min, in __rtw89_phy_dig()
6650 dig->igi_fa_rssi); in __rtw89_phy_dig()
6654 rtw89_phy_dig_dyn_pd_th(rtwdev, bb, dig->igi_fa_rssi, dig->dyn_pd_th_en); in __rtw89_phy_dig()
6656 if (dig->dyn_pd_th_en && dig->igi_fa_rssi > dig->dyn_pd_th_max) in __rtw89_phy_dig()
6673 struct rtw89_hal *hal = &rtwdev->hal; in __rtw89_phy_tx_path_div_sta_iter()
6677 rssi_a = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_A]); in __rtw89_phy_tx_path_div_sta_iter()
6678 rssi_b = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_B]); in __rtw89_phy_tx_path_div_sta_iter()
6687 if (hal->antenna_tx == candidate) in __rtw89_phy_tx_path_div_sta_iter()
6690 hal->antenna_tx = candidate; in __rtw89_phy_tx_path_div_sta_iter()
6693 if (hal->antenna_tx == RF_A) { in __rtw89_phy_tx_path_div_sta_iter()
6696 } else if (hal->antenna_tx == RF_B) { in __rtw89_phy_tx_path_div_sta_iter()
6705 struct rtw89_dev *rtwdev = rtwsta->rtwdev; in rtw89_phy_tx_path_div_sta_iter()
6706 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_tx_path_div_sta_iter()
6716 if (sta->tdls) in rtw89_phy_tx_path_div_sta_iter()
6723 rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_tx_path_div_sta_iter()
6724 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_tx_path_div_sta_iter()
6735 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_track()
6738 if (!hal->tx_path_diversity) in rtw89_phy_tx_path_div_track()
6741 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_tx_path_div_track()
6751 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_set_ant()
6754 if (!hal->ant_diversity || hal->antenna_tx == 0) in rtw89_phy_antdiv_set_ant()
6757 if (hal->antenna_tx == RF_B) { in rtw89_phy_antdiv_set_ant()
6777 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_swap_hal_antenna()
6779 hal->antenna_rx = hal->antenna_rx == RF_A ? RF_B : RF_A; in rtw89_phy_swap_hal_antenna()
6780 hal->antenna_tx = hal->antenna_rx; in rtw89_phy_swap_hal_antenna()
6785 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_decision_state()
6786 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_decision_state()
6792 antdiv->get_stats = false; in rtw89_phy_antdiv_decision_state()
6793 antdiv->training_count = 0; in rtw89_phy_antdiv_decision_state()
6795 main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6796 main_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6797 aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6798 aux_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6817 hal->antenna_tx = candidate; in rtw89_phy_antdiv_decision_state()
6818 hal->antenna_rx = candidate; in rtw89_phy_antdiv_decision_state()
6823 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_training_state()
6826 if (antdiv->training_count % 2 == 0) { in rtw89_phy_antdiv_training_state()
6827 if (antdiv->training_count == 0) in rtw89_phy_antdiv_training_state()
6830 antdiv->get_stats = true; in rtw89_phy_antdiv_training_state()
6833 antdiv->get_stats = false; in rtw89_phy_antdiv_training_state()
6840 antdiv->training_count++; in rtw89_phy_antdiv_training_state()
6841 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->antdiv_work, in rtw89_phy_antdiv_training_state()
6849 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_work()
6853 if (antdiv->training_count <= ANTDIV_TRAINNING_CNT) { in rtw89_phy_antdiv_work()
6863 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_track()
6864 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_track()
6867 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_track()
6870 rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6871 rssi_pre = antdiv->rssi_pre; in rtw89_phy_antdiv_track()
6872 antdiv->rssi_pre = rssi; in rtw89_phy_antdiv_track()
6873 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6875 if (abs((int)rssi - (int)rssi_pre) < ANTDIV_RSSI_DIFF_TH) in rtw89_phy_antdiv_track()
6878 antdiv->training_count = 0; in rtw89_phy_antdiv_track()
6879 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->antdiv_work, 0); in rtw89_phy_antdiv_track()
6886 "BB-%d env_monitor init\n", bb->phy_idx); in __rtw89_phy_env_monitor_init()
6903 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in __rtw89_phy_edcca_init()
6904 struct rtw89_edcca_bak *edcca_bak = &bb->edcca_bak; in __rtw89_phy_edcca_init()
6906 rtw89_debug(rtwdev, RTW89_DBG_EDCCA, "BB-%d edcca init\n", bb->phy_idx); in __rtw89_phy_edcca_init()
6910 if (rtwdev->chip->chip_id == RTL8922A && rtwdev->hal.cv == CHIP_CAV) { in __rtw89_phy_edcca_init()
6922 rtw89_phy_write32_idx(rtwdev, edcca_regs->tx_collision_t2r_st, in __rtw89_phy_edcca_init()
6923 edcca_regs->tx_collision_t2r_st_mask, 0x29, bb->phy_idx); in __rtw89_phy_edcca_init()
6970 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_set_bss_color()
6971 const struct rtw89_reg_def *bss_clr_vld = &chip->bss_clr_vld; in rtw89_phy_set_bss_color()
6972 enum rtw89_phy_idx phy_idx = rtwvif_link->phy_idx; in rtw89_phy_set_bss_color()
6979 if (!bss_conf->he_support || !vif->cfg.assoc) { in rtw89_phy_set_bss_color()
6984 bss_color = bss_conf->he_bss_color.color; in rtw89_phy_set_bss_color()
6988 rtw89_phy_write32_idx(rtwdev, bss_clr_vld->addr, bss_clr_vld->mask, 0x1, in rtw89_phy_set_bss_color()
6990 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_TGT, in rtw89_phy_set_bss_color()
6992 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_STAID, in rtw89_phy_set_bss_color()
6993 vif->cfg.aid, phy_idx); in rtw89_phy_set_bss_color()
6998 return desc->ch != 0; in rfk_chan_validate_desc()
7007 if (desc->ch != chan->channel) in rfk_chan_is_equivalent()
7010 if (desc->has_band && desc->band != chan->band_type) in rfk_chan_is_equivalent()
7013 if (desc->has_bw && desc->bw != chan->band_width) in rfk_chan_is_equivalent()
7028 if (rfk_chan_is_equivalent(&iter_data->desc, chan)) in rfk_chan_iter_search()
7029 iter_data->found++; in rfk_chan_iter_search()
7038 int sel = -1; in rtw89_rfk_chan_lookup()
7050 if (!iter_data.found && sel == -1) in rtw89_rfk_chan_lookup()
7054 if (sel == -1) { in rtw89_rfk_chan_lookup()
7056 "no idle rfk entry; force replace the first\n"); in rtw89_rfk_chan_lookup()
7067 rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); in _rfk_write_rf()
7073 rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); in _rfk_write32_mask()
7079 rtw89_phy_write32_set(rtwdev, def->addr, def->mask); in _rfk_write32_set()
7085 rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); in _rfk_write32_clr()
7091 udelay(def->data); in _rfk_delay()
7112 const struct rtw89_reg5_def *p = tbl->defs; in rtw89_rfk_parser()
7113 const struct rtw89_reg5_def *end = tbl->defs + tbl->size; in rtw89_rfk_parser()
7116 _rfk_handler[p->flag](rtwdev, p); in rtw89_rfk_parser()
7197 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
7211 data = chip->tssi_dbw_table->data[bandedge_cfg]; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
7263 for (idx = last; idx >= first; idx--) in rtw89_encode_chan_idx()
7274 (central_ch - rtw89_ch_base_table[idx]) >> 1); in rtw89_encode_chan_idx()
7301 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_config_edcca()
7302 struct rtw89_edcca_bak *edcca_bak = &bb->edcca_bak; in rtw89_phy_config_edcca()
7305 edcca_bak->a = in rtw89_phy_config_edcca()
7306 rtw89_phy_read32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7307 edcca_regs->edcca_mask, bb->phy_idx); in rtw89_phy_config_edcca()
7308 edcca_bak->p = in rtw89_phy_config_edcca()
7309 rtw89_phy_read32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7310 edcca_regs->edcca_p_mask, bb->phy_idx); in rtw89_phy_config_edcca()
7311 edcca_bak->ppdu = in rtw89_phy_config_edcca()
7312 rtw89_phy_read32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
7313 edcca_regs->ppdu_mask, bb->phy_idx); in rtw89_phy_config_edcca()
7315 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7316 edcca_regs->edcca_mask, EDCCA_MAX, bb->phy_idx); in rtw89_phy_config_edcca()
7317 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7318 edcca_regs->edcca_p_mask, EDCCA_MAX, bb->phy_idx); in rtw89_phy_config_edcca()
7319 rtw89_phy_write32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
7320 edcca_regs->ppdu_mask, EDCCA_MAX, bb->phy_idx); in rtw89_phy_config_edcca()
7322 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7323 edcca_regs->edcca_mask, in rtw89_phy_config_edcca()
7324 edcca_bak->a, bb->phy_idx); in rtw89_phy_config_edcca()
7325 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7326 edcca_regs->edcca_p_mask, in rtw89_phy_config_edcca()
7327 edcca_bak->p, bb->phy_idx); in rtw89_phy_config_edcca()
7328 rtw89_phy_write32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
7329 edcca_regs->ppdu_mask, in rtw89_phy_config_edcca()
7330 edcca_bak->ppdu, bb->phy_idx); in rtw89_phy_config_edcca()
7336 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_log()
7347 if (bb->phy_idx == RTW89_PHY_1) in rtw89_phy_edcca_log()
7348 edcca_p_regs = &edcca_regs->p[RTW89_PHY_1]; in rtw89_phy_edcca_log()
7350 edcca_p_regs = &edcca_regs->p[RTW89_PHY_0]; in rtw89_phy_edcca_log()
7352 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_phy_edcca_log()
7353 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
7354 edcca_regs->rpt_sel_be_mask, 0); in rtw89_phy_edcca_log()
7356 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7357 edcca_p_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
7358 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7369 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7370 edcca_p_regs->rpt_sel_mask, 5); in rtw89_phy_edcca_log()
7371 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7375 if (rtwdev->chip->chip_id == RTL8922A) { in rtw89_phy_edcca_log()
7376 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
7377 edcca_regs->rpt_sel_be_mask, 4); in rtw89_phy_edcca_log()
7378 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7383 per20_bitmap = rtw89_phy_read32_mask(rtwdev, edcca_p_regs->rpt_a, in rtw89_phy_edcca_log()
7386 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
7387 edcca_regs->rpt_sel_be_mask, 5); in rtw89_phy_edcca_log()
7388 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7394 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7395 edcca_p_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
7396 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7400 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7401 edcca_p_regs->rpt_sel_mask, 5); in rtw89_phy_edcca_log()
7402 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7406 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7407 edcca_p_regs->rpt_sel_mask, 2); in rtw89_phy_edcca_log()
7408 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7412 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7413 edcca_p_regs->rpt_sel_mask, 3); in rtw89_phy_edcca_log()
7414 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7439 struct rtw89_phy_ch_info *ch_info = &bb->ch_info; in rtw89_phy_edcca_get_thre_by_rssi()
7440 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_edcca_get_thre_by_rssi()
7441 u8 rssi_min = ch_info->rssi_min >> 1; in rtw89_phy_edcca_get_thre_by_rssi()
7447 edcca_thre = rssi_min - RSSI_UNIT_CONVER + EDCCA_UNIT_CONVER - in rtw89_phy_edcca_get_thre_by_rssi()
7457 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_thre_calc()
7458 struct rtw89_edcca_bak *edcca_bak = &bb->edcca_bak; in rtw89_phy_edcca_thre_calc()
7462 if (th == edcca_bak->th_old) in rtw89_phy_edcca_thre_calc()
7465 edcca_bak->th_old = th; in rtw89_phy_edcca_thre_calc()
7470 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
7471 edcca_regs->edcca_mask, th, bb->phy_idx); in rtw89_phy_edcca_thre_calc()
7472 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
7473 edcca_regs->edcca_p_mask, th, bb->phy_idx); in rtw89_phy_edcca_thre_calc()
7474 rtw89_phy_write32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_edcca_thre_calc()
7475 edcca_regs->ppdu_mask, th, bb->phy_idx); in rtw89_phy_edcca_thre_calc()
7481 rtw89_debug(rtwdev, RTW89_DBG_EDCCA, "BB-%d edcca track\n", bb->phy_idx); in __rtw89_phy_edcca_track()
7489 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_edcca_track()
7492 if (hal->disabled_dm_bitmap & BIT(RTW89_DM_DYNAMIC_EDCCA)) in rtw89_phy_edcca_track()
7504 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_kpath()
7506 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_kpath()
7538 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_syn_sel()
7540 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_syn_sel()