Lines Matching defs:data
673 static void rtw89_phy_ra_update_sta_iter(void *data, struct ieee80211_sta *sta)
675 struct rtw89_dev *rtwdev = (struct rtw89_dev *)data;
995 u32 addr, u32 mask, u32 data)
1010 rtw89_phy_write32_mask(rtwdev, direct_addr, mask, data);
1021 u32 data)
1035 data &= RFREG_MASK;
1043 data = (data << bit_shift) & RFREG_MASK;
1049 FIELD_PREP(B_SWSI_DATA_VAL_V1, data);
1057 u32 addr, u32 mask, u32 data)
1067 return rtw89_phy_write_rf(rtwdev, rf_path, addr, mask, data);
1069 return rtw89_phy_write_rf_a(rtwdev, rf_path, addr, mask, data);
1075 u32 addr, u32 data)
1092 u32_encode_bits(data, B_HWSI_DATA_VAL);
1101 u32 addr, u32 mask, u32 data)
1106 val = data;
1110 val |= (data << __ffs(mask)) & mask;
1117 u32 addr, u32 mask, u32 data)
1127 return rtw89_phy_write_rf(rtwdev, rf_path, addr, mask, data);
1129 return rtw89_phy_write_rf_a_v2(rtwdev, rf_path, addr, mask, data);
1172 } else if (reg->data == BYPASS_CR_DATA) {
1180 rtw89_phy_write32(rtwdev, addr, reg->data);
1202 union rtw89_phy_bb_gain_arg arg, u32 data)
1212 for (i = 0; i < 4; i++, data >>= 8)
1213 gain->lna_gain[gband][path][i] = data & 0xff;
1216 for (i = 4; i < 7; i++, data >>= 8)
1217 gain->lna_gain[gband][path][i] = data & 0xff;
1220 for (i = 0; i < 2; i++, data >>= 8)
1221 gain->tia_gain[gband][path][i] = data & 0xff;
1226 arg.addr, data, type);
1241 union rtw89_phy_bb_gain_arg arg, u32 data)
1254 gain->rpl_ofst_20[gband][path] = (s8)data;
1258 gain->rpl_ofst_40[gband][path][0] = (s8)data;
1260 for (i = 0; i < 2; i++, data >>= 8) {
1262 ofst = (s8)(data & 0xff);
1269 gain->rpl_ofst_80[gband][path][0] = (s8)data;
1271 for (i = 0; i < 4; i++, data >>= 8) {
1273 ofst = (s8)(data & 0xff);
1277 for (i = 0; i < 2; i++, data >>= 8) {
1279 ofst = (s8)(data & 0xff);
1286 gain->rpl_ofst_160[gband][path][0] = (s8)data;
1288 for (i = 0; i < 4; i++, data >>= 8) {
1290 ofst = (s8)(data & 0xff);
1294 for (i = 0; i < 4; i++, data >>= 8) {
1296 ofst = (s8)(data & 0xff);
1300 for (i = 0; i < 4; i++, data >>= 8) {
1302 ofst = (s8)(data & 0xff);
1306 for (i = 0; i < 2; i++, data >>= 8) {
1308 ofst = (s8)(data & 0xff);
1316 arg.addr, data, bw);
1323 union rtw89_phy_bb_gain_arg arg, u32 data)
1333 for (i = 0; i < 4; i++, data >>= 8)
1334 gain->lna_gain_bypass[gband][path][i] = data & 0xff;
1337 for (i = 4; i < 7; i++, data >>= 8)
1338 gain->lna_gain_bypass[gband][path][i] = data & 0xff;
1343 arg.addr, data, type);
1350 union rtw89_phy_bb_gain_arg arg, u32 data)
1360 for (i = 0; i < 4; i++, data >>= 8)
1361 gain->lna_op1db[gband][path][i] = data & 0xff;
1364 for (i = 4; i < 7; i++, data >>= 8)
1365 gain->lna_op1db[gband][path][i] = data & 0xff;
1368 for (i = 0; i < 4; i++, data >>= 8)
1369 gain->tia_lna_op1db[gband][path][i] = data & 0xff;
1372 for (i = 4; i < 8; i++, data >>= 8)
1373 gain->tia_lna_op1db[gband][path][i] = data & 0xff;
1378 arg.addr, data, type);
1405 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data);
1408 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data);
1411 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data);
1414 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data);
1424 arg.addr, reg->data, arg.cfg_type);
1445 cpu_to_le32((reg->addr << 20) | reg->data);
1513 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data);
1524 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data);
1621 void *data),
1656 reg->addr, reg->data);
1719 enum rtw89_rf_path rf_path, void *data);
1822 u32 data, enum rtw89_phy_idx phy_idx)
1826 rtw89_phy_write32_mask(rtwdev, addr, mask, data);
1877 rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data);
2144 const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data;
2149 u32 data;
2156 data = cfg->data;
2158 for (i = 0; i < cfg->len; i++, data >>= 8) {
2161 *byr = data & 0xff;
2874 (const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data;
2980 static void rtw89_phy_c2h_ra_rpt_iter(void *data, struct ieee80211_sta *sta)
2982 struct rtw89_phy_iter_ra_data *ra_data = (struct rtw89_phy_iter_ra_data *)data;
3314 struct rtw89_c2h_hdr *c2h_hdr = (struct rtw89_c2h_hdr *)c2h->data;
3469 (const struct rtw89_c2h_rfk_report *)c2h->data;
5173 static void rtw89_phy_stat_rssi_update_iter(void *data,
5177 (struct rtw89_phy_iter_rssi_data *)data;
6335 static void rtw89_phy_tx_path_div_sta_iter(void *data, struct ieee80211_sta *sta)
6344 bool *done = data;
6636 static int rfk_chan_iter_search(const struct rtw89_chan *chan, void *data)
6638 struct rfk_chan_iter_data *iter_data = data;
6679 rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data);
6685 rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data);
6703 udelay(def->data);
6811 const u32 *data;
6823 data = chip->tssi_dbw_table->data[bandedge_cfg];
6827 rtw89_write32_mask(rtwdev, reg, regs[i].mask, data[i]);
6834 data[RTW89_TSSI_SBW20]);