Lines Matching defs:txch

546 	u8 txch = tx_ring->txch;
555 txch, seq);
580 u8 qsel, tx_status, txch;
585 txch = rtw89_core_get_ch_dma(rtwdev, qsel);
587 if (txch == RTW89_TXCH_CH12) {
592 tx_ring = &rtwpci->tx_rings[txch];
954 #define DEF_TXCHADDRS_TYPE2(gen, ch_idx, txch, v...) \
956 .num = R_##gen##_##txch##_TXBD_NUM ##v, \
957 .idx = R_##gen##_##txch##_TXBD_IDX ##v, \
959 .desa_l = R_##gen##_##txch##_TXBD_DESA_L ##v, \
960 .desa_h = R_##gen##_##txch##_TXBD_DESA_H ##v, \
963 #define DEF_TXCHADDRS_TYPE1(info, txch, v...) \
964 [RTW89_TXCH_##txch] = { \
965 .num = R_AX_##txch##_TXBD_NUM ##v, \
966 .idx = R_AX_##txch##_TXBD_IDX ##v, \
967 .bdram = R_AX_##txch##_BDRAM_CTRL ##v, \
968 .desa_l = R_AX_##txch##_TXBD_DESA_L ##v, \
969 .desa_h = R_AX_##txch##_TXBD_DESA_H ##v, \
972 #define DEF_TXCHADDRS(info, txch, v...) \
973 [RTW89_TXCH_##txch] = { \
974 .num = R_AX_##txch##_TXBD_NUM, \
975 .idx = R_AX_##txch##_TXBD_IDX, \
976 .bdram = R_AX_##txch##_BDRAM_CTRL ##v, \
977 .desa_l = R_AX_##txch##_TXBD_DESA_L ##v, \
978 .desa_h = R_AX_##txch##_TXBD_DESA_H ##v, \
1063 enum rtw89_tx_channel txch,
1068 if (txch >= RTW89_TXCH_NUM)
1071 *addr = &info->dma_addr_set->tx[txch];
1118 u8 txch)
1121 struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch];
1127 if (txch != RTW89_TXCH_CH12)
1135 u8 txch)
1138 struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch];
1189 u8 txch)
1192 return __rtw89_pci_check_and_reclaim_tx_resource_noio(rtwdev, txch);
1194 if (txch == RTW89_TXCH_CH12)
1197 return __rtw89_pci_check_and_reclaim_tx_resource(rtwdev, txch);
1228 static void rtw89_pci_ops_tx_kick_off(struct rtw89_dev *rtwdev, u8 txch)
1231 struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch];
1234 set_bit(txch, rtwpci->kick_map);
1245 int txch;
1247 for (txch = 0; txch < RTW89_TXCH_NUM; txch++) {
1248 if (!test_and_clear_bit(txch, rtwpci->kick_map))
1251 tx_ring = &rtwpci->tx_rings[txch];
1256 static void __pci_flush_txch(struct rtw89_dev *rtwdev, u8 txch, bool drop)
1259 struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch];
1279 rtw89_info(rtwdev, "timed out to flush pci txch: %d\n", txch);
1481 if (tx_ring->txch == RTW89_TXCH_CH12)
1516 u8 txch)
1525 if ((txch == RTW89_TXCH_CH12 ||
1527 (txch != RTW89_TXCH_CH12 ||
1533 tx_ring = &rtwpci->tx_rings[txch];
1697 int txch;
1702 for (txch = 0; txch < RTW89_TXCH_NUM; txch++) {
1703 if (info->tx_dma_ch_mask & BIT(txch))
1705 if (txch == RTW89_TXCH_CH12) {
1710 rtw89_pci_release_tx_ring(rtwdev, &rtwpci->tx_rings[txch]);
3309 enum rtw89_tx_channel txch)
3324 if (txch == RTW89_TXCH_CH12)
3361 enum rtw89_tx_channel txch)
3369 ret = rtw89_pci_alloc_tx_wd_ring(rtwdev, pdev, tx_ring, txch);
3371 rtw89_err(rtwdev, "failed to alloc txwd ring of txch %d\n", txch);
3375 ret = rtw89_pci_get_txch_addrs(rtwdev, txch, &txch_addr);
3377 rtw89_err(rtwdev, "failed to get address of txch %d", txch);
3395 tx_ring->txch = txch;