Lines Matching defs:mac_idx

60 static int rtw89_mac_check_mac_en_ax(struct rtw89_dev *rtwdev, u8 mac_idx,
68 } else if (sel == RTW89_CMAC_SEL && mac_idx == 0) {
71 } else if (sel == RTW89_CMAC_SEL && mac_idx == 1) {
1498 static int cmac_func_en_ax(struct rtw89_dev *rtwdev, u8 mac_idx, bool en)
1520 if (mac_idx == RTW89_MAC_1) {
1527 rtw89_write32_set(rtwdev, addrl_ck_en[mac_idx], ck_en);
1528 rtw89_write32_set(rtwdev, addrl_func_en[mac_idx], func_en);
1530 rtw89_write32_clr(rtwdev, addrl_func_en[mac_idx], func_en);
1531 rtw89_write32_clr(rtwdev, addrl_ck_en[mac_idx], ck_en);
1532 if (mac_idx == RTW89_MAC_1) {
2120 static int preload_init_set(struct rtw89_dev *rtwdev, enum rtw89_mac_idx mac_idx,
2125 max_preld_size = (mac_idx == RTW89_MAC_0 ?
2127 reg = mac_idx == RTW89_MAC_0 ?
2133 reg = mac_idx == RTW89_MAC_0 ?
2146 int rtw89_mac_preload_init(struct rtw89_dev *rtwdev, enum rtw89_mac_idx mac_idx,
2155 return preload_init_set(rtwdev, mac_idx, mode);
2276 static int dmac_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2319 static int addr_cam_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2325 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2329 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_ADDR_CAM_CTRL, mac_idx);
2346 static int scheduler_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2352 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2356 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PREBKF_CFG_1, mac_idx);
2365 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_SCH_EXT_CTRL, mac_idx);
2369 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CCA_CFG_0, mac_idx);
2372 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PREBKF_CFG_0, mac_idx);
2390 u8 mac_idx)
2412 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MGNT_FLTR, mac_idx);
2415 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CTRL_FLTR, mac_idx);
2418 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_DATA_FLTR, mac_idx);
2429 static int rx_fltr_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2434 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2440 mac_idx);
2449 rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, mac_idx),
2451 rtw89_write16(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_PLCP_HDR_FLTR, mac_idx),
2457 static void _patch_dis_resp_chk(struct rtw89_dev *rtwdev, u8 mac_idx)
2471 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RSP_CHK_SIG, mac_idx);
2475 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_0, mac_idx);
2480 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RSP_CHK_SIG, mac_idx);
2484 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_0, mac_idx);
2491 static int cca_ctrl_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2496 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2500 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CCA_CONTROL, mac_idx);
2518 _patch_dis_resp_chk(rtwdev, mac_idx);
2533 static int spatial_reuse_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2538 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2541 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_SR_CTRL, mac_idx);
2544 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BSSID_SRC_CTRL, mac_idx);
2550 static int tmac_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2555 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2559 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MAC_LOOPBACK, mac_idx);
2562 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TCR0, mac_idx);
2565 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXD_FIFO_CTRL, mac_idx);
2572 static int trxptcl_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2579 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2583 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_0, mac_idx);
2605 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RXTRIG_TEST_USER_2, mac_idx);
2608 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->ref_rate.addr, mac_idx);
2610 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->rsc.addr, mac_idx);
2631 static int rmac_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2643 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2647 if (mac_idx == RTW89_MAC_0)
2650 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RESPBA_CAM_CTRL, mac_idx);
2653 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_DLK_PROTECT_CTL, mac_idx);
2663 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RCR, mac_idx);
2666 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, mac_idx);
2667 if (mac_idx == RTW89_MAC_0)
2679 rtw89_mac_reg_by_idx(rtwdev, R_AX_DLK_PROTECT_CTL, mac_idx),
2681 rtw89_write16_set(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_RCR, mac_idx),
2685 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PLCP_HDR_FLTR, mac_idx);
2691 static int cmac_com_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2697 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2701 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
2709 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_RRSR1, mac_idx);
2729 static int ptcl_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2734 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2739 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_SIFS_SETTING, mac_idx);
2748 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_FSM_MON, mac_idx);
2755 if (mac_idx == RTW89_MAC_0) {
2764 } else if (mac_idx == RTW89_MAC_1) {
2772 static int cmac_dma_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2780 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2784 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RXDMA_CTRL_0, mac_idx);
2790 static int cmac_init_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
2794 ret = scheduler_init_ax(rtwdev, mac_idx);
2796 rtw89_err(rtwdev, "[ERR]CMAC%d SCH init %d\n", mac_idx, ret);
2800 ret = addr_cam_init_ax(rtwdev, mac_idx);
2802 rtw89_err(rtwdev, "[ERR]CMAC%d ADDR_CAM reset %d\n", mac_idx,
2807 ret = rx_fltr_init_ax(rtwdev, mac_idx);
2809 rtw89_err(rtwdev, "[ERR]CMAC%d RX filter init %d\n", mac_idx,
2814 ret = cca_ctrl_init_ax(rtwdev, mac_idx);
2816 rtw89_err(rtwdev, "[ERR]CMAC%d CCA CTRL init %d\n", mac_idx,
2823 rtw89_err(rtwdev, "[ERR]CMAC%d NAV CTRL init %d\n", mac_idx,
2828 ret = spatial_reuse_init_ax(rtwdev, mac_idx);
2831 mac_idx, ret);
2835 ret = tmac_init_ax(rtwdev, mac_idx);
2837 rtw89_err(rtwdev, "[ERR]CMAC%d TMAC init %d\n", mac_idx, ret);
2841 ret = trxptcl_init_ax(rtwdev, mac_idx);
2843 rtw89_err(rtwdev, "[ERR]CMAC%d TRXPTCL init %d\n", mac_idx, ret);
2847 ret = rmac_init_ax(rtwdev, mac_idx);
2849 rtw89_err(rtwdev, "[ERR]CMAC%d RMAC init %d\n", mac_idx, ret);
2853 ret = cmac_com_init_ax(rtwdev, mac_idx);
2855 rtw89_err(rtwdev, "[ERR]CMAC%d Com init %d\n", mac_idx, ret);
2859 ret = ptcl_init_ax(rtwdev, mac_idx);
2861 rtw89_err(rtwdev, "[ERR]CMAC%d PTCL init %d\n", mac_idx, ret);
2865 ret = cmac_dma_init_ax(rtwdev, mac_idx);
2867 rtw89_err(rtwdev, "[ERR]CMAC%d DMA init %d\n", mac_idx, ret);
2981 static int rtw89_set_hw_sch_tx_en(struct rtw89_dev *rtwdev, u8 mac_idx,
2984 u32 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_TXEN, mac_idx);
2988 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
2993 return rtw89_hw_sch_tx_en_h2c(rtwdev, mac_idx,
3003 static int rtw89_set_hw_sch_tx_en_v1(struct rtw89_dev *rtwdev, u8 mac_idx,
3006 u32 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_DRV_TXEN, mac_idx);
3010 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
3021 int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx,
3027 rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_TXEN, mac_idx));
3031 ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0,
3037 ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx,
3043 ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx,
3049 ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0,
3062 int rtw89_mac_stop_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx,
3068 rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_DRV_TXEN, mac_idx));
3072 ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, 0,
3078 ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx,
3084 ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx,
3090 ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, 0,
3103 int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en)
3107 ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, tx_en, B_AX_CTN_TXEN_ALL_MASK);
3115 int rtw89_mac_resume_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en)
3119 ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, tx_en,
3273 static int band_idle_ck_b(struct rtw89_dev *rtwdev, u8 mac_idx)
3279 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
3283 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_TX_CTN_SEL, mac_idx);
3487 static void rtw89_scheduler_imr_enable(struct rtw89_dev *rtwdev, u8 mac_idx)
3491 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_SCHEDULE_ERR_IMR, mac_idx);
3497 static void rtw89_ptcl_imr_enable(struct rtw89_dev *rtwdev, u8 mac_idx)
3502 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_IMR0, mac_idx);
3507 static void rtw89_cdma_imr_enable(struct rtw89_dev *rtwdev, u8 mac_idx)
3513 reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_0_reg, mac_idx);
3518 reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_1_reg, mac_idx);
3524 static void rtw89_phy_intf_imr_enable(struct rtw89_dev *rtwdev, u8 mac_idx)
3529 reg = rtw89_mac_reg_by_idx(rtwdev, imr->phy_intf_imr_reg, mac_idx);
3534 static void rtw89_rmac_imr_enable(struct rtw89_dev *rtwdev, u8 mac_idx)
3539 reg = rtw89_mac_reg_by_idx(rtwdev, imr->rmac_imr_reg, mac_idx);
3544 static void rtw89_tmac_imr_enable(struct rtw89_dev *rtwdev, u8 mac_idx)
3549 reg = rtw89_mac_reg_by_idx(rtwdev, imr->tmac_imr_reg, mac_idx);
3554 static int enable_imr_ax(struct rtw89_dev *rtwdev, u8 mac_idx,
3559 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, sel);
3561 rtw89_err(rtwdev, "MAC%d mac_idx%d is not ready\n",
3562 sel, mac_idx);
3579 rtw89_scheduler_imr_enable(rtwdev, mac_idx);
3580 rtw89_ptcl_imr_enable(rtwdev, mac_idx);
3581 rtw89_cdma_imr_enable(rtwdev, mac_idx);
3582 rtw89_phy_intf_imr_enable(rtwdev, mac_idx);
3583 rtw89_rmac_imr_enable(rtwdev, mac_idx);
3584 rtw89_tmac_imr_enable(rtwdev, mac_idx);
4067 reg_info = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg_info, rtwvif->mac_idx);
4068 reg_ctrl = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg, rtwvif->mac_idx);
4285 reg = rtw89_mac_reg_by_idx(rtwdev, p->hiq_win[port], rtwvif->mac_idx);
4297 addr = rtw89_mac_reg_by_idx(rtwdev, p->md_tsft, rtwvif->mac_idx);
4362 reg = rtw89_mac_reg_by_idx(rtwdev, reg_base, rtwvif->mac_idx);
4378 reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid, rtwvif->mac_idx);
4392 reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid_drop, rtwvif->mac_idx);
4456 rtwvif->mac_idx);
4602 ret = rtw89_mac_check_mac_en(rtwdev, rtwvif->mac_idx, RTW89_CMAC_SEL);
4652 rtwvif->mac_idx);
4717 u8 mac_idx, sw_def, fw_def;
4730 mac_idx = le32_get_bits(c2h->w5, RTW89_C2H_SCANOFLD_W5_MAC_IDX);
4737 "mac_idx[%d] band: %d, chan: %d, reason: %d, status: %d, tx_fail: %d, actual: %d\n",
4738 mac_idx, band, chan, reason, status, tx_fail, actual_period);
5458 int rtw89_mac_cfg_ppdu_status_ax(struct rtw89_dev *rtwdev, u8 mac_idx, bool enable)
5460 u32 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PPDU_STAT, mac_idx);
5463 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
5482 void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx)
5507 reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_len_ht, mac_idx);
5842 static void rtw89_mac_bfee_standby_timer(struct rtw89_dev *rtwdev, u8 mac_idx,
5851 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMEE_RESP_OPTION, mac_idx);
5863 void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en)
5870 reg = rtw89_mac_reg_by_idx(rtwdev, mac->bfee_ctrl.addr, mac_idx);
5880 static int rtw89_mac_init_bfee_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
5886 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
5892 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMER_CTRL_0, mac_idx);
5895 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx);
5898 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMEE_RESP_OPTION, mac_idx);
5901 rtw89_mac_bfee_standby_timer(rtwdev, mac_idx, true);
5902 rtw89_mac_bfee_ctrl(rtwdev, mac_idx, true);
5904 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
5909 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_RATE, mac_idx);
5915 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CSIRPT_OPTION, mac_idx);
5927 u8 mac_idx = rtwvif->mac_idx;
5936 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
5959 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
5971 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
5973 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_1, mac_idx);
5987 u8 mac_idx = rtwvif->mac_idx;
5990 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
6009 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
6013 rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx),
6028 rtw89_mac_init_bfee_ax(rtwdev, rtwvif->mac_idx);
6039 rtw89_mac_bfee_ctrl(rtwdev, rtwvif->mac_idx, false);
6046 u8 mac_idx = rtwvif->mac_idx;
6053 rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION_EN0, mac_idx),
6056 rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION_EN1, mac_idx),
6060 rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION0, mac_idx),
6062 rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION1, mac_idx),
6064 rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION2, mac_idx),
6066 rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION3, mac_idx),
6126 rtw89_mac_bfee_standby_timer(rtwdev, rtwvif->mac_idx,
6134 rtw89_mac_bfee_ctrl(rtwdev, rtwvif->mac_idx, en);
6142 u8 mac_idx = rtwsta->rtwvif->mac_idx;
6151 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
6157 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_AMPDU_AGG_LIMIT, mac_idx);
6184 u8 mac_idx = rtwsta->rtwvif->mac_idx;
6191 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
6197 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_AMPDU_AGG_LIMIT, mac_idx);
6226 u8 mac_idx = rtwsta->rtwvif->mac_idx;
6233 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
6239 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXCNT, mac_idx);
6250 u8 mac_idx = rtwvif->mac_idx;
6255 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
6259 reg = rtw89_mac_reg_by_idx(rtwdev, mac->muedca_ctrl.addr, mac_idx);