Lines Matching +full:0 +full:x40e
34 #define MASKBYTE0 0xff
35 #define MASKBYTE1 0xff00
36 #define MASKBYTE2 0xff0000
37 #define MASKBYTE3 0xff000000
38 #define MASKBYTE4 0xff00000000ULL
39 #define MASKHWORD 0xffff0000
40 #define MASKLWORD 0x0000ffff
41 #define MASKDWORD 0xffffffff
42 #define RFREG_MASK 0xfffff
43 #define INV_RF_DATA 0xffffffff
44 #define BYPASS_CR_DATA 0xbabecafe
58 ALIGN(struct_size((struct ieee80211_radiotap_eht *)0, user_info, 1), 4) + \
64 #define RTW89_HTC_MASK_VARIANT GENMASK(1, 0)
73 HTC_OM_CHANNEL_WIDTH_20 = 0,
85 #define RTW89_TF_PAD GENMASK(11, 0)
89 le32_get_bits(*((const __le32 *)(data)), GENMASK(11, 0))
96 RTW89_CH_2G = 0,
180 RTW89_CORE_RX_TYPE_WIFI = 0,
198 RTW89_TXQ_F_AMPDU = 0,
204 RTW89_NET_TYPE_NO_LINK = 0,
257 * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 - 6 unicast
258 * RTW89_ADDR_CAM_SEC_NORMAL : 0 - 1 unicast, 2 - 4 group, 5 - 6 BIP
259 * RTW89_ADDR_CAM_SEC_4GROUP : 0 - 1 unicast, 2 - 5 group, 6 BIP
262 RTW89_ADDR_CAM_SEC_NONE = 0,
269 RTW89_SEC_KEY_TYPE_NONE = 0,
283 RTW89_PORT_0 = 0,
292 RTW89_BAND_2G = 0,
299 RTW89_HW_RATE_CCK1 = 0x0,
300 RTW89_HW_RATE_CCK2 = 0x1,
301 RTW89_HW_RATE_CCK5_5 = 0x2,
302 RTW89_HW_RATE_CCK11 = 0x3,
303 RTW89_HW_RATE_OFDM6 = 0x4,
304 RTW89_HW_RATE_OFDM9 = 0x5,
305 RTW89_HW_RATE_OFDM12 = 0x6,
306 RTW89_HW_RATE_OFDM18 = 0x7,
307 RTW89_HW_RATE_OFDM24 = 0x8,
308 RTW89_HW_RATE_OFDM36 = 0x9,
309 RTW89_HW_RATE_OFDM48 = 0xA,
310 RTW89_HW_RATE_OFDM54 = 0xB,
311 RTW89_HW_RATE_MCS0 = 0x80,
312 RTW89_HW_RATE_MCS1 = 0x81,
313 RTW89_HW_RATE_MCS2 = 0x82,
314 RTW89_HW_RATE_MCS3 = 0x83,
315 RTW89_HW_RATE_MCS4 = 0x84,
316 RTW89_HW_RATE_MCS5 = 0x85,
317 RTW89_HW_RATE_MCS6 = 0x86,
318 RTW89_HW_RATE_MCS7 = 0x87,
319 RTW89_HW_RATE_MCS8 = 0x88,
320 RTW89_HW_RATE_MCS9 = 0x89,
321 RTW89_HW_RATE_MCS10 = 0x8A,
322 RTW89_HW_RATE_MCS11 = 0x8B,
323 RTW89_HW_RATE_MCS12 = 0x8C,
324 RTW89_HW_RATE_MCS13 = 0x8D,
325 RTW89_HW_RATE_MCS14 = 0x8E,
326 RTW89_HW_RATE_MCS15 = 0x8F,
327 RTW89_HW_RATE_MCS16 = 0x90,
328 RTW89_HW_RATE_MCS17 = 0x91,
329 RTW89_HW_RATE_MCS18 = 0x92,
330 RTW89_HW_RATE_MCS19 = 0x93,
331 RTW89_HW_RATE_MCS20 = 0x94,
332 RTW89_HW_RATE_MCS21 = 0x95,
333 RTW89_HW_RATE_MCS22 = 0x96,
334 RTW89_HW_RATE_MCS23 = 0x97,
335 RTW89_HW_RATE_MCS24 = 0x98,
336 RTW89_HW_RATE_MCS25 = 0x99,
337 RTW89_HW_RATE_MCS26 = 0x9A,
338 RTW89_HW_RATE_MCS27 = 0x9B,
339 RTW89_HW_RATE_MCS28 = 0x9C,
340 RTW89_HW_RATE_MCS29 = 0x9D,
341 RTW89_HW_RATE_MCS30 = 0x9E,
342 RTW89_HW_RATE_MCS31 = 0x9F,
343 RTW89_HW_RATE_VHT_NSS1_MCS0 = 0x100,
344 RTW89_HW_RATE_VHT_NSS1_MCS1 = 0x101,
345 RTW89_HW_RATE_VHT_NSS1_MCS2 = 0x102,
346 RTW89_HW_RATE_VHT_NSS1_MCS3 = 0x103,
347 RTW89_HW_RATE_VHT_NSS1_MCS4 = 0x104,
348 RTW89_HW_RATE_VHT_NSS1_MCS5 = 0x105,
349 RTW89_HW_RATE_VHT_NSS1_MCS6 = 0x106,
350 RTW89_HW_RATE_VHT_NSS1_MCS7 = 0x107,
351 RTW89_HW_RATE_VHT_NSS1_MCS8 = 0x108,
352 RTW89_HW_RATE_VHT_NSS1_MCS9 = 0x109,
353 RTW89_HW_RATE_VHT_NSS2_MCS0 = 0x110,
354 RTW89_HW_RATE_VHT_NSS2_MCS1 = 0x111,
355 RTW89_HW_RATE_VHT_NSS2_MCS2 = 0x112,
356 RTW89_HW_RATE_VHT_NSS2_MCS3 = 0x113,
357 RTW89_HW_RATE_VHT_NSS2_MCS4 = 0x114,
358 RTW89_HW_RATE_VHT_NSS2_MCS5 = 0x115,
359 RTW89_HW_RATE_VHT_NSS2_MCS6 = 0x116,
360 RTW89_HW_RATE_VHT_NSS2_MCS7 = 0x117,
361 RTW89_HW_RATE_VHT_NSS2_MCS8 = 0x118,
362 RTW89_HW_RATE_VHT_NSS2_MCS9 = 0x119,
363 RTW89_HW_RATE_VHT_NSS3_MCS0 = 0x120,
364 RTW89_HW_RATE_VHT_NSS3_MCS1 = 0x121,
365 RTW89_HW_RATE_VHT_NSS3_MCS2 = 0x122,
366 RTW89_HW_RATE_VHT_NSS3_MCS3 = 0x123,
367 RTW89_HW_RATE_VHT_NSS3_MCS4 = 0x124,
368 RTW89_HW_RATE_VHT_NSS3_MCS5 = 0x125,
369 RTW89_HW_RATE_VHT_NSS3_MCS6 = 0x126,
370 RTW89_HW_RATE_VHT_NSS3_MCS7 = 0x127,
371 RTW89_HW_RATE_VHT_NSS3_MCS8 = 0x128,
372 RTW89_HW_RATE_VHT_NSS3_MCS9 = 0x129,
373 RTW89_HW_RATE_VHT_NSS4_MCS0 = 0x130,
374 RTW89_HW_RATE_VHT_NSS4_MCS1 = 0x131,
375 RTW89_HW_RATE_VHT_NSS4_MCS2 = 0x132,
376 RTW89_HW_RATE_VHT_NSS4_MCS3 = 0x133,
377 RTW89_HW_RATE_VHT_NSS4_MCS4 = 0x134,
378 RTW89_HW_RATE_VHT_NSS4_MCS5 = 0x135,
379 RTW89_HW_RATE_VHT_NSS4_MCS6 = 0x136,
380 RTW89_HW_RATE_VHT_NSS4_MCS7 = 0x137,
381 RTW89_HW_RATE_VHT_NSS4_MCS8 = 0x138,
382 RTW89_HW_RATE_VHT_NSS4_MCS9 = 0x139,
383 RTW89_HW_RATE_HE_NSS1_MCS0 = 0x180,
384 RTW89_HW_RATE_HE_NSS1_MCS1 = 0x181,
385 RTW89_HW_RATE_HE_NSS1_MCS2 = 0x182,
386 RTW89_HW_RATE_HE_NSS1_MCS3 = 0x183,
387 RTW89_HW_RATE_HE_NSS1_MCS4 = 0x184,
388 RTW89_HW_RATE_HE_NSS1_MCS5 = 0x185,
389 RTW89_HW_RATE_HE_NSS1_MCS6 = 0x186,
390 RTW89_HW_RATE_HE_NSS1_MCS7 = 0x187,
391 RTW89_HW_RATE_HE_NSS1_MCS8 = 0x188,
392 RTW89_HW_RATE_HE_NSS1_MCS9 = 0x189,
393 RTW89_HW_RATE_HE_NSS1_MCS10 = 0x18A,
394 RTW89_HW_RATE_HE_NSS1_MCS11 = 0x18B,
395 RTW89_HW_RATE_HE_NSS2_MCS0 = 0x190,
396 RTW89_HW_RATE_HE_NSS2_MCS1 = 0x191,
397 RTW89_HW_RATE_HE_NSS2_MCS2 = 0x192,
398 RTW89_HW_RATE_HE_NSS2_MCS3 = 0x193,
399 RTW89_HW_RATE_HE_NSS2_MCS4 = 0x194,
400 RTW89_HW_RATE_HE_NSS2_MCS5 = 0x195,
401 RTW89_HW_RATE_HE_NSS2_MCS6 = 0x196,
402 RTW89_HW_RATE_HE_NSS2_MCS7 = 0x197,
403 RTW89_HW_RATE_HE_NSS2_MCS8 = 0x198,
404 RTW89_HW_RATE_HE_NSS2_MCS9 = 0x199,
405 RTW89_HW_RATE_HE_NSS2_MCS10 = 0x19A,
406 RTW89_HW_RATE_HE_NSS2_MCS11 = 0x19B,
407 RTW89_HW_RATE_HE_NSS3_MCS0 = 0x1A0,
408 RTW89_HW_RATE_HE_NSS3_MCS1 = 0x1A1,
409 RTW89_HW_RATE_HE_NSS3_MCS2 = 0x1A2,
410 RTW89_HW_RATE_HE_NSS3_MCS3 = 0x1A3,
411 RTW89_HW_RATE_HE_NSS3_MCS4 = 0x1A4,
412 RTW89_HW_RATE_HE_NSS3_MCS5 = 0x1A5,
413 RTW89_HW_RATE_HE_NSS3_MCS6 = 0x1A6,
414 RTW89_HW_RATE_HE_NSS3_MCS7 = 0x1A7,
415 RTW89_HW_RATE_HE_NSS3_MCS8 = 0x1A8,
416 RTW89_HW_RATE_HE_NSS3_MCS9 = 0x1A9,
417 RTW89_HW_RATE_HE_NSS3_MCS10 = 0x1AA,
418 RTW89_HW_RATE_HE_NSS3_MCS11 = 0x1AB,
419 RTW89_HW_RATE_HE_NSS4_MCS0 = 0x1B0,
420 RTW89_HW_RATE_HE_NSS4_MCS1 = 0x1B1,
421 RTW89_HW_RATE_HE_NSS4_MCS2 = 0x1B2,
422 RTW89_HW_RATE_HE_NSS4_MCS3 = 0x1B3,
423 RTW89_HW_RATE_HE_NSS4_MCS4 = 0x1B4,
424 RTW89_HW_RATE_HE_NSS4_MCS5 = 0x1B5,
425 RTW89_HW_RATE_HE_NSS4_MCS6 = 0x1B6,
426 RTW89_HW_RATE_HE_NSS4_MCS7 = 0x1B7,
427 RTW89_HW_RATE_HE_NSS4_MCS8 = 0x1B8,
428 RTW89_HW_RATE_HE_NSS4_MCS9 = 0x1B9,
429 RTW89_HW_RATE_HE_NSS4_MCS10 = 0x1BA,
430 RTW89_HW_RATE_HE_NSS4_MCS11 = 0x1BB,
432 RTW89_HW_RATE_V1_MCS0 = 0x100,
433 RTW89_HW_RATE_V1_MCS1 = 0x101,
434 RTW89_HW_RATE_V1_MCS2 = 0x102,
435 RTW89_HW_RATE_V1_MCS3 = 0x103,
436 RTW89_HW_RATE_V1_MCS4 = 0x104,
437 RTW89_HW_RATE_V1_MCS5 = 0x105,
438 RTW89_HW_RATE_V1_MCS6 = 0x106,
439 RTW89_HW_RATE_V1_MCS7 = 0x107,
440 RTW89_HW_RATE_V1_MCS8 = 0x108,
441 RTW89_HW_RATE_V1_MCS9 = 0x109,
442 RTW89_HW_RATE_V1_MCS10 = 0x10A,
443 RTW89_HW_RATE_V1_MCS11 = 0x10B,
444 RTW89_HW_RATE_V1_MCS12 = 0x10C,
445 RTW89_HW_RATE_V1_MCS13 = 0x10D,
446 RTW89_HW_RATE_V1_MCS14 = 0x10E,
447 RTW89_HW_RATE_V1_MCS15 = 0x10F,
448 RTW89_HW_RATE_V1_MCS16 = 0x110,
449 RTW89_HW_RATE_V1_MCS17 = 0x111,
450 RTW89_HW_RATE_V1_MCS18 = 0x112,
451 RTW89_HW_RATE_V1_MCS19 = 0x113,
452 RTW89_HW_RATE_V1_MCS20 = 0x114,
453 RTW89_HW_RATE_V1_MCS21 = 0x115,
454 RTW89_HW_RATE_V1_MCS22 = 0x116,
455 RTW89_HW_RATE_V1_MCS23 = 0x117,
456 RTW89_HW_RATE_V1_MCS24 = 0x118,
457 RTW89_HW_RATE_V1_MCS25 = 0x119,
458 RTW89_HW_RATE_V1_MCS26 = 0x11A,
459 RTW89_HW_RATE_V1_MCS27 = 0x11B,
460 RTW89_HW_RATE_V1_MCS28 = 0x11C,
461 RTW89_HW_RATE_V1_MCS29 = 0x11D,
462 RTW89_HW_RATE_V1_MCS30 = 0x11E,
463 RTW89_HW_RATE_V1_MCS31 = 0x11F,
464 RTW89_HW_RATE_V1_VHT_NSS1_MCS0 = 0x200,
465 RTW89_HW_RATE_V1_VHT_NSS1_MCS1 = 0x201,
466 RTW89_HW_RATE_V1_VHT_NSS1_MCS2 = 0x202,
467 RTW89_HW_RATE_V1_VHT_NSS1_MCS3 = 0x203,
468 RTW89_HW_RATE_V1_VHT_NSS1_MCS4 = 0x204,
469 RTW89_HW_RATE_V1_VHT_NSS1_MCS5 = 0x205,
470 RTW89_HW_RATE_V1_VHT_NSS1_MCS6 = 0x206,
471 RTW89_HW_RATE_V1_VHT_NSS1_MCS7 = 0x207,
472 RTW89_HW_RATE_V1_VHT_NSS1_MCS8 = 0x208,
473 RTW89_HW_RATE_V1_VHT_NSS1_MCS9 = 0x209,
474 RTW89_HW_RATE_V1_VHT_NSS1_MCS10 = 0x20A,
475 RTW89_HW_RATE_V1_VHT_NSS1_MCS11 = 0x20B,
476 RTW89_HW_RATE_V1_VHT_NSS2_MCS0 = 0x220,
477 RTW89_HW_RATE_V1_VHT_NSS2_MCS1 = 0x221,
478 RTW89_HW_RATE_V1_VHT_NSS2_MCS2 = 0x222,
479 RTW89_HW_RATE_V1_VHT_NSS2_MCS3 = 0x223,
480 RTW89_HW_RATE_V1_VHT_NSS2_MCS4 = 0x224,
481 RTW89_HW_RATE_V1_VHT_NSS2_MCS5 = 0x225,
482 RTW89_HW_RATE_V1_VHT_NSS2_MCS6 = 0x226,
483 RTW89_HW_RATE_V1_VHT_NSS2_MCS7 = 0x227,
484 RTW89_HW_RATE_V1_VHT_NSS2_MCS8 = 0x228,
485 RTW89_HW_RATE_V1_VHT_NSS2_MCS9 = 0x229,
486 RTW89_HW_RATE_V1_VHT_NSS2_MCS10 = 0x22A,
487 RTW89_HW_RATE_V1_VHT_NSS2_MCS11 = 0x22B,
488 RTW89_HW_RATE_V1_VHT_NSS3_MCS0 = 0x240,
489 RTW89_HW_RATE_V1_VHT_NSS3_MCS1 = 0x241,
490 RTW89_HW_RATE_V1_VHT_NSS3_MCS2 = 0x242,
491 RTW89_HW_RATE_V1_VHT_NSS3_MCS3 = 0x243,
492 RTW89_HW_RATE_V1_VHT_NSS3_MCS4 = 0x244,
493 RTW89_HW_RATE_V1_VHT_NSS3_MCS5 = 0x245,
494 RTW89_HW_RATE_V1_VHT_NSS3_MCS6 = 0x246,
495 RTW89_HW_RATE_V1_VHT_NSS3_MCS7 = 0x247,
496 RTW89_HW_RATE_V1_VHT_NSS3_MCS8 = 0x248,
497 RTW89_HW_RATE_V1_VHT_NSS3_MCS9 = 0x249,
498 RTW89_HW_RATE_V1_VHT_NSS3_MCS10 = 0x24A,
499 RTW89_HW_RATE_V1_VHT_NSS3_MCS11 = 0x24B,
500 RTW89_HW_RATE_V1_VHT_NSS4_MCS0 = 0x260,
501 RTW89_HW_RATE_V1_VHT_NSS4_MCS1 = 0x261,
502 RTW89_HW_RATE_V1_VHT_NSS4_MCS2 = 0x262,
503 RTW89_HW_RATE_V1_VHT_NSS4_MCS3 = 0x263,
504 RTW89_HW_RATE_V1_VHT_NSS4_MCS4 = 0x264,
505 RTW89_HW_RATE_V1_VHT_NSS4_MCS5 = 0x265,
506 RTW89_HW_RATE_V1_VHT_NSS4_MCS6 = 0x266,
507 RTW89_HW_RATE_V1_VHT_NSS4_MCS7 = 0x267,
508 RTW89_HW_RATE_V1_VHT_NSS4_MCS8 = 0x268,
509 RTW89_HW_RATE_V1_VHT_NSS4_MCS9 = 0x269,
510 RTW89_HW_RATE_V1_VHT_NSS4_MCS10 = 0x26A,
511 RTW89_HW_RATE_V1_VHT_NSS4_MCS11 = 0x26B,
512 RTW89_HW_RATE_V1_HE_NSS1_MCS0 = 0x300,
513 RTW89_HW_RATE_V1_HE_NSS1_MCS1 = 0x301,
514 RTW89_HW_RATE_V1_HE_NSS1_MCS2 = 0x302,
515 RTW89_HW_RATE_V1_HE_NSS1_MCS3 = 0x303,
516 RTW89_HW_RATE_V1_HE_NSS1_MCS4 = 0x304,
517 RTW89_HW_RATE_V1_HE_NSS1_MCS5 = 0x305,
518 RTW89_HW_RATE_V1_HE_NSS1_MCS6 = 0x306,
519 RTW89_HW_RATE_V1_HE_NSS1_MCS7 = 0x307,
520 RTW89_HW_RATE_V1_HE_NSS1_MCS8 = 0x308,
521 RTW89_HW_RATE_V1_HE_NSS1_MCS9 = 0x309,
522 RTW89_HW_RATE_V1_HE_NSS1_MCS10 = 0x30A,
523 RTW89_HW_RATE_V1_HE_NSS1_MCS11 = 0x30B,
524 RTW89_HW_RATE_V1_HE_NSS2_MCS0 = 0x320,
525 RTW89_HW_RATE_V1_HE_NSS2_MCS1 = 0x321,
526 RTW89_HW_RATE_V1_HE_NSS2_MCS2 = 0x322,
527 RTW89_HW_RATE_V1_HE_NSS2_MCS3 = 0x323,
528 RTW89_HW_RATE_V1_HE_NSS2_MCS4 = 0x324,
529 RTW89_HW_RATE_V1_HE_NSS2_MCS5 = 0x325,
530 RTW89_HW_RATE_V1_HE_NSS2_MCS6 = 0x326,
531 RTW89_HW_RATE_V1_HE_NSS2_MCS7 = 0x327,
532 RTW89_HW_RATE_V1_HE_NSS2_MCS8 = 0x328,
533 RTW89_HW_RATE_V1_HE_NSS2_MCS9 = 0x329,
534 RTW89_HW_RATE_V1_HE_NSS2_MCS10 = 0x32A,
535 RTW89_HW_RATE_V1_HE_NSS2_MCS11 = 0x32B,
536 RTW89_HW_RATE_V1_HE_NSS3_MCS0 = 0x340,
537 RTW89_HW_RATE_V1_HE_NSS3_MCS1 = 0x341,
538 RTW89_HW_RATE_V1_HE_NSS3_MCS2 = 0x342,
539 RTW89_HW_RATE_V1_HE_NSS3_MCS3 = 0x343,
540 RTW89_HW_RATE_V1_HE_NSS3_MCS4 = 0x344,
541 RTW89_HW_RATE_V1_HE_NSS3_MCS5 = 0x345,
542 RTW89_HW_RATE_V1_HE_NSS3_MCS6 = 0x346,
543 RTW89_HW_RATE_V1_HE_NSS3_MCS7 = 0x347,
544 RTW89_HW_RATE_V1_HE_NSS3_MCS8 = 0x348,
545 RTW89_HW_RATE_V1_HE_NSS3_MCS9 = 0x349,
546 RTW89_HW_RATE_V1_HE_NSS3_MCS10 = 0x34A,
547 RTW89_HW_RATE_V1_HE_NSS3_MCS11 = 0x34B,
548 RTW89_HW_RATE_V1_HE_NSS4_MCS0 = 0x360,
549 RTW89_HW_RATE_V1_HE_NSS4_MCS1 = 0x361,
550 RTW89_HW_RATE_V1_HE_NSS4_MCS2 = 0x362,
551 RTW89_HW_RATE_V1_HE_NSS4_MCS3 = 0x363,
552 RTW89_HW_RATE_V1_HE_NSS4_MCS4 = 0x364,
553 RTW89_HW_RATE_V1_HE_NSS4_MCS5 = 0x365,
554 RTW89_HW_RATE_V1_HE_NSS4_MCS6 = 0x366,
555 RTW89_HW_RATE_V1_HE_NSS4_MCS7 = 0x367,
556 RTW89_HW_RATE_V1_HE_NSS4_MCS8 = 0x368,
557 RTW89_HW_RATE_V1_HE_NSS4_MCS9 = 0x369,
558 RTW89_HW_RATE_V1_HE_NSS4_MCS10 = 0x36A,
559 RTW89_HW_RATE_V1_HE_NSS4_MCS11 = 0x36B,
560 RTW89_HW_RATE_V1_EHT_NSS1_MCS0 = 0x400,
561 RTW89_HW_RATE_V1_EHT_NSS1_MCS1 = 0x401,
562 RTW89_HW_RATE_V1_EHT_NSS1_MCS2 = 0x402,
563 RTW89_HW_RATE_V1_EHT_NSS1_MCS3 = 0x403,
564 RTW89_HW_RATE_V1_EHT_NSS1_MCS4 = 0x404,
565 RTW89_HW_RATE_V1_EHT_NSS1_MCS5 = 0x405,
566 RTW89_HW_RATE_V1_EHT_NSS1_MCS6 = 0x406,
567 RTW89_HW_RATE_V1_EHT_NSS1_MCS7 = 0x407,
568 RTW89_HW_RATE_V1_EHT_NSS1_MCS8 = 0x408,
569 RTW89_HW_RATE_V1_EHT_NSS1_MCS9 = 0x409,
570 RTW89_HW_RATE_V1_EHT_NSS1_MCS10 = 0x40A,
571 RTW89_HW_RATE_V1_EHT_NSS1_MCS11 = 0x40B,
572 RTW89_HW_RATE_V1_EHT_NSS1_MCS12 = 0x40C,
573 RTW89_HW_RATE_V1_EHT_NSS1_MCS13 = 0x40D,
574 RTW89_HW_RATE_V1_EHT_NSS1_MCS14 = 0x40E,
575 RTW89_HW_RATE_V1_EHT_NSS1_MCS15 = 0x40F,
576 RTW89_HW_RATE_V1_EHT_NSS2_MCS0 = 0x420,
577 RTW89_HW_RATE_V1_EHT_NSS2_MCS1 = 0x421,
578 RTW89_HW_RATE_V1_EHT_NSS2_MCS2 = 0x422,
579 RTW89_HW_RATE_V1_EHT_NSS2_MCS3 = 0x423,
580 RTW89_HW_RATE_V1_EHT_NSS2_MCS4 = 0x424,
581 RTW89_HW_RATE_V1_EHT_NSS2_MCS5 = 0x425,
582 RTW89_HW_RATE_V1_EHT_NSS2_MCS6 = 0x426,
583 RTW89_HW_RATE_V1_EHT_NSS2_MCS7 = 0x427,
584 RTW89_HW_RATE_V1_EHT_NSS2_MCS8 = 0x428,
585 RTW89_HW_RATE_V1_EHT_NSS2_MCS9 = 0x429,
586 RTW89_HW_RATE_V1_EHT_NSS2_MCS10 = 0x42A,
587 RTW89_HW_RATE_V1_EHT_NSS2_MCS11 = 0x42B,
588 RTW89_HW_RATE_V1_EHT_NSS2_MCS12 = 0x42C,
589 RTW89_HW_RATE_V1_EHT_NSS2_MCS13 = 0x42D,
590 RTW89_HW_RATE_V1_EHT_NSS3_MCS0 = 0x440,
591 RTW89_HW_RATE_V1_EHT_NSS3_MCS1 = 0x441,
592 RTW89_HW_RATE_V1_EHT_NSS3_MCS2 = 0x442,
593 RTW89_HW_RATE_V1_EHT_NSS3_MCS3 = 0x443,
594 RTW89_HW_RATE_V1_EHT_NSS3_MCS4 = 0x444,
595 RTW89_HW_RATE_V1_EHT_NSS3_MCS5 = 0x445,
596 RTW89_HW_RATE_V1_EHT_NSS3_MCS6 = 0x446,
597 RTW89_HW_RATE_V1_EHT_NSS3_MCS7 = 0x447,
598 RTW89_HW_RATE_V1_EHT_NSS3_MCS8 = 0x448,
599 RTW89_HW_RATE_V1_EHT_NSS3_MCS9 = 0x449,
600 RTW89_HW_RATE_V1_EHT_NSS3_MCS10 = 0x44A,
601 RTW89_HW_RATE_V1_EHT_NSS3_MCS11 = 0x44B,
602 RTW89_HW_RATE_V1_EHT_NSS3_MCS12 = 0x44C,
603 RTW89_HW_RATE_V1_EHT_NSS3_MCS13 = 0x44D,
604 RTW89_HW_RATE_V1_EHT_NSS4_MCS0 = 0x460,
605 RTW89_HW_RATE_V1_EHT_NSS4_MCS1 = 0x461,
606 RTW89_HW_RATE_V1_EHT_NSS4_MCS2 = 0x462,
607 RTW89_HW_RATE_V1_EHT_NSS4_MCS3 = 0x463,
608 RTW89_HW_RATE_V1_EHT_NSS4_MCS4 = 0x464,
609 RTW89_HW_RATE_V1_EHT_NSS4_MCS5 = 0x465,
610 RTW89_HW_RATE_V1_EHT_NSS4_MCS6 = 0x466,
611 RTW89_HW_RATE_V1_EHT_NSS4_MCS7 = 0x467,
612 RTW89_HW_RATE_V1_EHT_NSS4_MCS8 = 0x468,
613 RTW89_HW_RATE_V1_EHT_NSS4_MCS9 = 0x469,
614 RTW89_HW_RATE_V1_EHT_NSS4_MCS10 = 0x46A,
615 RTW89_HW_RATE_V1_EHT_NSS4_MCS11 = 0x46B,
616 RTW89_HW_RATE_V1_EHT_NSS4_MCS12 = 0x46C,
617 RTW89_HW_RATE_V1_EHT_NSS4_MCS13 = 0x46D,
623 RTW89_HW_RATE_MASK_VAL = GENMASK(6, 0),
625 RTW89_HW_RATE_V1_MASK_VAL = GENMASK(7, 0),
700 RTW89_NSS_1 = 0,
710 RTW89_1TX = 0,
716 RTW89_NONBF = 0,
722 RTW89_NON_OFDMA = 0,
728 RTW89_WW = 0,
748 RTW89_REG_6GHZ_POWER_VLP = 0,
765 RTW89_PKT_OFLD_TYPE_PROBE_RSP = 0,
827 RTW89_MAC_0 = 0,
833 RTW89_PHY_0 = 0,
842 RTW89_CHANCTX_0 = 0,
850 RF_PATH_A = 0,
868 RF_A = BIT(0),
889 RTW89_CHANNEL_WIDTH_20 = 0,
904 RTW89_PS_MODE_NONE = 0,
917 RTW89_PE_DURATION_0 = 0,
924 RTW89_RU26 = 0,
933 RTW89_SC_DONT_CARE = 0,
1218 BTC_NCNT_POWER_ON = 0x0,
1243 BTC_BTINFO_L0 = 0,
1255 BTC_DCNT_RUN = 0x0,
1283 BTC_WCNT_SCANAP = 0x0,
1304 BTC_BCNT_RETRY = 0x0,
1330 BTC_BT_NOPROFILE = 0,
1331 BTC_BT_HFP = BIT(0),
1353 u8 single_pos;/* wifi 1ss-1ant at 0:S0 or 1:S1 */
1356 u8 btg_pos; /* btg-circuit at 0:S0/1:S1/others:all */
1433 u8 rssi; /* 0%~110% (dBm = rssi -110) */
1704 u8 active; /* 0:rlink is under doze */
1820 u8 type; /* 0: none, 1:zigbee, 2:LTE */
1938 u8 switch_type; /* WL/BT switch type: 0: internal, 1: external */
1939 u8 wa_type; /* WA type: 0:none, 1: 51B 5G_Hi-Ch_Rx */
1999 BTC_SCAN_INQ = 0,
2009 CXSCAN_BG = 0,
2015 #define RTW89_BTC_BTC_SCAN_V1_FLAG_ENABLE BIT(0)
2127 BTC_BCNT_RFK_REQ = 0,
2141 BTC_BCNT_RFK_REQ_V105 = 0,
2302 CXECTL_OFF = 0x0, /* tdma off */
2303 CXECTL_B2 = 0x1, /* allow B2 (beacon-early) */
2304 CXECTL_EXT = 0x2,
2315 CXST_OFF = 0x0,
2316 CXST_B2W = 0x1,
2317 CXST_W1 = 0x2,
2318 CXST_W2 = 0x3,
2319 CXST_W2B = 0x4,
2320 CXST_B1 = 0x5,
2321 CXST_B2 = 0x6,
2322 CXST_B3 = 0x7,
2323 CXST_B4 = 0x8,
2324 CXST_LK = 0x9,
2325 CXST_BLK = 0xa,
2326 CXST_E2G = 0xb,
2327 CXST_E5G = 0xc,
2328 CXST_EBT = 0xd,
2329 CXST_ENULL = 0xe,
2330 CXST_WLK = 0xf,
2331 CXST_W1FDD = 0x10,
2332 CXST_B1FDD = 0x11,
2333 CXST_MAX = 0x12,
2337 CXEVNT_TDMA_ENTRY = 0x0,
2367 CXBCN_ALL = 0x0,
2375 SLOT_MIX = 0x0, /* accept BT Lower-Pri Tx/Rx request 0x778 = 1 */
2376 SLOT_ISO = 0x1, /* no accept BT Lower-Pri Tx/Rx request 0x778 = d*/
2381 CXT_BT = 0x0,
2382 CXT_WL = 0x1,
2387 CXT_FLCTRL_OFF = 0x0,
2388 CXT_FLCTRL_ON = 0x1,
2393 CXSTEP_NONE = 0x0,
2394 CXSTEP_EVNT = 0x1,
2395 CXSTEP_SLOT = 0x2,
2400 RPT_BT_AFH_SEQ_LEGACY = 0x10,
2401 RPT_BT_AFH_SEQ_LE = 0x20
2410 __le32 pre_state; /* the debug signal is 1 or 0 */
2492 __le16 cxtbl_l16; /* coex table [15:0] */
2629 #define RTW89_BTC_FDDT_PHASE_CYCLE GENMASK(9, 0)
2636 s8 tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */
2641 u8 rssi; /* [7:4] -> bt_rssi_level, [3:0]-> wl_rssi_level */
2643 u8 train_status; /* [7:4]-> train-state, [3:0]-> train-phase */
2647 #define RTW89_BTC_FDDT_CELL_TRAIN_STATE GENMASK(3, 0)
2654 s8 tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */
2659 u8 rssi; /* [7:4] -> bt_rssi_level, [3:0]-> wl_rssi_level */
2661 u8 train_status; /* [7:4]-> train-state, [3:0]-> train-phase */
2669 u8 state_phase; /* [0:3] train state, [4:7] train phase */
2777 __le32 max_t[2]; /* max_t for 0:null0/1:null1 */
2778 __le32 avg_t[2]; /* avg_t for 0:null0/1:null1 */
2779 __le32 result[2][4]; /* 0:fail, 1:ok, 2:on_time, 3:retry */
2786 __le32 max_t[2]; /* max_t for 0:null0/1:null1 */
2787 __le32 avg_t[2]; /* avg_t for 0:null0/1:null1 */
2788 __le32 result[2][5]; /* 0:fail, 1:ok, 2:on_time, 3:retry, 4:tx */
2812 __le32 coex_ver; /*bit[15:8]->shared, bit[7:0]->non-shared */
2823 __le32 coex_ver; /*bit[15:8]->shared, bit[7:0]->non-shared */
2874 #define RTW89_BTC_WL_DEF_TX_PWR GENMASK(7, 0)
2876 u32 wl_tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */
2888 s8 tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */
2960 u8 bt_select: 2; /* 0:s0, 1:s1, 2:s0 & s1, refer to enum btc_bt_index */
2991 BTF_EVNT_RPT = 0,
2997 BTF_EVNT_BT_DEV_INFO = 6, /* fwc2hfunc > 0 */
3005 BTC_RPT_TYPE_CTRL = 0x0,
3026 REG_MAC = 0x0,
3027 REG_BB = 0x1,
3028 REG_RF = 0x2,
3029 REG_BT_RF = 0x3,
3030 REG_BT_MODEM = 0x4,
3031 REG_BT_BLUEWIZE = 0x5,
3032 REG_BT_VENDOR = 0x6,
3033 REG_BT_LE = 0x7,
3112 BTFRE_INVALID_INPUT = 0x0, /* invalid input parameters */
3203 RTW89_BTC_HMSG_TMR_EN = 0x0,
3204 RTW89_BTC_HMSG_BT_REG_READBACK = 0x1,
3205 RTW89_BTC_HMSG_SET_BT_REQ_SLOT = 0x2,
3206 RTW89_BTC_HMSG_FW_EV = 0x3,
3207 RTW89_BTC_HMSG_BT_LINK_CHG = 0x4,
3208 RTW89_BTC_HMSG_SET_BT_REQ_STBC = 0x5,
3214 RTW89_RA_MODE_CCK = BIT(0),
3232 RTW89_DIG_NOISY_LEVEL1 = 0,
3239 RTW89_GILTF_LGI_4XHE32 = 0,
3249 RTW89_RX_TYPE_MGNT = 0,
3256 RTW89_EFUSE_BLOCK_SYS = 0,
3449 #define RTW89_ROC_BY_LINK_INDEX 0
3703 RTW89_DMA_ACH0 = 0,
3723 MLO_0_PLUS_2_1RF = MLO_MODE_FOR_BB0_BB1_RF(0, 2, 1),
3724 MLO_0_PLUS_2_2RF = MLO_MODE_FOR_BB0_BB1_RF(0, 2, 2),
3727 MLO_2_PLUS_0_1RF = MLO_MODE_FOR_BB0_BB1_RF(2, 0, 1),
3728 MLO_2_PLUS_0_2RF = MLO_MODE_FOR_BB0_BB1_RF(2, 0, 2),
3730 DBCC_LEGACY = 0xffffffff,
3786 #define grp_0 0
3995 #define RTW89_TXPWR_CONF_DFLT_RFE_TYPE 0x0
4403 RTW89_HCIFC_POH = 0,
4421 RTW89_RPR_MODE_POH = 0,
4558 RTW89_FW_MSS_DEV_TYPE_FWSEC_DEF = 0xF,
4559 RTW89_FW_MSS_DEV_TYPE_FWSEC_INV = 0xFF,
4661 RTW89_ANT_GAIN_ETSI = 0,
4790 u8 thermal_prot_lv; /* 0 ~ RTW89_THERMAL_PROT_LV_MAX */
4883 RTW89_RFK_STATE_START = 0x0,
4884 RTW89_RFK_STATE_OK = 0x1,
4885 RTW89_RFK_STATE_FAIL = 0x2,
4886 RTW89_RFK_STATE_TIMEOUT = 0x3,
4887 RTW89_RFK_STATE_H2C_CMD_ERR = 0x4,
5064 RTW89_PKT_BASED_AVG_MODE = 0,
5070 RTW89_PHY_DCFO_STATE_NORMAL = 0,
5077 RTW89_CFO_UL_OFDMA_ACC_DISABLE = 0,
5114 RTW89_TSSI_NORMAL = 0,
5119 TSSI_ALIMK_2G = 0,
5184 RTW89_IFS_CLM_INIT = 0,
5194 RTW89_RAC_RELEASE = 0,
5217 RTW89_CCX_EDCCA_SEG0_P0 = 0,
5228 RTW89_CCX_EDCCA_BW20_0 = 0,
5300 RTW89_MAC_AX_PS_MODE_ACTIVE = 0,
5307 RTW89_LAST_RPWM_PS = 0x0,
5308 RTW89_LAST_RPWM_ACTIVE = 0x6,
5337 RTW89_BB_GAIN_BAND_2G = 0,
5350 RTW89_BB_GAIN_BAND_2G_BE = 0,
5367 RTW89_BB_BW_20_40 = 0,
5382 RTW89_CMAC_BW_20M = 0,
5392 RTW89_BB_RXSC_NUM_40 = 9, /* SC: 0, 1~8 */
5393 RTW89_BB_RXSC_NUM_80 = 13, /* SC: 0, 1~8, 9~12 */
5394 RTW89_BB_RXSC_NUM_160 = 15, /* SC: 0, 1~8, 9~12, 13~14 */
5437 s8 offset[RF_PATH_MAX][RTW89_GAIN_OFFSET_NR]; /* S(8, 0) */
5440 s8 comp[RF_PATH_MAX][RTW89_SUBBAND_NR]; /* S(8, 0) */
5751 #define RTW89_VIF_IDLE_LINK_ID 0
5786 for (link_id = 0; link_id < IEEE80211_MLD_MAX_NUM_LINKS; link_id++) \
5825 for (link_id = 0; link_id < IEEE80211_MLD_MAX_NUM_LINKS; link_id++) \
5831 return rtwvif->links_inst[0].mac_id;
5837 return rtwvif->links_inst[0].port;
5860 return rtwsta->links_inst[0].mac_id;
6015 int ret = 0;
6030 int ret = 0;
6181 WARN(addr & 0x3, "should be 4-byte aligned, addr = 0x%08x\n", addr);
6194 mask &= 0xffff;
6208 mask &= 0xff;
6461 case 0 ... 36:
6726 return 0x10;
6879 return 0;