Lines Matching +full:blk +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
213 #define RTW89_DEFAULT_BTC_VER_IDX (ARRAY_SIZE(rtw89_btc_ver_defs) - 1)
435 /* TDMA off + pri: WL_Hi-Tx > BT_Hi_Rx, BT_Hi > WL > BT_Lo */
438 /* TDMA off + pri: WL_Hi-Tx > BT, BT_Hi > other-WL > BT_Lo */
441 /* TDMA off + pri: WL_Hi-Tx = BT */
444 /* TDMA off + pri: WL > BT, Block-BT*/
447 /* TDMA off+Bcn-Protect + pri: WL_Hi-Tx > BT_Hi_Rx, BT_Hi > WL > BT_Lo*/
450 /* TDMA off + Ext-Ctrl + pri: default */
453 /* TDMA off + Ext-Ctrl + pri: E2G-slot block all BT */
456 /* TDMA off + Ext-Ctrl + pri: default */
459 /* TDMA off + Ext-Ctrl + pri: E2G-slot block all BT */
462 /* TDMA off + Ext-Ctrl + pri: E2G-slot WL > BT */
465 /* TDMA off + Ext-Ctrl + pri: E2G/EBT-slot WL > BT */
468 /* TDMA off + Ext-Ctrl + pri: default */
471 /* TDMA Fix slot-0: W1:B1 = 30:30 */
474 /* TDMA Fix slot-1: W1:B1 = 50:50 */
477 /* TDMA Fix slot-2: W1:B1 = 20:30 */
480 /* TDMA Fix slot-3: W1:B1 = 40:10 */
483 /* TDMA Fix slot-4: W1:B1 = 70:10 */
486 /* TDMA Fix slot-5: W1:B1 = 20:60 */
489 /* TDMA Fix slot-6: W1:B1 = 30:60 */
492 /* TDMA Fix slot-7: W1:B1 = 20:80 */
495 /* TDMA Fix slot-8: W1:B1 = user-define */
498 /* TDMA Fix slot-9: W1:B1 = 40:10 */
501 /* TDMA Fix slot-10: W1:B1 = 40:10 */
504 /* TDMA Fix slot-11: W1:B1 = 40:10 */
507 /* PS-TDMA Fix slot-0: W1:B1 = 30:30 */
510 /* PS-TDMA Fix slot-1: W1:B1 = 50:50 */
513 /* PS-TDMA Fix slot-2: W1:B1 = 20:30 */
516 /* PS-TDMA Fix slot-3: W1:B1 = 20:60 */
519 /* PS-TDMA Fix slot-4: W1:B1 = 30:70 */
522 /* PS-TDMA Fix slot-5: W1:B1 = 20:80 */
525 /* PS-TDMA Fix slot-6: W1:B1 = user-define */
528 /* TDMA Auto slot-0: W1:B1 = 50:200 */
531 /* TDMA Auto slot-1: W1:B1 = 60:200 */
534 /* TDMA Auto slot-2: W1:B1 = 20:200 */
537 /* TDMA Auto slot-3: W1:B1 = user-define */
540 /* PS-TDMA Auto slot-0: W1:B1 = 50:200 */
543 /* PS-TDMA Auto slot-1: W1:B1 = 60:200 */
546 /* PS-TDMA Auto slot-2: W1:B1 = 20:200 */
549 /* PS-TDMA Auto slot-3: W1:B1 = user-define */
552 /* TDMA Auto slot2-0: W1:B4 = 30:50 */
555 /* TDMA Auto slot2-1: W1:B4 = 30:70 */
558 /* TDMA Auto slot2-2: W1:B4 = 50:50 */
561 /* TDMA Auto slot2-3: W1:B4 = 60:60 */
564 /* TDMA Auto slot2-4: W1:B4 = 20:80 */
567 /* TDMA Auto slot2-5: W1:B4 = user-define */
570 /* PS-TDMA Auto slot2-0: W1:B4 = 30:50 */
573 /* PS-TDMA Auto slot2-1: W1:B4 = 30:70 */
576 /* PS-TDMA Auto slot2-2: W1:B4 = 50:50 */
579 /* PS-TDMA Auto slot2-3: W1:B4 = 60:60 */
582 /* PS-TDMA Auto slot2-4: W1:B4 = 20:80 */
585 /* PS-TDMA Auto slot2-5: W1:B4 = user-define */
752 BTC_ACT_NUM = BTC_ACT_LAST - BTC_ACT_NONE,
770 struct rtw89_btc *btc = &rtwdev->btc;
771 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
772 struct rtw89_btc_cx *cx = &btc->cx;
773 struct rtw89_btc_wl_info *wl = &cx->wl;
774 struct rtw89_btc_dm *dm = &btc->dm;
778 btc->fwinfo.cnt_h2c_fail++;
779 dm->error.map.h2c_buffer_over = true;
780 return -EINVAL;
781 } else if (!wl->status.map.init_ok) {
784 pfwinfo->cnt_h2c_fail++;
785 return -EINVAL;
786 } else if ((wl->status.map.rf_off_pre == BTC_LPS_RF_OFF &&
787 wl->status.map.rf_off == BTC_LPS_RF_OFF) ||
788 (wl->status.map.lps_pre == BTC_LPS_RF_OFF &&
789 wl->status.map.lps == BTC_LPS_RF_OFF)) {
792 pfwinfo->cnt_h2c_fail++;
793 return -EINVAL;
799 pfwinfo->cnt_h2c_fail++;
801 pfwinfo->cnt_h2c++;
808 struct rtw89_btc *btc = &rtwdev->btc;
809 const struct rtw89_btc_ver *ver = btc->ver;
810 struct rtw89_btc_cx *cx = &btc->cx;
811 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
812 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
813 struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info;
826 memset(&btc->ctrl, 0, sizeof(btc->ctrl));
827 btc->manual_ctrl = false;
828 if (ver->fcxctrl != 7)
829 btc->ctrl.ctrl.trace_step = FCXDEF_STEP;
834 memset(&btc->dm, 0, sizeof(btc->dm));
835 memset(bt_linfo->rssi_state, 0, sizeof(bt_linfo->rssi_state));
837 if (btc->ver->fwlrole == 8)
838 wl_linfo = &wl->rlink_info[i][0];
840 wl_linfo = &wl->link_info[i];
841 memset(wl_linfo->rssi_state, 0, sizeof(wl_linfo->rssi_state));
845 btc->dm.tdma_now = t_def[CXTD_OFF];
846 btc->dm.tdma = t_def[CXTD_OFF];
847 if (ver->fcxslots >= 7) {
849 btc->dm.slot.v7[i].dur = s_def[i].dur;
850 btc->dm.slot.v7[i].cxtype = s_def[i].cxtype;
851 btc->dm.slot.v7[i].cxtbl = s_def[i].cxtbl;
853 memcpy(&btc->dm.slot_now.v7, &btc->dm.slot.v7,
854 sizeof(btc->dm.slot_now.v7));
856 memcpy(&btc->dm.slot_now.v1, s_def,
857 sizeof(btc->dm.slot_now.v1));
858 memcpy(&btc->dm.slot.v1, s_def,
859 sizeof(btc->dm.slot.v1));
862 btc->policy_len = 0;
863 btc->bt_req_len = 0;
865 btc->dm.coex_info_map = BTC_COEX_INFO_ALL;
866 btc->dm.wl_tx_limit.tx_time = BTC_MAX_TX_TIME_DEF;
867 btc->dm.wl_tx_limit.tx_retry = BTC_MAX_TX_RETRY_DEF;
868 btc->dm.wl_pre_agc_rb = BTC_PREAGC_NOTFOUND;
869 btc->dm.wl_btg_rx_rb = BTC_BTGCTRL_BB_GNT_NOTFOUND;
873 memset(&btc->mdinfo, 0, sizeof(btc->mdinfo));
878 const struct rtw89_chip_info *chip = rtwdev->chip;
882 if (le16_to_cpu(chip->mon_reg[i].type) == reg_type &&
883 le32_to_cpu(chip->mon_reg[i].offset) == target) {
891 struct rtw89_btc *btc = &rtwdev->btc;
892 const struct rtw89_btc_ver *ver = btc->ver;
893 union rtw89_btc_module_info *md = &btc->mdinfo;
899 if (ver->fcxinit == 7)
900 switch_type = md->md_v7.switch_type;
902 switch_type = md->md.switch_type;
904 if (btc->btg_pos == RF_PATH_A)
921 if (!btc->fwinfo.rpt_fbtc_mregval.cinfo.valid)
924 pmreg = &btc->fwinfo.rpt_fbtc_mregval.finfo;
925 if (ver->fcxmreg == 1) {
926 idx = _search_reg_index(rtwdev, pmreg->v1.reg_num,
931 reg_val = le32_to_cpu(pmreg->v1.mreg_val[idx]);
934 } else if (ver->fcxmreg == 2) {
935 idx = _search_reg_index(rtwdev, pmreg->v2.reg_num,
940 reg_val = le32_to_cpu(pmreg->v2.mreg_val[idx]);
951 if (!btc->fwinfo.rpt_fbtc_mregval.cinfo.valid)
954 pmreg = &btc->fwinfo.rpt_fbtc_mregval.finfo;
955 if (ver->fcxmreg == 1) {
956 idx = _search_reg_index(rtwdev, pmreg->v1.reg_num,
961 reg_val = le32_to_cpu(pmreg->v1.mreg_val[idx]) &
965 } else if (ver->fcxmreg == 2) {
966 idx = _search_reg_index(rtwdev, pmreg->v2.reg_num,
971 reg_val = le32_to_cpu(pmreg->v2.mreg_val[idx]) &
989 struct rtw89_btc *btc = &rtwdev->btc;
990 struct rtw89_btc_cx *cx = &btc->cx;
991 struct rtw89_btc_bt_info *bt = &cx->bt;
992 struct rtw89_btc_wl_info *wl = &cx->wl;
993 struct rtw89_btc_dm *dm = &btc->dm;
1001 if ((wl->ver_info.fw_coex & 0xffff0000) !=
1002 rtwdev->chip->wlcx_desired) {
1003 wl->fw_ver_mismatch = true;
1004 dm->error.map.wl_ver_mismatch = true;
1006 wl->fw_ver_mismatch = false;
1007 dm->error.map.wl_ver_mismatch = false;
1011 if (dm->cnt_dm[BTC_DCNT_RPT] == cnt && btc->fwinfo.rpt_en_map)
1012 dm->cnt_dm[BTC_DCNT_RPT_HANG]++;
1014 dm->cnt_dm[BTC_DCNT_RPT_HANG] = 0;
1016 if (dm->cnt_dm[BTC_DCNT_RPT_HANG] >= BTC_CHK_HANG_MAX)
1017 dm->error.map.wl_fw_hang = true;
1019 dm->error.map.wl_fw_hang = false;
1021 dm->cnt_dm[BTC_DCNT_RPT] = cnt;
1024 if (dm->cnt_dm[BTC_DCNT_CYCLE] == cnt &&
1025 (dm->tdma_now.type != CXTDMA_OFF ||
1026 dm->tdma_now.ext_ctrl == CXECTL_EXT))
1027 dm->cnt_dm[BTC_DCNT_CYCLE_HANG]++;
1029 dm->cnt_dm[BTC_DCNT_CYCLE_HANG] = 0;
1031 if (dm->cnt_dm[BTC_DCNT_CYCLE_HANG] >= BTC_CHK_HANG_MAX)
1032 dm->error.map.cycle_hang = true;
1034 dm->error.map.cycle_hang = false;
1036 dm->cnt_dm[BTC_DCNT_CYCLE] = cnt;
1039 if (dm->cnt_dm[BTC_DCNT_W1] == cnt &&
1040 dm->tdma_now.type != CXTDMA_OFF)
1041 dm->cnt_dm[BTC_DCNT_W1_HANG]++;
1043 dm->cnt_dm[BTC_DCNT_W1_HANG] = 0;
1045 if (dm->cnt_dm[BTC_DCNT_W1_HANG] >= BTC_CHK_HANG_MAX)
1046 dm->error.map.w1_hang = true;
1048 dm->error.map.w1_hang = false;
1050 dm->cnt_dm[BTC_DCNT_W1] = cnt;
1053 if (dm->cnt_dm[BTC_DCNT_B1] == cnt &&
1054 dm->tdma_now.type != CXTDMA_OFF)
1055 dm->cnt_dm[BTC_DCNT_B1_HANG]++;
1057 dm->cnt_dm[BTC_DCNT_B1_HANG] = 0;
1059 if (dm->cnt_dm[BTC_DCNT_B1_HANG] >= BTC_CHK_HANG_MAX)
1060 dm->error.map.b1_hang = true;
1062 dm->error.map.b1_hang = false;
1064 dm->cnt_dm[BTC_DCNT_B1] = cnt;
1067 if (dm->cnt_dm[BTC_DCNT_E2G] == cnt &&
1068 dm->tdma_now.ext_ctrl == CXECTL_EXT)
1069 dm->cnt_dm[BTC_DCNT_E2G_HANG]++;
1071 dm->cnt_dm[BTC_DCNT_E2G_HANG] = 0;
1073 if (dm->cnt_dm[BTC_DCNT_E2G_HANG] >= BTC_CHK_HANG_MAX)
1074 dm->error.map.wl_e2g_hang = true;
1076 dm->error.map.wl_e2g_hang = false;
1078 dm->cnt_dm[BTC_DCNT_E2G] = cnt;
1082 dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC]++;
1084 dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC] = 0;
1086 if (dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC] >= BTC_CHK_HANG_MAX)
1087 dm->error.map.tdma_no_sync = true;
1089 dm->error.map.tdma_no_sync = false;
1093 dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC]++;
1095 dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] = 0;
1097 if (dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] >= BTC_CHK_HANG_MAX)
1098 dm->error.map.slot_no_sync = true;
1100 dm->error.map.slot_no_sync = false;
1103 cnt = cx->cnt_bt[BTC_BCNT_LOPRI_TX];
1105 if (cnt == 0 && bt->link_info.slave_role)
1106 dm->cnt_dm[BTC_DCNT_BTTX_HANG]++;
1108 dm->cnt_dm[BTC_DCNT_BTTX_HANG] = 0;
1110 if (dm->cnt_dm[BTC_DCNT_BTTX_HANG] >= BTC_CHK_HANG_MAX)
1111 dm->error.map.bt_tx_hang = true;
1113 dm->error.map.bt_tx_hang = false;
1116 cnt = cx->cnt_bt[BTC_BCNT_HIPRI_RX] +
1117 cx->cnt_bt[BTC_BCNT_HIPRI_TX] +
1118 cx->cnt_bt[BTC_BCNT_LOPRI_RX] +
1119 cx->cnt_bt[BTC_BCNT_LOPRI_TX];
1122 dm->cnt_dm[BTC_DCNT_BTCNT_HANG]++;
1124 dm->cnt_dm[BTC_DCNT_BTCNT_HANG] = 0;
1126 if ((dm->cnt_dm[BTC_DCNT_BTCNT_HANG] >= BTC_CHK_HANG_MAX &&
1127 bt->enable.now) || (!dm->cnt_dm[BTC_DCNT_BTCNT_HANG] &&
1128 !bt->enable.now))
1133 dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT]++;
1135 dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT] = 0;
1137 if (dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT] >= BTC_CHK_HANG_MAX)
1138 dm->error.map.wl_slot_drift = true;
1140 dm->error.map.wl_slot_drift = false;
1144 dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT]++;
1146 dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT] = 0;
1148 if (dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT] >= BTC_CHK_HANG_MAX)
1149 dm->error.map.bt_slot_drift = true;
1151 dm->error.map.bt_slot_drift = false;
1159 struct rtw89_btc *btc = &rtwdev->btc;
1160 const struct rtw89_btc_ver *ver = btc->ver;
1161 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
1162 struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info;
1163 struct rtw89_btc_bt_a2dp_desc *a2dp = &bt_linfo->a2dp_desc;
1164 union rtw89_btc_fbtc_btver *pver = &btc->fwinfo.rpt_fbtc_btver.finfo;
1181 if (ver->fcxbtver == 7) {
1182 pver->v7 = *(struct rtw89_btc_fbtc_btver_v7 *)pfinfo;
1183 bt->ver_info.fw = le32_to_cpu(pver->v7.fw_ver);
1184 bt->ver_info.fw_coex = le32_get_bits(pver->v7.coex_ver,
1186 bt->feature = le32_to_cpu(pver->v7.feature);
1188 pver->v1 = *(struct rtw89_btc_fbtc_btver_v1 *)pfinfo;
1189 bt->ver_info.fw = le32_to_cpu(pver->v1.fw_ver);
1190 bt->ver_info.fw_coex = le32_get_bits(pver->v1.coex_ver,
1192 bt->feature = le32_to_cpu(pver->v1.feature);
1196 if (ver->fcxbtscan == 1) {
1199 bt->scan_info_v1[i] = pscan_v1->scan[i];
1200 if (bt->scan_info_v1[i].win == 0 &&
1201 bt->scan_info_v1[i].intvl == 0)
1204 } else if (ver->fcxbtscan == 2) {
1207 bt->scan_info_v2[i] = pscan_v2->para[i];
1208 if ((pscan_v2->type & BIT(i)) &&
1209 pscan_v2->para[i].win == 0 &&
1210 pscan_v2->para[i].intvl == 0)
1213 } else if (ver->fcxbtscan == 7) {
1216 bt->scan_info_v2[i] = pscan_v7->para[i];
1217 if ((pscan_v7->type & BIT(i)) &&
1218 pscan_v7->para[i].win == 0 &&
1219 pscan_v7->para[i].intvl == 0)
1224 bt->scan_info_update = 1;
1227 if (ver->fcxbtafh == 2) {
1229 if (pafh_v2->map_type & RPT_BT_AFH_SEQ_LEGACY) {
1230 memcpy(&bt_linfo->afh_map[0], pafh_v2->afh_l, 4);
1231 memcpy(&bt_linfo->afh_map[4], pafh_v2->afh_m, 4);
1232 memcpy(&bt_linfo->afh_map[8], pafh_v2->afh_h, 2);
1234 if (pafh_v2->map_type & RPT_BT_AFH_SEQ_LE) {
1235 memcpy(&bt_linfo->afh_map_le[0], pafh_v2->afh_le_a, 4);
1236 memcpy(&bt_linfo->afh_map_le[4], pafh_v2->afh_le_b, 1);
1238 } else if (ver->fcxbtafh == 7) {
1240 if (pafh_v7->map_type & RPT_BT_AFH_SEQ_LEGACY) {
1241 memcpy(&bt_linfo->afh_map[0], pafh_v7->afh_l, 4);
1242 memcpy(&bt_linfo->afh_map[4], pafh_v7->afh_m, 4);
1243 memcpy(&bt_linfo->afh_map[8], pafh_v7->afh_h, 2);
1245 if (pafh_v7->map_type & RPT_BT_AFH_SEQ_LE) {
1246 memcpy(&bt_linfo->afh_map_le[0], pafh_v7->afh_le_a, 4);
1247 memcpy(&bt_linfo->afh_map_le[4], pafh_v7->afh_le_b, 1);
1249 } else if (ver->fcxbtafh == 1) {
1251 memcpy(&bt_linfo->afh_map[0], pafh_v1->afh_l, 4);
1252 memcpy(&bt_linfo->afh_map[4], pafh_v1->afh_m, 4);
1253 memcpy(&bt_linfo->afh_map[8], pafh_v1->afh_h, 2);
1258 a2dp->device_name = le32_to_cpu(pdev->dev_name);
1259 a2dp->vendor_id = le16_to_cpu(pdev->vendor_id);
1260 a2dp->flush_time = le32_to_cpu(pdev->flush_time);
1269 struct rtw89_btc *btc = &rtwdev->btc;
1270 const struct rtw89_btc_ver *ver = btc->ver;
1272 if (ver->fwevntrptl == 1)
1296 struct rtw89_btc *btc = &rtwdev->btc;
1297 const struct rtw89_btc_ver *ver = btc->ver;
1298 struct rtw89_btc_dm *dm = &btc->dm;
1300 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
1301 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
1317 pfwinfo->err[BTFRE_INVALID_INPUT]++;
1322 rpt_type = btc_prpt->type;
1323 rpt_len = le16_to_cpu(btc_prpt->len);
1324 rpt_content = btc_prpt->content;
1334 pcinfo = &pfwinfo->rpt_ctrl.cinfo;
1335 prpt = &pfwinfo->rpt_ctrl.finfo;
1336 if (ver->fcxbtcrpt == 1) {
1337 pfinfo = &pfwinfo->rpt_ctrl.finfo.v1;
1338 pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v1);
1339 } else if (ver->fcxbtcrpt == 4) {
1340 pfinfo = &pfwinfo->rpt_ctrl.finfo.v4;
1341 pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v4);
1342 } else if (ver->fcxbtcrpt == 5) {
1343 pfinfo = &pfwinfo->rpt_ctrl.finfo.v5;
1344 pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v5);
1345 } else if (ver->fcxbtcrpt == 105) {
1346 pfinfo = &pfwinfo->rpt_ctrl.finfo.v105;
1347 pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v105);
1348 pcinfo->req_fver = 5;
1350 } else if (ver->fcxbtcrpt == 8) {
1351 pfinfo = &pfwinfo->rpt_ctrl.finfo.v8;
1352 pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v8);
1357 pcinfo->req_fver = ver->fcxbtcrpt;
1360 pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo;
1361 if (ver->fcxtdma == 1) {
1362 pfinfo = &pfwinfo->rpt_fbtc_tdma.finfo.v1;
1363 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo.v1);
1364 } else if (ver->fcxtdma == 3 || ver->fcxtdma == 7) {
1365 pfinfo = &pfwinfo->rpt_fbtc_tdma.finfo.v3;
1366 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo.v3);
1370 pcinfo->req_fver = ver->fcxtdma;
1373 pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo;
1374 if (ver->fcxslots == 1) {
1375 pfinfo = &pfwinfo->rpt_fbtc_slots.finfo.v1;
1376 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_slots.finfo.v1);
1377 } else if (ver->fcxslots == 7) {
1378 pfinfo = &pfwinfo->rpt_fbtc_slots.finfo.v7;
1379 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_slots.finfo.v7);
1383 pcinfo->req_fver = ver->fcxslots;
1386 pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo;
1387 pcysta = &pfwinfo->rpt_fbtc_cysta.finfo;
1388 if (ver->fcxcysta == 2) {
1389 pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v2;
1390 pcysta->v2 = pfwinfo->rpt_fbtc_cysta.finfo.v2;
1391 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v2);
1392 } else if (ver->fcxcysta == 3) {
1393 pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v3;
1394 pcysta->v3 = pfwinfo->rpt_fbtc_cysta.finfo.v3;
1395 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v3);
1396 } else if (ver->fcxcysta == 4) {
1397 pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v4;
1398 pcysta->v4 = pfwinfo->rpt_fbtc_cysta.finfo.v4;
1399 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v4);
1400 } else if (ver->fcxcysta == 5) {
1401 pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v5;
1402 pcysta->v5 = pfwinfo->rpt_fbtc_cysta.finfo.v5;
1403 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v5);
1404 } else if (ver->fcxcysta == 7) {
1405 pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v7;
1406 pcysta->v7 = pfwinfo->rpt_fbtc_cysta.finfo.v7;
1407 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v7);
1411 pcinfo->req_fver = ver->fcxcysta;
1414 pcinfo = &pfwinfo->rpt_fbtc_step.cinfo;
1415 if (ver->fcxctrl != 7)
1416 trace_step = btc->ctrl.ctrl.trace_step;
1418 if (ver->fcxstep == 2) {
1419 pfinfo = &pfwinfo->rpt_fbtc_step.finfo.v2;
1420 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.v2.step[0]) *
1423 } else if (ver->fcxstep == 3) {
1424 pfinfo = &pfwinfo->rpt_fbtc_step.finfo.v3;
1425 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.v3.step[0]) *
1431 pcinfo->req_fver = ver->fcxstep;
1434 pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo;
1435 if (ver->fcxnullsta == 1) {
1436 pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo.v1;
1437 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo.v1);
1438 } else if (ver->fcxnullsta == 2) {
1439 pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo.v2;
1440 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo.v2);
1441 } else if (ver->fcxnullsta == 7) {
1442 pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo.v7;
1443 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo.v7);
1447 pcinfo->req_fver = ver->fcxnullsta;
1450 pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
1451 if (ver->fcxmreg == 1) {
1452 pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo.v1;
1453 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo.v1);
1454 } else if (ver->fcxmreg == 2) {
1455 pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo.v2;
1456 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo.v2);
1457 } else if (ver->fcxmreg == 7) {
1458 pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo.v7;
1459 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo.v7);
1463 pcinfo->req_fver = ver->fcxmreg;
1466 pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo;
1467 if (ver->fcxgpiodbg == 7) {
1468 pfinfo = &pfwinfo->rpt_fbtc_gpio_dbg.finfo.v7;
1469 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_gpio_dbg.finfo.v7);
1471 pfinfo = &pfwinfo->rpt_fbtc_gpio_dbg.finfo.v1;
1472 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_gpio_dbg.finfo.v1);
1474 pcinfo->req_fver = ver->fcxgpiodbg;
1477 pcinfo = &pfwinfo->rpt_fbtc_btver.cinfo;
1478 if (ver->fcxbtver == 1) {
1479 pfinfo = &pfwinfo->rpt_fbtc_btver.finfo.v1;
1480 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btver.finfo.v1);
1481 } else if (ver->fcxbtver == 7) {
1482 pfinfo = &pfwinfo->rpt_fbtc_btver.finfo.v7;
1483 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btver.finfo.v7);
1485 pcinfo->req_fver = ver->fcxbtver;
1488 pcinfo = &pfwinfo->rpt_fbtc_btscan.cinfo;
1489 if (ver->fcxbtscan == 1) {
1490 pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo.v1;
1491 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo.v1);
1492 } else if (ver->fcxbtscan == 2) {
1493 pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo.v2;
1494 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo.v2);
1495 } else if (ver->fcxbtscan == 7) {
1496 pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo.v7;
1497 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo.v7);
1501 pcinfo->req_fver = ver->fcxbtscan;
1504 pcinfo = &pfwinfo->rpt_fbtc_btafh.cinfo;
1505 if (ver->fcxbtafh == 1) {
1506 pfinfo = &pfwinfo->rpt_fbtc_btafh.finfo.v1;
1507 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo.v1);
1508 } else if (ver->fcxbtafh == 2) {
1509 pfinfo = &pfwinfo->rpt_fbtc_btafh.finfo.v2;
1510 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo.v2);
1514 pcinfo->req_fver = ver->fcxbtafh;
1517 pcinfo = &pfwinfo->rpt_fbtc_btdev.cinfo;
1518 pfinfo = &pfwinfo->rpt_fbtc_btdev.finfo;
1519 pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btdev.finfo);
1520 pcinfo->req_fver = ver->fcxbtdevinfo;
1523 pfwinfo->err[BTFRE_UNDEF_TYPE]++;
1527 pcinfo->rx_len = rpt_len;
1528 pcinfo->rx_cnt++;
1530 if (rpt_len != pcinfo->req_len) {
1532 pfwinfo->len_mismch |= (0x1 << rpt_type);
1534 pfwinfo->len_mismch |= BIT(31);
1537 __func__, rpt_type, rpt_len, pcinfo->req_len);
1539 pcinfo->valid = 0;
1541 } else if (!pfinfo || !rpt_content || !pcinfo->req_len) {
1542 pfwinfo->err[BTFRE_EXCEPTION]++;
1543 pcinfo->valid = 0;
1547 memcpy(pfinfo, rpt_content, pcinfo->req_len);
1548 pcinfo->valid = 1;
1552 if (ver->fcxbtcrpt == 1) {
1553 prpt->v1 = pfwinfo->rpt_ctrl.finfo.v1;
1554 btc->fwinfo.rpt_en_map = prpt->v1.rpt_enable;
1555 wl->ver_info.fw_coex = prpt->v1.wl_fw_coex_ver;
1556 wl->ver_info.fw = prpt->v1.wl_fw_ver;
1557 dm->wl_fw_cx_offload = !!prpt->v1.wl_fw_cx_offload;
1560 pfwinfo->event[BTF_EVNT_RPT]);
1562 /* To avoid I/O if WL LPS or power-off */
1563 if (wl->status.map.lps != BTC_LPS_RF_OFF &&
1564 !wl->status.map.rf_off) {
1565 rtwdev->chip->ops->btc_update_bt_cnt(rtwdev);
1568 btc->cx.cnt_bt[BTC_BCNT_POLUT] =
1572 } else if (ver->fcxbtcrpt == 4) {
1573 prpt->v4 = pfwinfo->rpt_ctrl.finfo.v4;
1574 btc->fwinfo.rpt_en_map = le32_to_cpu(prpt->v4.rpt_info.en);
1575 wl->ver_info.fw_coex = le32_to_cpu(prpt->v4.wl_fw_info.cx_ver);
1576 wl->ver_info.fw = le32_to_cpu(prpt->v4.wl_fw_info.fw_ver);
1577 dm->wl_fw_cx_offload = !!le32_to_cpu(prpt->v4.wl_fw_info.cx_offload);
1580 memcpy(&dm->gnt.band[i], &prpt->v4.gnt_val[i],
1581 sizeof(dm->gnt.band[i]));
1583 btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] =
1584 le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_HI_TX]);
1585 btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] =
1586 le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_HI_RX]);
1587 btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] =
1588 le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_LO_TX]);
1589 btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] =
1590 le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_LO_RX]);
1591 btc->cx.cnt_bt[BTC_BCNT_POLUT] =
1592 le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_POLLUTED]);
1596 pfwinfo->event[BTF_EVNT_RPT]);
1598 if (le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0)
1599 bt->rfk_info.map.timeout = 1;
1601 bt->rfk_info.map.timeout = 0;
1603 dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
1604 } else if (ver->fcxbtcrpt == 5) {
1605 prpt->v5 = pfwinfo->rpt_ctrl.finfo.v5;
1606 pfwinfo->rpt_en_map = le32_to_cpu(prpt->v5.rpt_info.en);
1607 wl->ver_info.fw_coex = le32_to_cpu(prpt->v5.rpt_info.cx_ver);
1608 wl->ver_info.fw = le32_to_cpu(prpt->v5.rpt_info.fw_ver);
1609 dm->wl_fw_cx_offload = 0;
1612 memcpy(&dm->gnt.band[i], &prpt->v5.gnt_val[i][0],
1613 sizeof(dm->gnt.band[i]));
1615 btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] =
1616 le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_HI_TX]);
1617 btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] =
1618 le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_HI_RX]);
1619 btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] =
1620 le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_LO_TX]);
1621 btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] =
1622 le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_LO_RX]);
1623 btc->cx.cnt_bt[BTC_BCNT_POLUT] =
1624 le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_POLLUTED]);
1628 pfwinfo->event[BTF_EVNT_RPT]);
1630 dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
1631 } else if (ver->fcxbtcrpt == 105) {
1632 prpt->v105 = pfwinfo->rpt_ctrl.finfo.v105;
1633 pfwinfo->rpt_en_map = le32_to_cpu(prpt->v105.rpt_info.en);
1634 wl->ver_info.fw_coex = le32_to_cpu(prpt->v105.rpt_info.cx_ver);
1635 wl->ver_info.fw = le32_to_cpu(prpt->v105.rpt_info.fw_ver);
1636 dm->wl_fw_cx_offload = 0;
1639 memcpy(&dm->gnt.band[i], &prpt->v105.gnt_val[i][0],
1640 sizeof(dm->gnt.band[i]));
1642 btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] =
1643 le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_HI_TX_V105]);
1644 btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] =
1645 le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_HI_RX_V105]);
1646 btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] =
1647 le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_LO_TX_V105]);
1648 btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] =
1649 le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_LO_RX_V105]);
1650 btc->cx.cnt_bt[BTC_BCNT_POLUT] =
1651 le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_POLLUTED_V105]);
1655 pfwinfo->event[BTF_EVNT_RPT]);
1657 dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
1658 } else if (ver->fcxbtcrpt == 8) {
1659 prpt->v8 = pfwinfo->rpt_ctrl.finfo.v8;
1660 pfwinfo->rpt_en_map = le32_to_cpu(prpt->v8.rpt_info.en);
1661 wl->ver_info.fw_coex = le32_to_cpu(prpt->v8.rpt_info.cx_ver);
1662 wl->ver_info.fw = le32_to_cpu(prpt->v8.rpt_info.fw_ver);
1665 memcpy(&dm->gnt.band[i], &prpt->v8.gnt_val[i][0],
1666 sizeof(dm->gnt.band[i]));
1668 btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] =
1669 le16_to_cpu(prpt->v8.bt_cnt[BTC_BCNT_HI_TX_V105]);
1670 btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] =
1671 le16_to_cpu(prpt->v8.bt_cnt[BTC_BCNT_HI_RX_V105]);
1672 btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] =
1673 le16_to_cpu(prpt->v8.bt_cnt[BTC_BCNT_LO_TX_V105]);
1674 btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] =
1675 le16_to_cpu(prpt->v8.bt_cnt[BTC_BCNT_LO_RX_V105]);
1677 val1 = le16_to_cpu(prpt->v8.bt_cnt[BTC_BCNT_POLLUTED_V105]);
1678 if (val1 > btc->cx.cnt_bt[BTC_BCNT_POLUT_NOW])
1679 val1 -= btc->cx.cnt_bt[BTC_BCNT_POLUT_NOW]; /* diff */
1681 btc->cx.cnt_bt[BTC_BCNT_POLUT_DIFF] = val1;
1682 btc->cx.cnt_bt[BTC_BCNT_POLUT_NOW] =
1683 le16_to_cpu(prpt->v8.bt_cnt[BTC_BCNT_POLLUTED_V105]);
1685 val1 = pfwinfo->event[BTF_EVNT_RPT];
1686 if (((prpt->v8.rpt_len_max_h << 8) +
1687 prpt->v8.rpt_len_max_l) != ver->info_buf)
1688 dm->error.map.h2c_c2h_buffer_mismatch = true;
1690 dm->error.map.h2c_c2h_buffer_mismatch = false;
1704 sizeof(dm->tdma_now));
1705 if (ver->fcxtdma == 1)
1707 memcmp(&dm->tdma_now,
1708 &pfwinfo->rpt_fbtc_tdma.finfo.v1,
1709 sizeof(dm->tdma_now)));
1710 else if (ver->fcxtdma == 3 || ver->fcxtdma == 7)
1712 memcmp(&dm->tdma_now,
1713 &pfwinfo->rpt_fbtc_tdma.finfo.v3.tdma,
1714 sizeof(dm->tdma_now)));
1719 if (ver->fcxslots == 7) {
1723 sizeof(dm->slot_now.v7));
1725 memcmp(dm->slot_now.v7,
1726 pfwinfo->rpt_fbtc_slots.finfo.v7.slot,
1727 sizeof(dm->slot_now.v7)));
1728 } else if (ver->fcxslots == 1) {
1732 sizeof(dm->slot_now.v1));
1734 memcmp(dm->slot_now.v1,
1735 pfwinfo->rpt_fbtc_slots.finfo.v1.slot,
1736 sizeof(dm->slot_now.v1)));
1740 if (ver->fcxcysta == 2) {
1741 if (le16_to_cpu(pcysta->v2.cycles) < BTC_CYSTA_CHK_PERIOD)
1743 /* Check Leak-AP */
1744 if (le32_to_cpu(pcysta->v2.slot_cnt[CXST_LK]) != 0 &&
1745 le32_to_cpu(pcysta->v2.leakrx_cnt) != 0 && dm->tdma_now.rxflctrl) {
1746 if (le32_to_cpu(pcysta->v2.slot_cnt[CXST_LK]) <
1747 BTC_LEAK_AP_TH * le32_to_cpu(pcysta->v2.leakrx_cnt))
1748 dm->leak_ap = 1;
1752 if (dm->tdma_now.type == CXTDMA_OFF &&
1753 dm->tdma_now.ext_ctrl == CXECTL_EXT) {
1754 if (ver->fcxslots == 1)
1755 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_E2G].dur);
1756 else if (ver->fcxslots == 7)
1757 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_E2G].dur);
1759 if (ver->fcxslots == 1)
1760 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1761 else if (ver->fcxslots == 7)
1762 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1765 if (le16_to_cpu(pcysta->v2.tavg_cycle[CXT_WL]) > wl_slot_set) {
1766 diff_t = le16_to_cpu(pcysta->v2.tavg_cycle[CXT_WL]) - wl_slot_set;
1772 le32_to_cpu(pcysta->v2.slot_cnt[CXST_W1]));
1774 le32_to_cpu(pcysta->v2.slot_cnt[CXST_B1]));
1776 le16_to_cpu(pcysta->v2.cycles));
1777 } else if (ver->fcxcysta == 3) {
1778 if (le16_to_cpu(pcysta->v3.cycles) < BTC_CYSTA_CHK_PERIOD)
1781 cnt_leak_slot = le32_to_cpu(pcysta->v3.slot_cnt[CXST_LK]);
1782 cnt_rx_imr = le32_to_cpu(pcysta->v3.leak_slot.cnt_rximr);
1784 /* Check Leak-AP */
1786 dm->tdma_now.rxflctrl) {
1788 dm->leak_ap = 1;
1792 if (dm->tdma_now.type == CXTDMA_OFF) {
1793 if (ver->fcxslots == 1)
1794 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1795 else if (ver->fcxslots == 7)
1796 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1797 wl_slot_real = le16_to_cpu(pcysta->v3.cycle_time.tavg[CXT_WL]);
1799 diff_t = wl_slot_real - wl_slot_set;
1805 if (dm->tdma_now.type == CXTDMA_OFF &&
1806 dm->tdma_now.ext_ctrl == CXECTL_EXT &&
1807 btc->bt_req_len != 0) {
1808 bt_slot_real = le16_to_cpu(pcysta->v3.cycle_time.tavg[CXT_BT]);
1809 if (btc->bt_req_len > bt_slot_real) {
1810 diff_t = btc->bt_req_len - bt_slot_real;
1816 le32_to_cpu(pcysta->v3.slot_cnt[CXST_W1]));
1818 le32_to_cpu(pcysta->v3.slot_cnt[CXST_B1]));
1820 le16_to_cpu(pcysta->v3.cycles));
1821 } else if (ver->fcxcysta == 4) {
1822 if (le16_to_cpu(pcysta->v4.cycles) < BTC_CYSTA_CHK_PERIOD)
1825 cnt_leak_slot = le16_to_cpu(pcysta->v4.slot_cnt[CXST_LK]);
1826 cnt_rx_imr = le32_to_cpu(pcysta->v4.leak_slot.cnt_rximr);
1828 /* Check Leak-AP */
1830 dm->tdma_now.rxflctrl) {
1832 dm->leak_ap = 1;
1836 if (dm->tdma_now.type == CXTDMA_OFF) {
1837 if (ver->fcxslots == 1)
1838 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1839 else if (ver->fcxslots == 7)
1840 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1841 wl_slot_real = le16_to_cpu(pcysta->v4.cycle_time.tavg[CXT_WL]);
1843 diff_t = wl_slot_real - wl_slot_set;
1849 if (dm->tdma_now.type == CXTDMA_OFF &&
1850 dm->tdma_now.ext_ctrl == CXECTL_EXT &&
1851 btc->bt_req_len != 0) {
1852 bt_slot_real = le16_to_cpu(pcysta->v4.cycle_time.tavg[CXT_BT]);
1854 if (btc->bt_req_len > bt_slot_real) {
1855 diff_t = btc->bt_req_len - bt_slot_real;
1861 le16_to_cpu(pcysta->v4.slot_cnt[CXST_W1]));
1863 le16_to_cpu(pcysta->v4.slot_cnt[CXST_B1]));
1865 le16_to_cpu(pcysta->v4.cycles));
1866 } else if (ver->fcxcysta == 5) {
1867 if (dm->fddt_train == BTC_FDDT_ENABLE)
1869 cnt_leak_slot = le16_to_cpu(pcysta->v5.slot_cnt[CXST_LK]);
1870 cnt_rx_imr = le32_to_cpu(pcysta->v5.leak_slot.cnt_rximr);
1872 /* Check Leak-AP */
1874 dm->tdma_now.rxflctrl) {
1875 if (le16_to_cpu(pcysta->v5.cycles) >= BTC_CYSTA_CHK_PERIOD &&
1877 dm->leak_ap = 1;
1881 if (dm->tdma_now.type == CXTDMA_OFF) {
1882 if (ver->fcxslots == 1)
1883 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1884 else if (ver->fcxslots == 7)
1885 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1886 wl_slot_real = le16_to_cpu(pcysta->v5.cycle_time.tavg[CXT_WL]);
1889 diff_t = wl_slot_real - wl_slot_set;
1891 diff_t = wl_slot_set - wl_slot_real;
1896 bt_slot_set = btc->bt_req_len;
1897 bt_slot_real = le16_to_cpu(pcysta->v5.cycle_time.tavg[CXT_BT]);
1899 if (dm->tdma_now.type == CXTDMA_OFF &&
1900 dm->tdma_now.ext_ctrl == CXECTL_EXT &&
1903 diff_t = bt_slot_set - bt_slot_real;
1905 diff_t = bt_slot_real - bt_slot_set;
1910 le16_to_cpu(pcysta->v5.slot_cnt[CXST_E2G]));
1912 le16_to_cpu(pcysta->v5.slot_cnt[CXST_W1]));
1914 le16_to_cpu(pcysta->v5.slot_cnt[CXST_B1]));
1916 le16_to_cpu(pcysta->v5.cycles));
1917 } else if (ver->fcxcysta == 7) {
1918 if (dm->fddt_train == BTC_FDDT_ENABLE)
1921 pcysta = &pfwinfo->rpt_fbtc_cysta.finfo;
1923 if (dm->tdma_now.type != CXTDMA_OFF) {
1925 val16 = le16_to_cpu(pcysta->v7.cycle_time.tavg[CXT_WL]);
1928 /* Check Leak-AP */
1929 val1 = le32_to_cpu(pcysta->v7.leak_slot.cnt_rximr) *
1931 val2 = le16_to_cpu(pcysta->v7.slot_cnt[CXST_LK]);
1933 val16 = le16_to_cpu(pcysta->v7.cycles);
1934 if (dm->tdma_now.rxflctrl &&
1936 dm->leak_ap = 1;
1937 } else if (dm->tdma_now.ext_ctrl == CXECTL_EXT) {
1938 val16 = le16_to_cpu(pcysta->v7.cycle_time.tavg[CXT_BT]);
1943 val1 = le16_to_cpu(pcysta->v7.a2dp_ept.cnt_timeout) *
1945 val2 = le16_to_cpu(pcysta->v7.a2dp_ept.cnt);
1947 val16 = le16_to_cpu(pcysta->v7.cycles);
1949 dm->slot_req_more = 1;
1950 else if (bt->link_info.status.map.connect == 0)
1951 dm->slot_req_more = 0;
1955 le16_to_cpu(pcysta->v7.slot_cnt[CXST_E2G]));
1957 le16_to_cpu(pcysta->v7.slot_cnt[CXST_W1]));
1959 le16_to_cpu(pcysta->v7.slot_cnt[CXST_B1]));
1961 /* "BT_SLOT_FLOOD" error-check MUST before "CYCLE_HANG" */
1963 le16_to_cpu(pcysta->v7.cycles));
1965 le16_to_cpu(pcysta->v7.cycles));
1971 if (ver->fcxmreg == 7)
1974 if (dm->wl_btg_rx == BTC_BTGCTRL_BB_GNT_FWCTRL)
1975 dm->wl_btg_rx_rb = BTC_BTGCTRL_BB_GNT_FWCTRL;
1977 dm->wl_btg_rx_rb = val;
1980 if (dm->wl_pre_agc == BTC_PREAGC_BB_FWCTRL)
1981 dm->wl_pre_agc_rb = BTC_PREAGC_BB_FWCTRL;
1983 dm->wl_pre_agc_rb = val;
2004 const struct rtw89_btc_ver *ver = rtwdev->btc.ver;
2014 if (index + 2 >= ver->info_buf)
2017 rpt_len = le16_to_cpu(btc_prpt->len);
2033 struct rtw89_btc *btc = &rtwdev->btc;
2034 const struct rtw89_btc_ver *ver = btc->ver;
2035 struct rtw89_btc_dm *dm = &btc->dm;
2040 u16 len = btc->policy_len;
2042 if (!btc->update_policy_force &&
2043 !memcmp(&dm->tdma, &dm->tdma_now, sizeof(dm->tdma))) {
2050 tlv = (struct rtw89_btc_btf_tlv *)&btc->policy[len];
2051 tlv->type = CXPOLICY_TDMA;
2052 if (ver->fcxtdma == 1) {
2053 v = (struct rtw89_btc_fbtc_tdma *)&tlv->val[0];
2054 tlv->len = sizeof(*v);
2055 *v = dm->tdma;
2056 btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v);
2057 } else if (ver->fcxtdma == 7) {
2058 tlv_v7 = (struct rtw89_btc_btf_tlv_v7 *)&btc->policy[len];
2059 tlv_v7->len = sizeof(dm->tdma);
2060 tlv_v7->ver = ver->fcxtdma;
2061 tlv_v7->type = CXPOLICY_TDMA;
2062 memcpy(tlv_v7->val, &dm->tdma, tlv_v7->len);
2063 btc->policy_len += BTC_TLV_HDR_LEN_V7 + tlv_v7->len;
2065 tlv->len = sizeof(*v3);
2066 v3 = (struct rtw89_btc_fbtc_tdma_v3 *)&tlv->val[0];
2067 v3->fver = ver->fcxtdma;
2068 v3->tdma = dm->tdma;
2069 btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v3);
2074 __func__, dm->tdma.type, dm->tdma.rxflctrl,
2075 dm->tdma.txpause, dm->tdma.wtgle_n, dm->tdma.leak_n,
2076 dm->tdma.ext_ctrl);
2081 struct rtw89_btc *btc = &rtwdev->btc;
2082 struct rtw89_btc_dm *dm = &btc->dm;
2089 "[BTC], %s(): A:btc->policy_len = %d\n",
2090 __func__, btc->policy_len);
2093 if (!btc->update_policy_force &&
2094 !memcmp(&dm->slot.v1[i], &dm->slot_now.v1[i],
2095 sizeof(dm->slot.v1[i])))
2098 len = btc->policy_len;
2100 tlv = (struct rtw89_btc_btf_tlv *)&btc->policy[len];
2101 v = (struct btc_fbtc_1slot *)&tlv->val[0];
2102 tlv->type = CXPOLICY_SLOT;
2103 tlv->len = sizeof(*v);
2105 v->fver = btc->ver->fcxslots;
2106 v->sid = i;
2107 v->slot = dm->slot.v1[i];
2110 "[BTC], %s(): slot-%d: dur=%d, table=0x%08x, type=%d\n",
2111 __func__, i, dm->slot.v1[i].dur, dm->slot.v1[i].cxtbl,
2112 dm->slot.v1[i].cxtype);
2115 btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v);
2127 struct rtw89_btc *btc = &rtwdev->btc;
2128 struct rtw89_btc_dm *dm = &btc->dm;
2133 if (!btc->update_policy_force &&
2134 !memcmp(&dm->slot.v7[i], &dm->slot_now.v7[i],
2135 sizeof(dm->slot.v7[i])))
2138 len = btc->policy_len;
2147 tlv = (struct rtw89_btc_btf_tlv_v7 *)&btc->policy[len];
2148 tlv->type = CXPOLICY_SLOT;
2149 tlv->ver = btc->ver->fcxslots;
2150 tlv->len = sizeof(dm->slot.v7[0]) + BTC_TLV_SLOT_ID_LEN_V7;
2154 if ((len + (u16)tlv->len) > RTW89_BTC_POLICY_MAXLEN) {
2160 btc->policy[len] = i; /* slot-id */
2161 memcpy(&btc->policy[len + 1], &dm->slot.v7[i],
2162 sizeof(dm->slot.v7[0]));
2163 len += tlv->len;
2166 "[BTC], %s: policy_len=%d, slot-%d: dur=%d, type=%d, table=0x%08x\n",
2167 __func__, btc->policy_len, i, dm->slot.v7[i].dur,
2168 dm->slot.v7[i].cxtype, dm->slot.v7[i].cxtbl);
2170 btc->policy_len = len; /* update total length */
2176 __func__, cnt, btc->policy_len);
2181 struct rtw89_btc *btc = &rtwdev->btc;
2183 if (btc->ver->fcxslots == 7)
2191 struct rtw89_btc *btc = &rtwdev->btc;
2192 const struct rtw89_btc_ver *ver = btc->ver;
2212 switch (ver->frptmap) {
2226 switch (ver->frptmap) {
2240 switch (ver->frptmap) {
2252 switch (ver->frptmap) {
2268 switch (ver->frptmap) {
2282 switch (ver->frptmap) {
2298 switch (ver->frptmap) {
2314 switch (ver->frptmap) {
2336 struct rtw89_btc *btc = &rtwdev->btc;
2337 const struct rtw89_btc_ver *ver = btc->ver;
2340 struct rtw89_btc_dm *dm = &btc->dm;
2343 if (ver->fcxslots == 7) {
2344 len = sizeof(*tlv_v7) + sizeof(dm->slot.v7);
2349 tlv_v7->type = SET_SLOT_TABLE;
2350 tlv_v7->ver = ver->fcxslots;
2351 tlv_v7->len = ARRAY_SIZE(dm->slot.v7);
2352 memcpy(tlv_v7->val, dm->slot.v7, sizeof(dm->slot.v7));
2363 tbl->fver = BTF_SET_SLOT_TABLE_VER;
2364 tbl->tbl_num = CXST_MAX;
2365 memcpy(tbl->tbls, dm->slot.v1, flex_array_size(tbl, tbls, CXST_MAX));
2376 struct rtw89_btc *btc = &rtwdev->btc;
2377 struct rtw89_btc_wl_smap *wl_smap = &btc->cx.wl.status.map;
2378 struct rtw89_btc_btf_fwinfo *fwinfo = &btc->fwinfo;
2383 if ((wl_smap->rf_off || wl_smap->lps != BTC_LPS_OFF) && rpt_state != 0)
2393 val = fwinfo->rpt_en_map | bit_map;
2395 val = fwinfo->rpt_en_map & ~bit_map;
2397 if (val == fwinfo->rpt_en_map)
2400 if (btc->ver->fcxbtcrpt == 8) {
2402 r.v8.fver = btc->ver->fcxbtcrpt;
2408 if (btc->ver->fcxbtcrpt == 105)
2411 r.v1.fver = btc->ver->fcxbtcrpt;
2419 fwinfo->rpt_en_map = val;
2424 const struct rtw89_chip_info *chip = rtwdev->chip;
2425 const struct rtw89_btc_ver *ver = rtwdev->btc.ver;
2431 n = chip->mon_reg_num;
2435 if (ver->fcxmreg == 1)
2449 if (ver->fcxmreg == 7) {
2452 v7->type = RPT_EN_MREG;
2453 v7->fver = ver->fcxmreg;
2454 v7->len = n;
2456 v7->regs[i].type = chip->mon_reg[i].type;
2457 v7->regs[i].bytes = chip->mon_reg[i].bytes;
2458 v7->regs[i].offset = chip->mon_reg[i].offset;
2466 v1->fver = ver->fcxmreg;
2467 v1->reg_num = n;
2468 memcpy(v1->regs, chip->mon_reg, flex_array_size(v1, regs, n));
2484 struct rtw89_btc *btc = &rtwdev->btc;
2485 struct rtw89_btc_dm *dm = &btc->dm;
2487 /* use ring-structure to store dm step */
2488 dm->dm_step.step[dm->dm_step.step_pos] = reason_or_action;
2489 dm->dm_step.step_pos++;
2491 if (dm->dm_step.step_pos >= ARRAY_SIZE(dm->dm_step.step)) {
2492 dm->dm_step.step_pos = 0;
2493 dm->dm_step.step_ov = true;
2500 struct rtw89_btc *btc = &rtwdev->btc;
2501 struct rtw89_btc_dm *dm = &btc->dm;
2504 dm->run_action = action;
2509 btc->policy_len = 0;
2510 btc->policy_type = policy_type;
2515 if (btc->policy_len == 0 || btc->policy_len > RTW89_BTC_POLICY_MAXLEN)
2519 "[BTC], %s(): action = %d -> policy type/len: 0x%04x/%d\n",
2520 __func__, action, policy_type, btc->policy_len);
2522 if (dm->tdma.rxflctrl == CXFLC_NULLP ||
2523 dm->tdma.rxflctrl == CXFLC_QOSNULL)
2524 btc->lps = 1;
2526 btc->lps = 0;
2528 if (btc->lps == 1)
2529 rtw89_set_coex_ctrl_lps(rtwdev, btc->lps);
2532 btc->policy, btc->policy_len);
2534 memcpy(&dm->tdma_now, &dm->tdma, sizeof(dm->tdma_now));
2535 if (btc->ver->fcxslots == 7)
2536 memcpy(&dm->slot_now.v7, &dm->slot.v7, sizeof(dm->slot_now.v7));
2538 memcpy(&dm->slot_now.v1, &dm->slot.v1, sizeof(dm->slot_now.v1));
2541 if (btc->update_policy_force)
2542 btc->update_policy_force = false;
2544 if (btc->lps == 0)
2545 rtw89_set_coex_ctrl_lps(rtwdev, btc->lps);
2550 struct rtw89_btc *btc = &rtwdev->btc;
2551 const struct rtw89_btc_ver *ver = btc->ver;
2552 struct rtw89_btc_dm *dm = &btc->dm;
2553 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
2554 struct rtw89_btc_rf_trx_para rf_para = dm->rf_trx_para;
2558 if (ver->fcxinit == 7)
2564 if (ver->fwlrole == 0)
2566 else if (ver->fwlrole == 1)
2568 else if (ver->fwlrole == 2)
2572 if (ver->drvinfo_type == 1)
2575 if (ver->fcxctrl == 7)
2581 if (ver->drvinfo_type == 1)
2584 dm->trx_info.tx_power = u32_get_bits(rf_para.wl_tx_power,
2586 dm->trx_info.rx_gain = u32_get_bits(rf_para.wl_rx_gain,
2588 dm->trx_info.bt_tx_power = u32_get_bits(rf_para.bt_tx_power,
2590 dm->trx_info.bt_rx_gain = u32_get_bits(rf_para.bt_rx_gain,
2592 dm->trx_info.cn = wl->cn_report;
2593 dm->trx_info.nhm = wl->nhm.pwr;
2597 if (ver->drvinfo_type == 1)
2614 struct rtw89_btc *btc = &rtwdev->btc;
2615 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
2635 struct rtw89_btc *btc = &rtwdev->btc;
2636 struct rtw89_btc_dm *dm = &btc->dm;
2637 struct rtw89_mac_ax_gnt *g = dm->gnt.band;
2678 rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
2684 struct rtw89_btc *btc = &rtwdev->btc;
2685 struct rtw89_btc_dm *dm = &btc->dm;
2686 struct rtw89_mac_ax_gnt *g = dm->gnt.band;
2687 u8 i, bt_idx = dm->bt_select + 1;
2727 if (rtwdev->chip->para_ver & BTC_FEAT_WLAN_ACT_MUX) {
2734 dm->gnt.bt[i].wlan_act_en = 0;
2735 dm->gnt.bt[i].wlan_act = 0;
2738 dm->gnt.bt[i].wlan_act_en = 1;
2739 dm->gnt.bt[i].wlan_act = 0;
2742 dm->gnt.bt[i].wlan_act_en = 1;
2743 dm->gnt.bt[i].wlan_act = 1;
2748 rtw89_mac_cfg_gnt_v2(rtwdev, &dm->gnt);
2772 const struct rtw89_chip_info *chip = rtwdev->chip;
2773 struct rtw89_btc *btc = &rtwdev->btc;
2774 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
2777 if (wl->rf_para.tx_pwr_freerun == level)
2780 wl->rf_para.tx_pwr_freerun = level;
2781 btc->dm.rf_trx_para.wl_tx_power = level;
2799 chip->ops->btc_set_wl_txpwr_ctrl(rtwdev, pwr_val);
2804 const struct rtw89_chip_info *chip = rtwdev->chip;
2805 struct rtw89_btc *btc = &rtwdev->btc;
2806 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
2808 if (wl->rf_para.rx_gain_freerun == level)
2811 wl->rf_para.rx_gain_freerun = level;
2812 btc->dm.rf_trx_para.wl_rx_gain = level;
2818 chip->ops->btc_set_wl_rx_gain(rtwdev, level);
2823 struct rtw89_btc *btc = &rtwdev->btc;
2824 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
2828 if (btc->cx.cnt_bt[BTC_BCNT_INFOUPDATE] == 0)
2831 if (bt->rf_para.tx_pwr_freerun == level)
2838 buf = (s8)(-level);
2841 bt->rf_para.tx_pwr_freerun = level;
2842 btc->dm.rf_trx_para.bt_tx_power = level;
2850 struct rtw89_btc *btc = &rtwdev->btc;
2851 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
2853 if (btc->cx.cnt_bt[BTC_BCNT_INFOUPDATE] == 0)
2856 if ((bt->rf_para.rx_gain_freerun == level ||
2858 (!rtwdev->chip->scbd || bt->lna_constrain == level))
2861 bt->rf_para.rx_gain_freerun = level;
2862 btc->dm.rf_trx_para.bt_rx_gain = level;
2878 const struct rtw89_chip_info *chip = rtwdev->chip;
2879 struct rtw89_btc *btc = &rtwdev->btc;
2880 const struct rtw89_btc_ver *ver = btc->ver;
2881 struct rtw89_btc_dm *dm = &btc->dm;
2882 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
2883 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
2884 struct rtw89_btc_bt_link_info *b = &bt->link_info;
2885 struct rtw89_btc_wl_smap *wl_smap = &wl->status.map;
2890 if (ver->fwlrole == 0) {
2891 link_mode = wl->role_info.link_mode;
2893 if (wl->dbcc_info.real_band[i] == RTW89_BAND_2G)
2896 } else if (ver->fwlrole == 1) {
2897 link_mode = wl->role_info_v1.link_mode;
2898 dbcc_2g_phy = wl->role_info_v1.dbcc_2g_phy;
2899 } else if (ver->fwlrole == 2) {
2900 link_mode = wl->role_info_v2.link_mode;
2901 dbcc_2g_phy = wl->role_info_v2.dbcc_2g_phy;
2905 if (btc->ant_type == BTC_ANT_SHARED) {
2907 if ((btc->dm.wl_btg_rx && b->profile_cnt.now != 0) ||
2908 dm->bt_only == 1)
2909 dm->trx_para_level = 1; /* for better BT ACI issue */
2911 dm->trx_para_level = 0;
2912 } else { /* non-shared antenna */
2913 dm->trx_para_level = 5;
2914 /* modify trx_para if WK 2.4G-STA-DL + bt link */
2915 if (b->profile_cnt.now != 0 &&
2917 wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) { /* uplink */
2918 if (wl->rssi_level == 4 && bt->rssi_level > 2)
2919 dm->trx_para_level = 6;
2920 else if (wl->rssi_level == 3 && bt->rssi_level > 3)
2921 dm->trx_para_level = 7;
2925 level_id = dm->trx_para_level;
2926 if (level_id >= chip->rf_para_dlink_num ||
2927 level_id >= chip->rf_para_ulink_num) {
2934 if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL))
2935 para = chip->rf_para_ulink[level_id];
2937 para = chip->rf_para_dlink[level_id];
2939 if (dm->fddt_train) {
2949 if (!bt->enable.now || dm->wl_only || wl_smap->rf_off ||
2950 wl_smap->lps == BTC_LPS_RF_OFF ||
2953 (rtwdev->dbcc_en && dbcc_2g_phy != RTW89_PHY_1))
2958 if (wl_stb_chg != dm->wl_stb_chg) {
2959 dm->wl_stb_chg = wl_stb_chg;
2960 chip->ops->btc_wl_s1_standby(rtwdev, dm->wl_stb_chg);
2966 struct rtw89_btc *btc = &rtwdev->btc;
2967 struct rtw89_btc_cx *cx = &btc->cx;
2968 struct rtw89_btc_wl_info *wl = &cx->wl;
2969 struct rtw89_btc_bt_info *bt = &cx->bt;
2970 struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info;
2972 if (wl->status.map.connecting || wl->status.map._4way ||
2973 wl->status.map.roaming) {
2974 cx->state_map = BTC_WLINKING;
2975 } else if (wl->status.map.scan) { /* wl scan */
2976 if (bt_linfo->status.map.inq_pag)
2977 cx->state_map = BTC_WSCAN_BSCAN;
2979 cx->state_map = BTC_WSCAN_BNOSCAN;
2980 } else if (wl->status.map.busy) { /* only busy */
2981 if (bt_linfo->status.map.inq_pag)
2982 cx->state_map = BTC_WBUSY_BSCAN;
2984 cx->state_map = BTC_WBUSY_BNOSCAN;
2986 cx->state_map = BTC_WIDLE;
2992 const struct rtw89_chip_info *chip = rtwdev->chip;
2993 struct rtw89_btc *btc = &rtwdev->btc;
2994 const struct rtw89_btc_ver *ver = btc->ver;
2995 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
2996 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
2997 struct rtw89_btc_bt_link_info *b = &bt->link_info;
2998 struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
2999 struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
3000 struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
3001 struct rtw89_btc_wl_role_info_v8 *wl_rinfo_v8 = &wl->role_info_v8;
3009 if (btc->manual_ctrl || wl->status.map.scan)
3012 if (ver->fwlrole == 0) {
3013 mode = wl_rinfo->link_mode;
3014 connect_cnt = wl_rinfo->connect_cnt;
3015 } else if (ver->fwlrole == 1) {
3016 mode = wl_rinfo_v1->link_mode;
3017 connect_cnt = wl_rinfo_v1->connect_cnt;
3018 } else if (ver->fwlrole == 2) {
3019 mode = wl_rinfo_v2->link_mode;
3020 connect_cnt = wl_rinfo_v2->connect_cnt;
3021 } else if (ver->fwlrole == 8) {
3022 mode = wl_rinfo_v8->link_mode;
3023 connect_cnt = wl_rinfo_v8->connect_cnt;
3028 if (wl->status.map.rf_off || bt->whql_test ||
3036 r = &wl_rinfo->active_role[i];
3037 r1 = &wl_rinfo_v1->active_role_v1[i];
3038 r2 = &wl_rinfo_v2->active_role_v2[i];
3039 rlink = &wl_rinfo_v8->rlink[i][0];
3041 if (ver->fwlrole == 0 &&
3042 (r->role == RTW89_WIFI_ROLE_P2P_GO ||
3043 r->role == RTW89_WIFI_ROLE_P2P_CLIENT)) {
3044 ch = r->ch;
3045 bw = r->bw;
3047 } else if (ver->fwlrole == 1 &&
3048 (r1->role == RTW89_WIFI_ROLE_P2P_GO ||
3049 r1->role == RTW89_WIFI_ROLE_P2P_CLIENT)) {
3050 ch = r1->ch;
3051 bw = r1->bw;
3053 } else if (ver->fwlrole == 2 &&
3054 (r2->role == RTW89_WIFI_ROLE_P2P_GO ||
3055 r2->role == RTW89_WIFI_ROLE_P2P_CLIENT)) {
3056 ch = r2->ch;
3057 bw = r2->bw;
3059 } else if (ver->fwlrole == 8 &&
3060 (rlink->role == RTW89_WIFI_ROLE_P2P_GO ||
3061 rlink->role == RTW89_WIFI_ROLE_P2P_CLIENT)) {
3062 ch = rlink->ch;
3063 bw = rlink->bw;
3071 r = &wl_rinfo->active_role[i];
3072 r1 = &wl_rinfo_v1->active_role_v1[i];
3073 r2 = &wl_rinfo_v2->active_role_v2[i];
3074 rlink = &wl_rinfo_v8->rlink[i][0];
3076 if (ver->fwlrole == 0 &&
3077 r->connected && r->band == RTW89_BAND_2G) {
3078 ch = r->ch;
3079 bw = r->bw;
3081 } else if (ver->fwlrole == 1 &&
3082 r1->connected && r1->band == RTW89_BAND_2G) {
3083 ch = r1->ch;
3084 bw = r1->bw;
3086 } else if (ver->fwlrole == 2 &&
3087 r2->connected && r2->band == RTW89_BAND_2G) {
3088 ch = r2->ch;
3089 bw = r2->bw;
3091 } else if (ver->fwlrole == 8 &&
3092 rlink->connected && rlink->rf_band == RTW89_BAND_2G) {
3093 ch = rlink->ch;
3094 bw = rlink->bw;
3102 bw = 20 + chip->afh_guard_ch * 2;
3105 bw = 40 + chip->afh_guard_ch * 2;
3108 bw = 5 + chip->afh_guard_ch * 2;
3111 bw = 10 + chip->afh_guard_ch * 2;
3119 if (wl->afh_info.en == en &&
3120 wl->afh_info.ch == ch &&
3121 wl->afh_info.bw == bw &&
3122 b->profile_cnt.last == b->profile_cnt.now) {
3129 wl->afh_info.en = en;
3130 wl->afh_info.ch = ch;
3131 wl->afh_info.bw = bw;
3133 _send_fw_cmd(rtwdev, BTFC_SET, SET_BT_WL_CH_INFO, &wl->afh_info, 3);
3138 btc->cx.cnt_wl[BTC_WCNT_CH_UPDATE]++;
3143 struct rtw89_btc *btc = &rtwdev->btc;
3144 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
3145 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
3146 struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
3147 struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
3148 struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
3149 struct rtw89_btc_wl_role_info_v8 *wl_rinfo_v8 = &wl->role_info_v8;
3150 struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info;
3151 struct rtw89_btc_bt_hid_desc *hid = &bt_linfo->hid_desc;
3152 union rtw89_btc_module_info *md = &btc->mdinfo;
3153 const struct rtw89_btc_ver *ver = btc->ver;
3156 if (ver->fcxinit == 7)
3157 isolation = md->md_v7.ant.isolation;
3159 isolation = md->md.ant.isolation;
3161 if (ver->fwlrole == 0)
3162 connect_cnt = wl_rinfo->connect_cnt;
3163 else if (ver->fwlrole == 1)
3164 connect_cnt = wl_rinfo_v1->connect_cnt;
3165 else if (ver->fwlrole == 2)
3166 connect_cnt = wl_rinfo_v2->connect_cnt;
3167 else if (ver->fwlrole == 8)
3168 connect_cnt = wl_rinfo_v8->connect_cnt;
3170 if (btc->ant_type == BTC_ANT_SHARED) {
3171 btc->dm.trx_para_level = 0;
3177 btc->dm.trx_para_level = 5;
3181 if (bt_linfo->profile_cnt.now == 0) {
3182 btc->dm.trx_para_level = 5;
3186 if (hid->pair_cnt > BTC_TDMA_BTHID_MAX) {
3187 btc->dm.trx_para_level = 5;
3193 btc->dm.trx_para_level = 5;
3197 if (!wl->status.map.busy) {/* wl idle -> freerun */
3198 btc->dm.trx_para_level = 5;
3200 } else if (wl->rssi_level > 1) {/* WL rssi < 50% (-60dBm) */
3201 btc->dm.trx_para_level = 0;
3203 } else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) {
3204 if (wl->rssi_level == 0 && bt_linfo->rssi > 31) {
3205 btc->dm.trx_para_level = 6;
3207 } else if (wl->rssi_level == 1 && bt_linfo->rssi > 36) {
3208 btc->dm.trx_para_level = 7;
3211 btc->dm.trx_para_level = 0;
3213 } else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_DL)) {
3214 if (bt_linfo->rssi > 28) {
3215 btc->dm.trx_para_level = 6;
3220 btc->dm.trx_para_level = 0;
3224 #define _tdma_set_flctrl(btc, flc) ({(btc)->dm.tdma.rxflctrl = flc; })
3225 #define _tdma_set_flctrl_role(btc, role) ({(btc)->dm.tdma.rxflctrl_role = role; })
3226 #define _tdma_set_tog(btc, wtg) ({(btc)->dm.tdma.wtgle_n = wtg; })
3227 #define _tdma_set_lek(btc, lek) ({(btc)->dm.tdma.leak_n = lek; })
3291 const struct rtw89_chip_info *chip = rtwdev->chip;
3293 chip->ops->btc_set_policy(rtwdev, policy_type);
3300 struct rtw89_btc *btc = &rtwdev->btc;
3301 struct rtw89_btc_dm *dm = &btc->dm;
3302 struct rtw89_btc_fbtc_tdma *t = &dm->tdma;
3303 struct rtw89_btc_fbtc_slot *s = dm->slot.v1;
3307 if (btc->ant_type == BTC_ANT_SHARED) {
3308 if (btc->cx.wl.status.map._4way)
3321 btc->bt_req_en = false;
3328 btc->update_policy_force = true;
3376 btc->bt_req_en = true;
3394 case BTC_CXP_FIX: /* TDMA Fix-Slot */
3442 case BTC_CXP_FIX_TDW1B1: /* W1:B1 = user-define */
3443 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3445 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3450 case BTC_CXP_PFIX: /* PS-TDMA Fix-Slot */
3453 if (btc->cx.wl.role_info.role_map.role.ap)
3483 case BTC_CXP_AUTO: /* TDMA Auto-Slot */
3499 case BTC_CXP_AUTO_TDW1B1: /* W1:B1 = user-define */
3500 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3502 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3507 case BTC_CXP_PAUTO: /* PS-TDMA Auto-Slot */
3524 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3526 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3531 case BTC_CXP_AUTO2: /* TDMA Auto-Slot2 */
3560 case BTC_CXP_AUTO2_TDW1B4: /* W1:B1 = user-define */
3561 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3563 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
3568 case BTC_CXP_PAUTO2: /* PS-TDMA Auto-Slot2 */
3597 case BTC_CXP_PAUTO2_TDW1B4: /* W1:B1 = user-define */
3598 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3600 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
3611 struct rtw89_btc *btc = &rtwdev->btc;
3612 struct rtw89_btc_dm *dm = &btc->dm;
3613 struct rtw89_btc_fbtc_tdma *t = &dm->tdma;
3614 struct rtw89_btc_wl_role_info_v1 *wl_rinfo = &btc->cx.wl.role_info_v1;
3615 struct rtw89_btc_bt_hid_desc *hid = &btc->cx.bt.link_info.hid_desc;
3616 struct rtw89_btc_bt_hfp_desc *hfp = &btc->cx.bt.link_info.hfp_desc;
3617 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
3624 if (btc->ant_type == BTC_ANT_SHARED) {
3625 if (btc->cx.wl.status.map._4way)
3627 else if (hid->exist && hid->type == BTC_HID_218)
3628 tbl_w1 = cxtbl[7]; /* Ack/BA no break bt Hi-Pri-rx */
3632 if (dm->leak_ap &&
3636 } else if (hid->exist && hid->type == BTC_HID_218) {
3637 tbl_b1 = cxtbl[4]; /* Ack/BA no break bt Hi-Pri-rx */
3647 if (wl->bg_mode)
3649 else if ((wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) &&
3650 hid->exist)
3656 btc->bt_req_en = false;
3660 btc->update_policy_force = true;
3723 btc->bt_req_en = true;
3727 /* To avoid wl-s0 tx break by hid/hfp tx */
3728 if (hid->exist || hfp->exist)
3731 dur_2 = dm->e2g_slot_limit;
3734 case BTC_CXP_OFFE_2GBWISOB: /* for normal-case */
3740 case BTC_CXP_OFFE_2GISOB: /* for bt no-link */
3770 case BTC_CXP_OFFE_WL: /* for 4-way */
3780 case BTC_CXP_FIX: /* TDMA Fix-Slot */
3829 case BTC_CXP_FIX_TDW1B1: /* W1:B1 = user-define */
3830 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3832 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3839 case BTC_CXP_PFIX: /* PS-TDMA Fix-Slot */
3868 case BTC_CXP_PFIX_TDW1B1: /* W1:B1 = user-define */
3869 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3871 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3878 case BTC_CXP_AUTO: /* TDMA Auto-Slot */
3895 case BTC_CXP_AUTO_TDW1B1: /* W1:B1 = user-define */
3896 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3898 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3905 case BTC_CXP_PAUTO: /* PS-TDMA Auto-Slot */
3923 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3925 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3932 case BTC_CXP_AUTO2: /* TDMA Auto-Slot2 */
3962 case BTC_CXP_AUTO2_TDW1B4: /* W1:B1 = user-define */
3963 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3965 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3967 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
3974 case BTC_CXP_PAUTO2: /* PS-TDMA Auto-Slot2 */
4004 case BTC_CXP_PAUTO2_TDW1B4: /* W1:B1 = user-define */
4005 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
4007 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
4009 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
4018 if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC && dm->tdma.rxflctrl) {
4019 null_role = FIELD_PREP(0x0f, dm->wl_scc.null_role1) |
4020 FIELD_PREP(0xf0, dm->wl_scc.null_role2);
4024 /* enter leak_slot after each null-1 */
4025 if (dm->leak_ap && dm->tdma.leak_n > 1)
4028 if (dm->tdma_instant_excute) {
4029 btc->dm.tdma.option_ctrl |= BIT(0);
4030 btc->update_policy_force = true;
4038 struct rtw89_btc_wl_info *wl = &rtwdev->btc.cx.wl;
4044 if (rtwdev->btc.ver->fwlrole == 8) {
4045 plt.band = wl->pta_req_mac;
4046 if (wl->bt_polut_type[plt.band] == tx_val)
4049 wl->bt_polut_type[plt.band] = tx_val;
4057 if (!rtwdev->dbcc_en)
4069 struct rtw89_btc *btc = &rtwdev->btc;
4070 struct rtw89_btc_dm *dm = &btc->dm;
4071 struct rtw89_btc_cx *cx = &btc->cx;
4072 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4073 struct rtw89_btc_bt_info *bt = &cx->bt;
4074 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
4081 if (btc->ver->fwlrole == 1)
4082 dbcc_chg = wl->role_info_v1.dbcc_chg;
4083 else if (btc->ver->fwlrole == 2)
4084 dbcc_chg = wl->role_info_v2.dbcc_chg;
4085 else if (btc->ver->fwlrole == 8)
4086 dbcc_chg = wl->role_info_v8.dbcc_chg;
4088 if (btc->dm.run_reason == BTC_RSN_NTFY_POWEROFF ||
4089 btc->dm.run_reason == BTC_RSN_NTFY_RADIO_STATE ||
4090 btc->dm.run_reason == BTC_RSN_CMD_SET_COEX || dbcc_chg)
4093 if (!force_exec && ant_path_type == dm->set_ant_path) {
4098 } else if (bt->rfk_info.map.run) {
4102 } else if (btc->dm.run_reason != BTC_RSN_NTFY_WL_RFK &&
4103 wl->rfk_info.state != BTC_WRFK_STOP) {
4109 dm->set_ant_path = ant_path_type;
4114 __func__, phy_map, dm->set_ant_path & 0xff);
4121 if (bt->enable.now)
4140 if (rtwdev->dbcc_en) {
4142 b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G);
4148 wl_dinfo->real_band[0] == RTW89_BAND_2G &&
4149 wl_dinfo->real_band[1] == RTW89_BAND_5G)
4196 struct rtw89_btc *btc = &rtwdev->btc;
4197 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4198 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
4199 struct rtw89_btc_wl_role_info_v8 *wl_rinfo = &wl->role_info_v8;
4201 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
4202 struct rtw89_btc_dm *dm = &btc->dm;
4205 if (btc->dm.run_reason == BTC_RSN_NTFY_POWEROFF ||
4206 btc->dm.run_reason == BTC_RSN_NTFY_RADIO_STATE ||
4207 btc->dm.run_reason == BTC_RSN_CMD_SET_COEX || wl_rinfo->dbcc_chg)
4210 if (wl_rinfo->link_mode != BTC_WLINK_25G_MCC &&
4211 btc->dm.wl_btg_rx == 2)
4214 if (!force_exec && ant_path_type == dm->set_ant_path) {
4219 } else if (bt->rfk_info.map.run) {
4223 } else if (btc->dm.run_reason != BTC_RSN_NTFY_WL_RFK &&
4224 wl->rfk_info.state != BTC_WRFK_STOP) {
4230 dm->set_ant_path = ant_path_type;
4234 __func__, phy_map, dm->set_ant_path & 0xff);
4239 if (bt->enable.now && bt->run_patch_code)
4256 if (wl_rinfo->dbcc_en) {
4257 if (wl_dinfo->real_band[RTW89_PHY_0] == RTW89_BAND_2G)
4263 if (wl_dinfo->real_band[RTW89_PHY_1] == RTW89_BAND_2G)
4286 BTC_WLACT_SW_HI); /* no BT-Tx */
4298 if (rtwdev->chip->chip_id == RTL8922A)
4320 struct rtw89_btc *btc = &rtwdev->btc;
4321 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4325 if (wl->status.map.rf_off || btc->dm.bt_only) {
4327 } else if (wl->status.map.lps == BTC_LPS_RF_ON) {
4336 } else if (wl->status.map.lps == BTC_LPS_RF_ON) {
4337 if (btc->cx.bt.link_info.a2dp_desc.active)
4348 struct rtw89_btc *btc = &rtwdev->btc;
4355 btc->dm.freerun = true;
4376 struct rtw89_btc *btc = &rtwdev->btc;
4377 struct rtw89_btc_bt_link_info *b = &btc->cx.bt.link_info;
4378 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4382 if (btc->ant_type == BTC_ANT_SHARED) { /* shared-antenna */
4383 switch (btc->cx.state_map) {
4384 case BTC_WBUSY_BNOSCAN: /*wl-busy + bt idle*/
4385 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-idle */
4386 if (b->status.map.connect)
4388 else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_DL))
4393 case BTC_WBUSY_BSCAN: /*wl-busy + bt-inq */
4397 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq */
4401 case BTC_WLINKING: /* wl-connecting + bt-inq or bt-idle */
4405 case BTC_WIDLE: /* wl-idle + bt-idle */
4409 } else { /* dedicated-antenna */
4416 struct rtw89_btc *btc = &rtwdev->btc;
4417 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4421 if (btc->ant_type == BTC_ANT_SHARED) {
4422 if (btc->cx.wl.status.map._4way) {
4424 } else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) {
4425 btc->cx.bt.scan_rx_low_pri = true;
4431 if (wl->bg_mode)
4433 else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL))
4442 const struct rtw89_chip_info *chip = rtwdev->chip;
4443 struct rtw89_btc *btc = &rtwdev->btc;
4444 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4445 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
4446 struct rtw89_btc_bt_hid_desc *hid = &bt->link_info.hid_desc;
4451 if (btc->ant_type == BTC_ANT_SHARED) { /* shared-antenna */
4452 if (wl->status.map._4way) {
4454 } else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL)) {
4455 btc->cx.bt.scan_rx_low_pri = true;
4456 if (hid->type & BTC_HID_BLE)
4460 } else if (hid->type == BTC_HID_218) {
4461 bt->scan_rx_low_pri = true;
4463 } else if (chip->para_ver == 0x1) {
4468 } else { /* dedicated-antenna */
4469 if (wl->bg_mode)
4471 else if (wl->status.map.traffic_dir & BIT(RTW89_TFC_UL))
4482 struct rtw89_btc *btc = &rtwdev->btc;
4483 struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info;
4484 struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc;
4485 struct rtw89_btc_dm *dm = &btc->dm;
4489 switch (btc->cx.state_map) {
4490 case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP */
4491 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4492 dm->slot_dur[CXST_W1] = 40;
4493 dm->slot_dur[CXST_B1] = 200;
4501 case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP */
4504 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP */
4507 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP */
4508 case BTC_WLINKING: /* wl-connecting + bt-A2DP */
4509 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4510 dm->slot_dur[CXST_W1] = 40;
4511 dm->slot_dur[CXST_B1] = 200;
4519 case BTC_WIDLE: /* wl-idle + bt-A2DP */
4527 struct rtw89_btc *btc = &rtwdev->btc;
4531 switch (btc->cx.state_map) {
4532 case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2dp_Sink */
4535 case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2dp_Sink */
4538 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2dp_Sink */
4541 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2dp_Sink */
4544 case BTC_WLINKING: /* wl-connecting + bt-A2dp_Sink */
4547 case BTC_WIDLE: /* wl-idle + bt-A2dp_Sink */
4555 struct rtw89_btc *btc = &rtwdev->btc;
4559 switch (btc->cx.state_map) {
4560 case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-PAN */
4563 case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-PAN */
4566 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-PAN */
4569 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-PAN */
4572 case BTC_WLINKING: /* wl-connecting + bt-PAN */
4575 case BTC_WIDLE: /* wl-idle + bt-pan */
4583 struct rtw89_btc *btc = &rtwdev->btc;
4584 struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info;
4585 struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc;
4586 struct rtw89_btc_dm *dm = &btc->dm;
4590 switch (btc->cx.state_map) {
4591 case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP+HID */
4592 case BTC_WIDLE: /* wl-idle + bt-A2DP */
4593 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4594 dm->slot_dur[CXST_W1] = 40;
4595 dm->slot_dur[CXST_B1] = 200;
4603 case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP+HID */
4607 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP+HID */
4610 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP+HID */
4611 case BTC_WLINKING: /* wl-connecting + bt-A2DP+HID */
4612 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4613 dm->slot_dur[CXST_W1] = 40;
4614 dm->slot_dur[CXST_B1] = 200;
4627 struct rtw89_btc *btc = &rtwdev->btc;
4631 switch (btc->cx.state_map) {
4632 case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP+PAN */
4635 case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP+PAN */
4638 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP+PAN */
4641 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP+PAN */
4644 case BTC_WLINKING: /* wl-connecting + bt-A2DP+PAN */
4647 case BTC_WIDLE: /* wl-idle + bt-A2DP+PAN */
4655 struct rtw89_btc *btc = &rtwdev->btc;
4659 switch (btc->cx.state_map) {
4660 case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-PAN+HID */
4663 case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-PAN+HID */
4666 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-PAN+HID */
4669 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-PAN+HID */
4672 case BTC_WLINKING: /* wl-connecting + bt-PAN+HID */
4675 case BTC_WIDLE: /* wl-idle + bt-PAN+HID */
4683 struct rtw89_btc *btc = &rtwdev->btc;
4687 switch (btc->cx.state_map) {
4688 case BTC_WBUSY_BNOSCAN: /* wl-busy + bt-A2DP+PAN+HID */
4692 case BTC_WBUSY_BSCAN: /* wl-busy + bt-inq + bt-A2DP+PAN+HID */
4696 case BTC_WSCAN_BSCAN: /* wl-scan + bt-inq + bt-A2DP+PAN+HID */
4700 case BTC_WSCAN_BNOSCAN: /* wl-scan + bt-A2DP+PAN+HID */
4701 case BTC_WLINKING: /* wl-connecting + bt-A2DP+PAN+HID */
4705 case BTC_WIDLE: /* wl-idle + bt-A2DP+PAN+HID */
4720 struct rtw89_btc *btc = &rtwdev->btc;
4724 if (btc->ant_type == BTC_ANT_SHARED)
4738 struct rtw89_btc *btc = &rtwdev->btc;
4739 struct rtw89_btc_wl_rfk_info rfk = btc->cx.wl.rfk_info;
4753 struct rtw89_btc *btc = &rtwdev->btc;
4754 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4755 struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
4756 struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
4757 struct rtw89_btc_wl_role_info_v8 *wl_rinfo_v8 = &wl->role_info_v8;
4758 struct rtw89_btc_wl_role_info *wl_rinfo_v0 = &wl->role_info;
4759 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
4760 const struct rtw89_chip_info *chip = rtwdev->chip;
4761 const struct rtw89_btc_ver *ver = btc->ver;
4762 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
4763 struct rtw89_btc_dm *dm = &btc->dm;
4765 u32 run_reason = btc->dm.run_reason;
4769 if (btc->manual_ctrl)
4772 if (ver->fwlrole == 0)
4773 wl_rinfo.link_mode = wl_rinfo_v0->link_mode;
4774 else if (ver->fwlrole == 1)
4775 wl_rinfo.link_mode = wl_rinfo_v1->link_mode;
4776 else if (ver->fwlrole == 2)
4777 wl_rinfo.link_mode = wl_rinfo_v2->link_mode;
4778 else if (ver->fwlrole == 8)
4779 wl_rinfo.link_mode = wl_rinfo_v8->link_mode;
4783 if (rtwdev->dbcc_en) {
4784 if (ver->fwlrole == 0) {
4786 if (wl_dinfo->real_band[i] == RTW89_BAND_2G)
4789 } else if (ver->fwlrole == 1) {
4790 wl_rinfo.dbcc_2g_phy = wl_rinfo_v1->dbcc_2g_phy;
4791 } else if (ver->fwlrole == 2) {
4792 wl_rinfo.dbcc_2g_phy = wl_rinfo_v2->dbcc_2g_phy;
4793 } else if (ver->fwlrole == 8) {
4794 wl_rinfo.dbcc_2g_phy = wl_rinfo_v8->dbcc_2g_phy;
4802 else if (!(bt->run_patch_code && bt->enable.now))
4806 else if (dm->freerun)
4808 else if (rtwdev->dbcc_en && wl_rinfo.dbcc_2g_phy != RTW89_PHY_1)
4813 if (dm->wl_btg_rx_rb != dm->wl_btg_rx &&
4814 dm->wl_btg_rx_rb != BTC_BTGCTRL_BB_GNT_NOTFOUND) {
4816 dm->wl_btg_rx_rb = val;
4821 dm->wl_btg_rx_rb != dm->wl_btg_rx ||
4822 is_btg != dm->wl_btg_rx) {
4824 dm->wl_btg_rx = is_btg;
4829 chip->ops->ctrl_btg_bt_rx(rtwdev, is_btg, RTW89_PHY_0);
4835 struct rtw89_btc *btc = &rtwdev->btc;
4836 struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info;
4837 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4838 struct rtw89_btc_wl_role_info_v2 *wl_rinfo = &wl->role_info_v2;
4839 const struct rtw89_chip_info *chip = rtwdev->chip;
4840 const struct rtw89_btc_ver *ver = btc->ver;
4841 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
4842 struct rtw89_btc_dm *dm = &btc->dm;
4845 if (btc->manual_ctrl)
4848 if (wl_rinfo->link_mode == BTC_WLINK_25G_MCC)
4850 else if (!(bt->run_patch_code && bt->enable.now))
4852 else if (wl_rinfo->link_mode == BTC_WLINK_5G)
4854 else if (wl_rinfo->link_mode == BTC_WLINK_NOLINK ||
4855 btc->cx.bt.link_info.profile_cnt.now == 0)
4857 else if (dm->tdma_now.type != CXTDMA_OFF &&
4858 !bt_linfo->hfp_desc.exist &&
4859 !bt_linfo->hid_desc.exist &&
4860 dm->fddt_train == BTC_FDDT_DISABLE)
4862 else if (ver->fwlrole == 2 && wl_rinfo->dbcc_en &&
4863 wl_rinfo->dbcc_2g_phy != RTW89_PHY_1)
4865 else if (btc->ant_type == BTC_ANT_SHARED)
4870 if (dm->wl_pre_agc_rb != dm->wl_pre_agc &&
4871 dm->wl_pre_agc_rb != BTC_PREAGC_NOTFOUND) {
4873 dm->wl_pre_agc_rb = val;
4876 if ((wl->coex_mode == BTC_MODE_NORMAL &&
4877 (dm->run_reason == BTC_RSN_NTFY_INIT ||
4878 dm->run_reason == BTC_RSN_NTFY_SWBAND ||
4879 dm->wl_pre_agc_rb != dm->wl_pre_agc)) ||
4880 is_preagc != dm->wl_pre_agc) {
4881 dm->wl_pre_agc = is_preagc;
4885 chip->ops->ctrl_nbtg_bt_tx(rtwdev, dm->wl_pre_agc, RTW89_PHY_0);
4900 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
4903 struct rtw89_dev *rtwdev = iter_data->rtwdev;
4904 struct rtw89_vif *rtwvif = rtwsta->rtwvif;
4905 struct rtw89_btc *btc = &rtwdev->btc;
4906 struct rtw89_btc_cx *cx = &btc->cx;
4907 struct rtw89_btc_wl_info *wl = &cx->wl;
4909 u8 port = rtwvif->port;
4910 u32 tx_time = iter_data->tx_time;
4911 u8 tx_retry = iter_data->tx_retry;
4912 u16 enable = iter_data->enable;
4913 bool reenable = iter_data->reenable;
4915 if (btc->ver->fwlrole == 8)
4916 plink = &wl->rlink_info[port][0];
4918 plink = &wl->link_info[port];
4923 if (!plink->connected) {
4926 __func__, plink->connected);
4930 /* backup the original tx time before tx-limit on */
4932 rtw89_mac_get_tx_time(rtwdev, rtwsta, &plink->tx_time);
4933 rtw89_mac_get_tx_retry_limit(rtwdev, rtwsta, &plink->tx_retry);
4936 __func__, plink->tx_time, plink->tx_retry);
4939 /* restore the original tx time if no tx-limit */
4941 rtw89_mac_set_tx_time(rtwdev, rtwsta, true, plink->tx_time);
4943 plink->tx_retry);
4946 __func__, plink->tx_time, plink->tx_retry);
4959 struct rtw89_btc *btc = &rtwdev->btc;
4960 const struct rtw89_btc_ver *ver = btc->ver;
4961 struct rtw89_btc_cx *cx = &btc->cx;
4962 struct rtw89_btc_dm *dm = &btc->dm;
4963 struct rtw89_btc_wl_info *wl = &cx->wl;
4964 struct rtw89_btc_bt_info *bt = &cx->bt;
4965 struct rtw89_btc_bt_link_info *b = &bt->link_info;
4966 struct rtw89_btc_bt_hfp_desc *hfp = &b->hfp_desc;
4967 struct rtw89_btc_bt_hid_desc *hid = &b->hid_desc;
4968 struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
4969 struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
4970 struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
4971 struct rtw89_btc_wl_role_info_v8 *wl_rinfo_v8 = &wl->role_info_v8;
4978 if (btc->manual_ctrl)
4981 if (ver->fwlrole == 0)
4982 mode = wl_rinfo->link_mode;
4983 else if (ver->fwlrole == 1)
4984 mode = wl_rinfo_v1->link_mode;
4985 else if (ver->fwlrole == 2)
4986 mode = wl_rinfo_v2->link_mode;
4987 else if (ver->fwlrole == 8)
4988 mode = wl_rinfo_v8->link_mode;
4992 if (ver->fcxctrl == 7)
4993 igno_bt = btc->ctrl.ctrl_v7.igno_bt;
4995 igno_bt = btc->ctrl.ctrl.igno_bt;
4997 if (btc->dm.freerun || igno_bt || b->profile_cnt.now == 0 ||
5002 } else if ((hfp->exist && hid->exist) || hid->pair_cnt > 1) {
5006 } else if (hfp->exist || hid->exist) {
5016 if (dm->wl_tx_limit.enable == enable &&
5017 dm->wl_tx_limit.tx_time == tx_time &&
5018 dm->wl_tx_limit.tx_retry == tx_retry)
5021 if (!dm->wl_tx_limit.enable && enable)
5024 dm->wl_tx_limit.enable = enable;
5025 dm->wl_tx_limit.tx_time = tx_time;
5026 dm->wl_tx_limit.tx_retry = tx_retry;
5033 ieee80211_iterate_stations_atomic(rtwdev->hw,
5040 struct rtw89_btc *btc = &rtwdev->btc;
5041 const struct rtw89_btc_ver *ver = btc->ver;
5042 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5043 struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
5044 struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
5045 struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
5046 struct rtw89_btc_wl_role_info_v8 *wl_rinfo_v8 = &wl->role_info_v8;
5047 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
5051 if (ver->fwlrole == 0)
5052 mode = wl_rinfo->link_mode;
5053 else if (ver->fwlrole == 1)
5054 mode = wl_rinfo_v1->link_mode;
5055 else if (ver->fwlrole == 2)
5056 mode = wl_rinfo_v2->link_mode;
5057 else if (ver->fwlrole == 8)
5058 mode = wl_rinfo_v8->link_mode;
5062 if (mode != BTC_WLINK_NOLINK && btc->dm.wl_btg_rx)
5065 if (bt_hi_lna_rx == bt->hi_lna_rx)
5073 struct rtw89_btc *btc = &rtwdev->btc;
5074 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
5076 _write_scbd(rtwdev, BTC_WSCB_RXSCAN_PRI, (bool)(!!bt->scan_rx_low_pri));
5081 struct rtw89_btc *btc = &rtwdev->btc;
5082 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5083 struct rtw89_btc_wl_smap *wl_smap = &wl->status.map;
5084 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
5085 struct rtw89_btc_dm *dm = &btc->dm;
5096 bt_rom_code_id = chip_id_to_bt_rom_code_id(rtwdev->btc.ver->chip_id);
5097 bt_fw_ver = bt->ver_info.fw & 0xffff;
5098 if (bt->enable.now &&
5100 (bt_fw_ver == bt_rom_code_id && bt->run_patch_code && rtwdev->chip->scbd)))
5105 if (dm->run_reason == BTC_RSN_NTFY_INIT ||
5106 dm->run_reason == BTC_RSN_NTFY_RADIO_STATE ||
5107 dm->run_reason == BTC_RSN_NTFY_POWEROFF) {
5110 if (wl_smap->rf_off == 1 || wl_smap->lps != BTC_LPS_OFF)
5116 if (wl->scbd_change) {
5117 rtw89_mac_cfg_sb(rtwdev, wl->scbd);
5119 wl->scbd);
5120 wl->scbd_change = false;
5121 btc->cx.cnt_wl[BTC_WCNT_SCBDUPDATE]++;
5123 btc->dm.tdma_instant_excute = 0;
5128 struct rtw89_btc *btc = &rtwdev->btc;
5129 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
5130 struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info;
5131 struct rtw89_btc_bt_hid_desc hid = bt_linfo->hid_desc;
5132 struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc;
5133 struct rtw89_btc_bt_pan_desc pan = bt_linfo->pan_desc;
5136 if (bt_linfo->hfp_desc.exist)
5139 if (bt_linfo->hid_desc.exist)
5142 if (bt_linfo->a2dp_desc.exist)
5145 if (bt_linfo->pan_desc.exist)
5175 else if (bt_linfo->multi_link.now && !hid.pair_cnt)
5214 struct rtw89_btc *btc = &rtwdev->btc;
5217 if (btc->ant_type == BTC_ANT_SHARED) {
5218 if (btc->cx.wl.status.map._4way)
5220 else if (btc->cx.wl.status.val & btc_scanning_map.val)
5222 else if (btc->cx.bt.link_info.profile_cnt.now == 0)
5226 } else { /* dedicated-antenna */
5230 btc->dm.e2g_slot_limit = BTC_E2G_LIMIT_DEF;
5238 struct rtw89_btc *btc = &rtwdev->btc;
5239 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5240 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
5242 if (RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
5245 } else if (rtwdev->dbcc_en) {
5246 if (wl_dinfo->real_band[RTW89_PHY_0] != RTW89_BAND_2G &&
5247 wl_dinfo->real_band[RTW89_PHY_1] != RTW89_BAND_2G)
5252 if (wl->scan_info.band[RTW89_PHY_0] != RTW89_BAND_2G)
5260 { struct rtw89_btc *btc = &rtwdev->btc;
5264 if (btc->ant_type == BTC_ANT_SHARED) { /* shared-antenna */
5265 if (btc->cx.bt.link_info.profile_cnt.now == 0)
5271 } else { /* dedicated-antenna */
5278 struct rtw89_btc *btc = &rtwdev->btc;
5282 if (btc->ant_type == BTC_ANT_SHARED) { /* shared-antenna */
5283 if (btc->cx.bt.link_info.profile_cnt.now == 0)
5289 } else { /* dedicated-antenna */
5296 struct rtw89_btc *btc = &rtwdev->btc;
5297 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5298 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
5299 struct rtw89_btc_dm *dm = &btc->dm;
5300 struct rtw89_btc_wl_role_info_v1 *wl_rinfo = &wl->role_info_v1;
5304 if (btc->ant_type == BTC_ANT_DEDICATED) {
5307 /* shared-antenna */
5308 switch (wl_rinfo->mrole_type) {
5310 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5311 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_P2P_CLIENT;
5312 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5316 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5317 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_STATION;
5318 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5324 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5325 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_NONE;
5326 dur = wl_rinfo->mrole_noa_duration;
5328 if (wl->status.map._4way) {
5329 dm->wl_scc.ebt_null = 0;
5331 } else if (bt->link_info.status.map.connect == 0) {
5332 dm->wl_scc.ebt_null = 0;
5334 } else if (bt->link_info.a2dp_desc.exist &&
5335 dur < btc->bt_req_len) {
5336 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5338 } else if (bt->link_info.a2dp_desc.exist ||
5339 bt->link_info.pan_desc.exist) {
5340 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5343 dm->wl_scc.ebt_null = 0;
5358 struct rtw89_btc *btc = &rtwdev->btc;
5359 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5360 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
5361 struct rtw89_btc_dm *dm = &btc->dm;
5362 struct rtw89_btc_wl_role_info_v2 *wl_rinfo = &wl->role_info_v2;
5366 if (btc->ant_type == BTC_ANT_DEDICATED) {
5369 /* shared-antenna */
5370 switch (wl_rinfo->mrole_type) {
5372 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5373 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_P2P_CLIENT;
5374 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5378 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5379 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_STATION;
5380 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5386 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5387 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_NONE;
5388 dur = wl_rinfo->mrole_noa_duration;
5390 if (wl->status.map._4way) {
5391 dm->wl_scc.ebt_null = 0;
5393 } else if (bt->link_info.status.map.connect == 0) {
5394 dm->wl_scc.ebt_null = 0;
5396 } else if (bt->link_info.a2dp_desc.exist &&
5397 dur < btc->bt_req_len) {
5398 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5400 } else if (bt->link_info.a2dp_desc.exist ||
5401 bt->link_info.pan_desc.exist) {
5402 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5405 dm->wl_scc.ebt_null = 0;
5420 struct rtw89_btc *btc = &rtwdev->btc;
5421 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5422 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
5423 struct rtw89_btc_dm *dm = &btc->dm;
5426 if (btc->ant_type == BTC_ANT_SHARED) {
5427 if (wl->status.map._4way)
5429 else if (bt->link_info.status.map.connect == 0)
5437 dm->e2g_slot_limit = BTC_E2G_LIMIT_DEF;
5445 struct rtw89_btc *btc = &rtwdev->btc;
5449 if (btc->ant_type == BTC_ANT_SHARED) {
5450 if (btc->cx.bt.link_info.profile_cnt.now == 0)
5455 } else {/* dedicated-antenna */
5462 struct rtw89_btc *btc = &rtwdev->btc;
5466 if (btc->ant_type == BTC_ANT_SHARED) { /* shared-antenna */
5467 if (btc->cx.bt.link_info.profile_cnt.now == 0)
5473 } else { /* dedicated-antenna */
5480 struct rtw89_btc *btc = &rtwdev->btc;
5484 if (btc->ant_type == BTC_ANT_SHARED) { /* shared-antenna */
5486 } else {/* dedicated-antenna */
5493 struct rtw89_btc *btc = &rtwdev->btc;
5497 if (btc->ant_type == BTC_ANT_SHARED) { /* shared-antenna */
5498 if (btc->cx.bt.link_info.profile_cnt.now == 0)
5504 } else { /* dedicated-antenna */
5511 const struct rtw89_chip_info *chip = rtwdev->chip;
5512 struct rtw89_btc *btc = &rtwdev->btc;
5515 if (!chip->scbd)
5522 btc->cx.cnt_bt[BTC_BCNT_SCBDREAD]++;
5528 const struct rtw89_chip_info *chip = rtwdev->chip;
5529 struct rtw89_btc *btc = &rtwdev->btc;
5530 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5534 if (!chip->scbd)
5537 scbd_val = state ? wl->scbd | val : wl->scbd & ~val;
5542 if (scbd_val != wl->scbd || force_exec) {
5543 wl->scbd = scbd_val;
5544 wl->scbd_change = true;
5551 const struct rtw89_chip_info *chip = rtwdev->chip;
5552 u8 next_state, tol = chip->rssi_tol;
5573 struct rtw89_btc *btc = &rtwdev->btc;
5575 btc->cx.wl.dbcc_info.real_band[phy_idx] =
5576 btc->cx.wl.scan_info.phy_map & BIT(phy_idx) ?
5577 btc->cx.wl.dbcc_info.scan_band[phy_idx] :
5578 btc->cx.wl.dbcc_info.op_band[phy_idx];
5583 struct rtw89_btc *btc = &rtwdev->btc;
5584 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5585 struct rtw89_btc_wl_link_info *wl_linfo = wl->link_info;
5586 struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
5587 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
5601 wl_rinfo->active_role[cnt_active - 1].role = wl_linfo[i].role;
5602 wl_rinfo->active_role[cnt_active - 1].pid = wl_linfo[i].pid;
5603 wl_rinfo->active_role[cnt_active - 1].phy = wl_linfo[i].phy;
5604 wl_rinfo->active_role[cnt_active - 1].band = wl_linfo[i].band;
5605 wl_rinfo->active_role[cnt_active - 1].noa = (u8)wl_linfo[i].noa;
5606 wl_rinfo->active_role[cnt_active - 1].connected = 0;
5608 wl->port_id[wl_linfo[i].role] = wl_linfo[i].pid;
5613 if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) {
5614 wl_dinfo->role[phy] = wl_linfo[i].role;
5615 wl_dinfo->op_band[phy] = wl_linfo[i].band;
5632 wl_rinfo->role_map.val |= BIT(wl_linfo[i].role);
5633 wl_rinfo->active_role[cnt_active - 1].ch = wl_linfo[i].ch;
5634 wl_rinfo->active_role[cnt_active - 1].bw = wl_linfo[i].bw;
5635 wl_rinfo->active_role[cnt_active - 1].connected = 1;
5639 if (cnt_5g <= ARRAY_SIZE(wl_5g_ch) - 1)
5644 if (cnt_2g <= ARRAY_SIZE(wl_2g_ch) - 1)
5651 wl_rinfo->connect_cnt = cnt_connect;
5655 wl_rinfo->link_mode = BTC_WLINK_NOLINK;
5656 wl_rinfo->role_map.role.none = 1;
5658 wl_rinfo->link_mode = BTC_WLINK_5G;
5659 } else if (wl_rinfo->role_map.role.nan) {
5660 wl_rinfo->link_mode = BTC_WLINK_2G_NAN;
5662 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5664 if (rtwdev->dbcc_en) {
5665 switch (wl_dinfo->role[RTW89_PHY_0]) {
5667 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
5670 wl_rinfo->link_mode = BTC_WLINK_2G_GO;
5673 wl_rinfo->link_mode = BTC_WLINK_2G_GC;
5676 wl_rinfo->link_mode = BTC_WLINK_2G_AP;
5679 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5683 wl_rinfo->link_mode = BTC_WLINK_25G_MCC;
5686 if (wl_rinfo->role_map.role.station &&
5687 (wl_rinfo->role_map.role.p2p_go ||
5688 wl_rinfo->role_map.role.p2p_gc ||
5689 wl_rinfo->role_map.role.ap)) {
5691 wl_rinfo->link_mode = BTC_WLINK_2G_SCC;
5693 wl_rinfo->link_mode = BTC_WLINK_2G_MCC;
5695 wl_rinfo->link_mode = BTC_WLINK_2G_MCC;
5698 if (wl_rinfo->role_map.role.station)
5699 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
5700 else if (wl_rinfo->role_map.role.ap)
5701 wl_rinfo->link_mode = BTC_WLINK_2G_AP;
5702 else if (wl_rinfo->role_map.role.p2p_go)
5703 wl_rinfo->link_mode = BTC_WLINK_2G_GO;
5704 else if (wl_rinfo->role_map.role.p2p_gc)
5705 wl_rinfo->link_mode = BTC_WLINK_2G_GC;
5707 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5710 /* if no client_joined, don't care P2P-GO/AP role */
5711 if (wl_rinfo->role_map.role.p2p_go || wl_rinfo->role_map.role.ap) {
5713 if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC ||
5714 wl_rinfo->link_mode == BTC_WLINK_2G_MCC) {
5715 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
5716 wl_rinfo->connect_cnt = 1;
5717 } else if (wl_rinfo->link_mode == BTC_WLINK_2G_GO ||
5718 wl_rinfo->link_mode == BTC_WLINK_2G_AP) {
5719 wl_rinfo->link_mode = BTC_WLINK_NOLINK;
5720 wl_rinfo->connect_cnt = 0;
5727 cnt_connect, cnt_connecting, wl_rinfo->link_mode);
5734 struct rtw89_btc *btc = &rtwdev->btc;
5735 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5736 struct rtw89_btc_wl_link_info *wl_linfo = wl->link_info;
5737 struct rtw89_btc_wl_role_info_v1 *wl_rinfo = &wl->role_info_v1;
5738 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
5752 wl_rinfo->active_role_v1[cnt_active - 1].role = wl_linfo[i].role;
5753 wl_rinfo->active_role_v1[cnt_active - 1].pid = wl_linfo[i].pid;
5754 wl_rinfo->active_role_v1[cnt_active - 1].phy = wl_linfo[i].phy;
5755 wl_rinfo->active_role_v1[cnt_active - 1].band = wl_linfo[i].band;
5756 wl_rinfo->active_role_v1[cnt_active - 1].noa = (u8)wl_linfo[i].noa;
5757 wl_rinfo->active_role_v1[cnt_active - 1].connected = 0;
5759 wl->port_id[wl_linfo[i].role] = wl_linfo[i].pid;
5763 if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) {
5764 wl_dinfo->role[phy] = wl_linfo[i].role;
5765 wl_dinfo->op_band[phy] = wl_linfo[i].band;
5782 wl_rinfo->role_map.val |= BIT(wl_linfo[i].role);
5783 wl_rinfo->active_role_v1[cnt_active - 1].ch = wl_linfo[i].ch;
5784 wl_rinfo->active_role_v1[cnt_active - 1].bw = wl_linfo[i].bw;
5785 wl_rinfo->active_role_v1[cnt_active - 1].connected = 1;
5789 if (cnt_5g <= ARRAY_SIZE(wl_5g_ch) - 1)
5794 if (cnt_2g <= ARRAY_SIZE(wl_2g_ch) - 1)
5801 wl_rinfo->connect_cnt = cnt_connect;
5805 wl_rinfo->link_mode = BTC_WLINK_NOLINK;
5806 wl_rinfo->role_map.role.none = 1;
5808 wl_rinfo->link_mode = BTC_WLINK_5G;
5809 } else if (wl_rinfo->role_map.role.nan) {
5810 wl_rinfo->link_mode = BTC_WLINK_2G_NAN;
5812 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5814 if (rtwdev->dbcc_en) {
5815 switch (wl_dinfo->role[RTW89_PHY_0]) {
5817 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
5820 wl_rinfo->link_mode = BTC_WLINK_2G_GO;
5823 wl_rinfo->link_mode = BTC_WLINK_2G_GC;
5826 wl_rinfo->link_mode = BTC_WLINK_2G_AP;
5829 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5833 wl_rinfo->link_mode = BTC_WLINK_25G_MCC;
5836 if (wl_rinfo->role_map.role.station &&
5837 (wl_rinfo->role_map.role.p2p_go ||
5838 wl_rinfo->role_map.role.p2p_gc ||
5839 wl_rinfo->role_map.role.ap)) {
5841 wl_rinfo->link_mode = BTC_WLINK_2G_SCC;
5843 wl_rinfo->link_mode = BTC_WLINK_2G_MCC;
5845 wl_rinfo->link_mode = BTC_WLINK_2G_MCC;
5848 if (wl_rinfo->role_map.role.station)
5849 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
5850 else if (wl_rinfo->role_map.role.ap)
5851 wl_rinfo->link_mode = BTC_WLINK_2G_AP;
5852 else if (wl_rinfo->role_map.role.p2p_go)
5853 wl_rinfo->link_mode = BTC_WLINK_2G_GO;
5854 else if (wl_rinfo->role_map.role.p2p_gc)
5855 wl_rinfo->link_mode = BTC_WLINK_2G_GC;
5857 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5860 /* if no client_joined, don't care P2P-GO/AP role */
5861 if (wl_rinfo->role_map.role.p2p_go || wl_rinfo->role_map.role.ap) {
5863 if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC ||
5864 wl_rinfo->link_mode == BTC_WLINK_2G_MCC) {
5865 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
5866 wl_rinfo->connect_cnt = 1;
5867 } else if (wl_rinfo->link_mode == BTC_WLINK_2G_GO ||
5868 wl_rinfo->link_mode == BTC_WLINK_2G_AP) {
5869 wl_rinfo->link_mode = BTC_WLINK_NOLINK;
5870 wl_rinfo->connect_cnt = 0;
5877 cnt_connect, cnt_connecting, wl_rinfo->link_mode);
5884 struct rtw89_btc *btc = &rtwdev->btc;
5885 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
5886 struct rtw89_btc_wl_link_info *wl_linfo = wl->link_info;
5887 struct rtw89_btc_wl_role_info_v2 *wl_rinfo = &wl->role_info_v2;
5888 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
5902 wl_rinfo->active_role_v2[cnt_active - 1].role = wl_linfo[i].role;
5903 wl_rinfo->active_role_v2[cnt_active - 1].pid = wl_linfo[i].pid;
5904 wl_rinfo->active_role_v2[cnt_active - 1].phy = wl_linfo[i].phy;
5905 wl_rinfo->active_role_v2[cnt_active - 1].band = wl_linfo[i].band;
5906 wl_rinfo->active_role_v2[cnt_active - 1].noa = (u8)wl_linfo[i].noa;
5907 wl_rinfo->active_role_v2[cnt_active - 1].connected = 0;
5909 wl->port_id[wl_linfo[i].role] = wl_linfo[i].pid;
5913 if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) {
5914 wl_dinfo->role[phy] = wl_linfo[i].role;
5915 wl_dinfo->op_band[phy] = wl_linfo[i].band;
5932 wl_rinfo->role_map.val |= BIT(wl_linfo[i].role);
5933 wl_rinfo->active_role_v2[cnt_active - 1].ch = wl_linfo[i].ch;
5934 wl_rinfo->active_role_v2[cnt_active - 1].bw = wl_linfo[i].bw;
5935 wl_rinfo->active_role_v2[cnt_active - 1].connected = 1;
5939 if (cnt_5g <= ARRAY_SIZE(wl_5g_ch) - 1)
5944 if (cnt_2g <= ARRAY_SIZE(wl_2g_ch) - 1)
5951 wl_rinfo->connect_cnt = cnt_connect;
5955 wl_rinfo->link_mode = BTC_WLINK_NOLINK;
5956 wl_rinfo->role_map.role.none = 1;
5958 wl_rinfo->link_mode = BTC_WLINK_5G;
5959 } else if (wl_rinfo->role_map.role.nan) {
5960 wl_rinfo->link_mode = BTC_WLINK_2G_NAN;
5962 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5964 if (rtwdev->dbcc_en) {
5965 switch (wl_dinfo->role[RTW89_PHY_0]) {
5967 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
5970 wl_rinfo->link_mode = BTC_WLINK_2G_GO;
5973 wl_rinfo->link_mode = BTC_WLINK_2G_GC;
5976 wl_rinfo->link_mode = BTC_WLINK_2G_AP;
5979 wl_rinfo->link_mode = BTC_WLINK_OTHER;
5983 wl_rinfo->link_mode = BTC_WLINK_25G_MCC;
5986 if (wl_rinfo->role_map.role.station &&
5987 (wl_rinfo->role_map.role.p2p_go ||
5988 wl_rinfo->role_map.role.p2p_gc ||
5989 wl_rinfo->role_map.role.ap)) {
5991 wl_rinfo->link_mode = BTC_WLINK_2G_SCC;
5993 wl_rinfo->link_mode = BTC_WLINK_2G_MCC;
5995 wl_rinfo->link_mode = BTC_WLINK_2G_MCC;
5998 if (wl_rinfo->role_map.role.station)
5999 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
6000 else if (wl_rinfo->role_map.role.ap)
6001 wl_rinfo->link_mode = BTC_WLINK_2G_AP;
6002 else if (wl_rinfo->role_map.role.p2p_go)
6003 wl_rinfo->link_mode = BTC_WLINK_2G_GO;
6004 else if (wl_rinfo->role_map.role.p2p_gc)
6005 wl_rinfo->link_mode = BTC_WLINK_2G_GC;
6007 wl_rinfo->link_mode = BTC_WLINK_OTHER;
6010 /* if no client_joined, don't care P2P-GO/AP role */
6011 if (wl_rinfo->role_map.role.p2p_go || wl_rinfo->role_map.role.ap) {
6013 if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC ||
6014 wl_rinfo->link_mode == BTC_WLINK_2G_MCC) {
6015 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
6016 wl_rinfo->connect_cnt = 1;
6017 } else if (wl_rinfo->link_mode == BTC_WLINK_2G_GO ||
6018 wl_rinfo->link_mode == BTC_WLINK_2G_AP) {
6019 wl_rinfo->link_mode = BTC_WLINK_NOLINK;
6020 wl_rinfo->connect_cnt = 0;
6027 cnt_connect, cnt_connecting, wl_rinfo->link_mode);
6054 if (r1->chan != r2->chan) { /* primary ch is different */
6056 } else if (r1->bw == RTW89_CHANNEL_WIDTH_40 &&
6057 r2->bw == RTW89_CHANNEL_WIDTH_40) {
6058 if (r1->offset != r2->offset)
6067 struct rtw89_btc_wl_info *wl = &rtwdev->btc.cx.wl;
6068 struct rtw89_btc_wl_role_info_v8 *wl_rinfo = &wl->role_info_v8;
6072 /* find out the 2G-PHY by connect-id ->ch */
6073 for (j = 0; j < wl_rinfo->connect_cnt; j++) {
6080 /* If no any 2G-port exist, it's impossible because 5G-exclude */
6088 if (wl_rinfo->connect_cnt < BTC_TDMA_WLROLE_MAX)
6091 /* find the other-port in the 2G-PHY, ex: PHY-0:6G, PHY1: mcc/scc */
6092 for (k = 0; k < wl_rinfo->connect_cnt; k++) {
6103 /* Single-role in 2G-PHY */
6107 /* 2-role in 2G-PHY */
6119 struct rtw89_btc_wl_role_info_v8 *wl_rinfo = &rtwdev->btc.cx.wl.role_info_v8;
6121 u32 wl_role = wl_rinfo->role_map;
6123 /* if no client_joined, don't care P2P-GO/AP role */
6126 if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC) {
6127 wl_rinfo->link_mode = BTC_WLINK_2G_STA;
6128 wl_rinfo->connect_cnt--;
6129 } else if (wl_rinfo->link_mode == BTC_WLINK_2G_GO ||
6130 wl_rinfo->link_mode == BTC_WLINK_2G_AP) {
6131 wl_rinfo->link_mode = BTC_WLINK_NOLINK;
6132 wl_rinfo->connect_cnt--;
6136 /* Identify 2-Role type */
6137 if (wl_rinfo->connect_cnt >= 2 &&
6138 (wl_rinfo->link_mode == BTC_WLINK_2G_SCC ||
6139 wl_rinfo->link_mode == BTC_WLINK_2G_MCC ||
6140 wl_rinfo->link_mode == BTC_WLINK_25G_MCC ||
6141 wl_rinfo->link_mode == BTC_WLINK_5G)) {
6153 wl_rinfo->mrole_type = type;
6154 wl_rinfo->mrole_noa_duration = dur;
6160 struct rtw89_btc *btc = &rtwdev->btc;
6161 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6163 struct rtw89_btc_wl_role_info_v8 *wl_rinfo = &wl->role_info_v8;
6164 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
6179 /* Extract wl->link_info[role_id][rlink_id] to wl->role_info
6181 * rlink_id: rlink index (= HW-band index)
6185 wl_linfo = &wl->rlink_info[role_id][rlink_id];
6186 if (wl_linfo->connected == MLME_LINKING)
6189 rlink = &wl_rinfo->rlink[role_id][rlink_id];
6190 rlink->role = wl_linfo->role;
6191 rlink->active = wl_linfo->active; /* Doze or not */
6192 rlink->pid = wl_linfo->pid;
6193 rlink->phy = wl_linfo->phy;
6194 rlink->rf_band = wl_linfo->band;
6195 rlink->ch = wl_linfo->ch;
6196 rlink->bw = wl_linfo->bw;
6197 rlink->noa = wl_linfo->noa;
6198 rlink->noa_dur = wl_linfo->noa_duration / 1000;
6199 rlink->client_cnt = wl_linfo->client_cnt;
6200 rlink->mode = wl_linfo->mode;
6202 switch (wl_linfo->connected) {
6204 rlink->connected = 0;
6205 if (rlink->role == RTW89_WIFI_ROLE_STATION)
6206 btc->dm.leak_ap = 0;
6209 rlink->connected = 1;
6215 wl->is_5g_hi_channel = false;
6216 wl->bg_mode = false;
6217 wl_rinfo->role_map = 0;
6218 wl_rinfo->p2p_2g = 0;
6223 rlink = &wl_rinfo->rlink[i][j];
6225 if (!rlink->active || !rlink->connected)
6229 wl_rinfo->role_map |= BIT(rlink->role);
6231 /* only if client connect for p2p-Go/AP */
6232 if ((rlink->role == RTW89_WIFI_ROLE_P2P_GO ||
6233 rlink->role == RTW89_WIFI_ROLE_AP) &&
6234 rlink->client_cnt > 1)
6237 /* Identufy if P2P-Go (GO/GC/AP) exist at 2G band*/
6238 if (rlink->rf_band == RTW89_BAND_2G &&
6239 (client_joined || rlink->role == RTW89_WIFI_ROLE_P2P_CLIENT))
6240 wl_rinfo->p2p_2g = 1;
6242 /* only one noa-role exist */
6243 if (rlink->noa && rlink->noa_dur > 0)
6244 noa_dur = rlink->noa_dur;
6246 /* for WL 5G-Rx interfered with BT issue */
6247 if (rlink->rf_band == RTW89_BAND_5G && rlink->ch >= 100)
6248 wl->is_5g_hi_channel = 1;
6250 if ((rlink->mode & BIT(BTC_WL_MODE_11B)) ||
6251 (rlink->mode & BIT(BTC_WL_MODE_11G)))
6252 wl->bg_mode = 1;
6254 if (rtwdev->chip->para_ver & BTC_FEAT_MLO_SUPPORT)
6257 cid_ch[cnt - 1] = wl_linfo->chdef;
6258 cid_phy[cnt - 1] = rlink->phy;
6259 cid_role[cnt - 1] = rlink->role;
6261 if (rlink->rf_band != RTW89_BAND_2G) {
6271 if (rtwdev->chip->para_ver & BTC_FEAT_MLO_SUPPORT) {
6276 dbcc_en = rtwdev->dbcc_en;
6283 } else if (wl_rinfo->role_map & BIT(RTW89_WIFI_ROLE_NAN)) {
6293 if (_chk_role_ch_group(&cid_ch[0], &cid_ch[cnt - 1]))
6302 wl_rinfo->link_mode = mode;
6303 wl_rinfo->connect_cnt = cnt;
6304 if (wl_rinfo->connect_cnt == 0)
6305 wl_rinfo->role_map = BIT(RTW89_WIFI_ROLE_NONE);
6308 wl_rinfo->dbcc_2g_phy = dbcc_2g_phy;
6309 if (wl_rinfo->dbcc_en != dbcc_en) {
6310 wl_rinfo->dbcc_en = dbcc_en;
6311 wl_rinfo->dbcc_chg = 1;
6312 btc->cx.cnt_wl[BTC_WCNT_DBCC_CHG]++;
6314 wl_rinfo->dbcc_chg = 0;
6317 if (wl_rinfo->dbcc_en) {
6322 wl_dinfo->op_band[RTW89_PHY_0] = RTW89_BAND_5G;
6323 wl_dinfo->op_band[RTW89_PHY_1] = RTW89_BAND_2G;
6324 } else if (wl_rinfo->dbcc_2g_phy == RTW89_PHY_1) {
6326 wl_dinfo->op_band[RTW89_PHY_0] = RTW89_BAND_5G;
6327 wl_dinfo->op_band[RTW89_PHY_1] = RTW89_BAND_2G;
6330 wl_dinfo->op_band[RTW89_PHY_0] = RTW89_BAND_2G;
6331 wl_dinfo->op_band[RTW89_PHY_1] = RTW89_BAND_5G;
6337 wl_rinfo->pta_req_band = pta_req_band;
6345 struct rtw89_btc *btc = &rtwdev->btc;
6346 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6347 struct rtw89_btc_cx *cx = &btc->cx;
6348 struct rtw89_btc_wl_info *wl = &cx->wl;
6350 mutex_lock(&rtwdev->mutex);
6352 dm->cnt_notify[BTC_NCNT_TIMER]++;
6353 if (wl->status.map._4way)
6354 wl->status.map._4way = false;
6355 if (wl->status.map.connecting)
6356 wl->status.map.connecting = false;
6359 mutex_unlock(&rtwdev->mutex);
6366 struct rtw89_btc *btc = &rtwdev->btc;
6367 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6368 struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc;
6370 mutex_lock(&rtwdev->mutex);
6372 dm->cnt_notify[BTC_NCNT_TIMER]++;
6373 a2dp->play_latency = 0;
6375 mutex_unlock(&rtwdev->mutex);
6382 struct rtw89_btc *btc = &rtwdev->btc;
6383 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6384 struct rtw89_btc_cx *cx = &btc->cx;
6385 struct rtw89_btc_wl_info *wl = &cx->wl;
6387 mutex_lock(&rtwdev->mutex);
6389 dm->cnt_notify[BTC_NCNT_TIMER]++;
6390 if (wl->rfk_info.state != BTC_WRFK_STOP) {
6393 cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]++;
6394 dm->error.map.wl_rfk_timeout = true;
6395 wl->rfk_info.state = BTC_WRFK_STOP;
6399 mutex_unlock(&rtwdev->mutex);
6404 const struct rtw89_chip_info *chip = rtwdev->chip;
6405 struct rtw89_btc *btc = &rtwdev->btc;
6406 struct rtw89_btc_cx *cx = &btc->cx;
6407 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
6411 if (!chip->scbd)
6425 bt->enable.now = 0;
6427 bt->enable.now = 1;
6429 if (bt->enable.now != bt->enable.last)
6432 /* reset bt info if bt re-enable */
6433 if (bt->enable.now && !bt->enable.last) {
6435 cx->cnt_bt[BTC_BCNT_REENABLE]++;
6436 bt->enable.now = 1;
6439 bt->enable.last = bt->enable.now;
6440 bt->scbd = val;
6441 bt->mbx_avl = !!(val & BTC_BSCB_ACT);
6443 if (bt->whql_test != !!(val & BTC_BSCB_WHQL))
6446 bt->whql_test = !!(val & BTC_BSCB_WHQL);
6447 bt->btg_type = val & BTC_BSCB_BT_S1 ? BTC_BT_BTG : BTC_BT_ALONE;
6448 bt->link_info.a2dp_desc.exist = !!(val & BTC_BSCB_A2DP_ACT);
6450 bt->lna_constrain = !!(val & BTC_BSCB_BT_LNAB0) +
6453 /* if rfk run 1->0 */
6454 if (bt->rfk_info.map.run && !(val & BTC_BSCB_RFK_RUN))
6457 bt->rfk_info.map.run = !!(val & BTC_BSCB_RFK_RUN);
6458 bt->rfk_info.map.req = !!(val & BTC_BSCB_RFK_REQ);
6459 bt->hi_lna_rx = !!(val & BTC_BSCB_BT_HILNA);
6460 bt->link_info.status.map.connect = !!(val & BTC_BSCB_BT_CONNECT);
6461 bt->run_patch_code = !!(val & BTC_BSCB_PATCH_CODE);
6469 struct rtw89_btc *btc = &rtwdev->btc;
6470 struct rtw89_btc_cx *cx = &btc->cx;
6471 struct rtw89_btc_bt_info *bt = &cx->bt;
6475 cx->cnt_wl[BTC_WCNT_RFK_REQ]++;
6477 if ((bt->rfk_info.map.run || bt->rfk_info.map.req) &&
6478 !bt->rfk_info.map.timeout) {
6479 cx->cnt_wl[BTC_WCNT_RFK_REJECT]++;
6481 cx->cnt_wl[BTC_WCNT_RFK_GO]++;
6490 struct rtw89_btc *btc = &rtwdev->btc;
6491 const struct rtw89_btc_ver *ver = btc->ver;
6492 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6493 struct rtw89_btc_cx *cx = &btc->cx;
6494 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6495 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
6496 struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
6497 struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
6498 struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
6499 struct rtw89_btc_wl_role_info_v8 *wl_rinfo_v8 = &wl->role_info_v8;
6502 lockdep_assert_held(&rtwdev->mutex);
6504 dm->run_reason = reason;
6508 if (ver->fwlrole == 0)
6509 mode = wl_rinfo->link_mode;
6510 else if (ver->fwlrole == 1)
6511 mode = wl_rinfo_v1->link_mode;
6512 else if (ver->fwlrole == 2)
6513 mode = wl_rinfo_v2->link_mode;
6514 else if (ver->fwlrole == 8)
6515 mode = wl_rinfo_v8->link_mode;
6519 if (ver->fcxctrl == 7) {
6520 igno_bt = btc->ctrl.ctrl_v7.igno_bt;
6521 always_freerun = btc->ctrl.ctrl_v7.always_freerun;
6523 igno_bt = btc->ctrl.ctrl.igno_bt;
6524 always_freerun = btc->ctrl.ctrl.always_freerun;
6530 __func__, dm->wl_only, dm->bt_only);
6533 if (btc->manual_ctrl) {
6535 "[BTC], %s(): return for Manual CTRL!!\n",
6549 if (!wl->status.map.init_ok) {
6556 if (wl->status.map.rf_off_pre == wl->status.map.rf_off &&
6557 wl->status.map.lps_pre == wl->status.map.lps) {
6565 if (wl->status.map.rf_off == 1 ||
6566 wl->status.map.lps == BTC_LPS_RF_OFF) {
6574 dm->freerun = false;
6575 dm->cnt_dm[BTC_DCNT_RUN]++;
6576 dm->fddt_train = BTC_FDDT_DISABLE;
6577 bt->scan_rx_low_pri = false;
6586 if (dm->wl_only) {
6592 if (wl->status.map.rf_off || wl->status.map.lps || dm->bt_only) {
6603 if (!cx->bt.enable.now && !cx->other.type) {
6608 if (cx->bt.whql_test) {
6613 if (wl->rfk_info.state != BTC_WRFK_STOP) {
6618 if (cx->state_map == BTC_WLINKING) {
6622 bt->scan_rx_low_pri = false;
6627 if (wl->status.map.scan) {
6629 bt->scan_rx_low_pri = false;
6638 if (wl->status.map.traffic_dir & BIT(RTW89_TFC_DL))
6639 bt->scan_rx_low_pri = true;
6643 bt->scan_rx_low_pri = true;
6647 bt->scan_rx_low_pri = true;
6651 bt->scan_rx_low_pri = true;
6655 bt->scan_rx_low_pri = true;
6656 if (ver->fwlrole == 0)
6658 else if (ver->fwlrole == 1)
6660 else if (ver->fwlrole == 2)
6662 else if (ver->fwlrole == 8)
6666 bt->scan_rx_low_pri = true;
6670 bt->scan_rx_low_pri = true;
6686 if (ver->fcxctrl == 7)
6687 btc->ctrl.ctrl_v7.igno_bt = igno_bt;
6689 btc->ctrl.ctrl.igno_bt = igno_bt;
6695 struct rtw89_btc *btc = &rtwdev->btc;
6698 btc->dm.cnt_notify[BTC_NCNT_POWER_ON]++;
6703 struct rtw89_btc *btc = &rtwdev->btc;
6704 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6707 btc->dm.cnt_notify[BTC_NCNT_POWER_OFF]++;
6709 btc->cx.wl.status.map.rf_off = 1;
6710 btc->cx.wl.status.map.busy = 0;
6711 wl->status.map.lps = BTC_LPS_OFF;
6718 btc->cx.wl.status.map.rf_off_pre = btc->cx.wl.status.map.rf_off;
6723 const struct rtw89_chip_info *chip = rtwdev->chip;
6724 struct rtw89_btc *btc = &rtwdev->btc;
6725 const struct rtw89_btc_ver *ver = btc->ver;
6726 struct rtw89_btc_dm *dm = &btc->dm;
6727 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6729 if (ver->fcxinit == 7) {
6730 dm->init_info.init_v7.wl_only = (u8)dm->wl_only;
6731 dm->init_info.init_v7.bt_only = (u8)dm->bt_only;
6732 dm->init_info.init_v7.wl_init_ok = (u8)wl->status.map.init_ok;
6733 dm->init_info.init_v7.cx_other = btc->cx.other.type;
6734 dm->init_info.init_v7.wl_guard_ch = chip->afh_guard_ch;
6735 dm->init_info.init_v7.module = btc->mdinfo.md_v7;
6737 dm->init_info.init.wl_only = (u8)dm->wl_only;
6738 dm->init_info.init.bt_only = (u8)dm->bt_only;
6739 dm->init_info.init.wl_init_ok = (u8)wl->status.map.init_ok;
6740 dm->init_info.init.dbcc_en = rtwdev->dbcc_en;
6741 dm->init_info.init.cx_other = btc->cx.other.type;
6742 dm->init_info.init.wl_guard_ch = chip->afh_guard_ch;
6743 dm->init_info.init.module = btc->mdinfo.md;
6749 struct rtw89_btc *btc = &rtwdev->btc;
6750 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6751 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6752 const struct rtw89_chip_info *chip = rtwdev->chip;
6753 const struct rtw89_btc_ver *ver = btc->ver;
6756 btc->dm.run_reason = BTC_RSN_NONE;
6757 btc->dm.run_action = BTC_ACT_NONE;
6758 if (ver->fcxctrl == 7)
6759 btc->ctrl.ctrl_v7.igno_bt = true;
6761 btc->ctrl.ctrl.igno_bt = true;
6766 wl->coex_mode = mode;
6767 dm->cnt_notify[BTC_NCNT_INIT_COEX]++;
6768 dm->wl_only = mode == BTC_MODE_WL ? 1 : 0;
6769 dm->bt_only = mode == BTC_MODE_BT ? 1 : 0;
6770 wl->status.map.rf_off = mode == BTC_MODE_WLOFF ? 1 : 0;
6772 chip->ops->btc_set_rfe(rtwdev);
6773 chip->ops->btc_init_cfg(rtwdev);
6775 if (!wl->status.map.init_ok) {
6779 dm->error.map.init = true;
6790 dm->error.map.pta_owner = true;
6805 struct rtw89_btc *btc = &rtwdev->btc;
6806 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6815 btc->dm.cnt_notify[BTC_NCNT_SCAN_START]++;
6816 wl->status.map.scan = true;
6817 wl->scan_info.band[phy_idx] = band;
6818 wl->scan_info.phy_map |= BIT(phy_idx);
6821 if (rtwdev->dbcc_en) {
6822 wl->dbcc_info.scan_band[phy_idx] = band;
6832 struct rtw89_btc *btc = &rtwdev->btc;
6833 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6837 btc->dm.cnt_notify[BTC_NCNT_SCAN_FINISH]++;
6839 wl->status.map.scan = false;
6840 wl->scan_info.phy_map &= ~BIT(phy_idx);
6843 if (rtwdev->dbcc_en) {
6853 struct rtw89_btc *btc = &rtwdev->btc;
6854 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
6863 btc->dm.cnt_notify[BTC_NCNT_SWITCH_BAND]++;
6865 wl->scan_info.band[phy_idx] = band;
6866 wl->scan_info.phy_map |= BIT(phy_idx);
6869 if (rtwdev->dbcc_en) {
6870 wl->dbcc_info.scan_band[phy_idx] = band;
6880 struct rtw89_btc *btc = &rtwdev->btc;
6881 struct rtw89_btc_cx *cx = &btc->cx;
6882 struct rtw89_btc_wl_info *wl = &cx->wl;
6883 struct rtw89_btc_bt_link_info *b = &cx->bt.link_info;
6884 struct rtw89_btc_bt_hfp_desc *hfp = &b->hfp_desc;
6885 struct rtw89_btc_bt_hid_desc *hid = &b->hid_desc;
6892 cnt = ++cx->cnt_wl[BTC_WCNT_DHCP];
6895 wl->status.map.connecting = true;
6899 cnt = ++cx->cnt_wl[BTC_WCNT_EAPOL];
6902 wl->status.map._4way = true;
6904 if (hfp->exist || hid->exist)
6908 cnt = ++cx->cnt_wl[BTC_WCNT_EAPOL];
6912 wl->status.map._4way = false;
6913 cancel_delayed_work(&rtwdev->coex_act1_work);
6916 cnt = ++cx->cnt_wl[BTC_WCNT_ARP];
6932 cancel_delayed_work(&rtwdev->coex_act1_work);
6933 ieee80211_queue_delayed_work(rtwdev->hw,
6934 &rtwdev->coex_act1_work, delay);
6937 btc->dm.cnt_notify[BTC_NCNT_SPECIAL_PACKET]++;
6946 mutex_lock(&rtwdev->mutex);
6949 mutex_unlock(&rtwdev->mutex);
6957 mutex_lock(&rtwdev->mutex);
6959 mutex_unlock(&rtwdev->mutex);
6967 mutex_lock(&rtwdev->mutex);
6970 mutex_unlock(&rtwdev->mutex);
6978 mutex_lock(&rtwdev->mutex);
6981 mutex_unlock(&rtwdev->mutex);
6986 const struct rtw89_chip_info *chip = rtwdev->chip;
6987 struct rtw89_btc *btc = &rtwdev->btc;
6988 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
6993 * if rssi >= 40% (-60dBm) --> rssi_level = 4
6994 * if 36% <= rssi < 40% --> rssi_level = 3
6995 * if 31% <= rssi < 36% --> rssi_level = 2
6996 * if 28% <= rssi < 31% --> rssi_level = 1
6997 * if rssi < 28% --> rssi_level = 0
7002 rssi_th = chip->bt_rssi_thres[i];
7003 rssi_st = &bt->link_info.rssi_state[i];
7008 rssi_level = BTC_BT_RSSI_THMAX - i;
7017 u8 mode = rtwdev->btc.cx.wl.role_info.link_mode;
7020 if (mode == BTC_WLINK_5G || rtwdev->btc.dm.freerun) {
7035 const struct rtw89_chip_info *chip = rtwdev->chip;
7036 struct rtw89_btc *btc = &rtwdev->btc;
7037 struct rtw89_btc_cx *cx = &btc->cx;
7038 struct rtw89_btc_bt_info *bt = &cx->bt;
7039 struct rtw89_btc_bt_link_info *b = &bt->link_info;
7040 struct rtw89_btc_bt_hfp_desc *hfp = &b->hfp_desc;
7041 struct rtw89_btc_bt_hid_desc *hid = &b->hid_desc;
7042 struct rtw89_btc_bt_a2dp_desc *a2dp = &b->a2dp_desc;
7043 struct rtw89_btc_bt_pan_desc *pan = &b->pan_desc;
7049 if (!memcmp(bt->raw_info, buf, BTC_BTINFO_MAX)) {
7051 "[BTC], %s(): return by bt-info duplicate!!\n",
7053 cx->cnt_bt[BTC_BCNT_INFOSAME]++;
7057 memcpy(bt->raw_info, buf, BTC_BTINFO_MAX);
7061 __func__, bt->raw_info[2]);
7063 /* reset to mo-connect before update */
7064 b->status.val = BTC_BLINK_NOCONNECT;
7065 b->profile_cnt.last = b->profile_cnt.now;
7066 b->relink.last = b->relink.now;
7067 a2dp->exist_last = a2dp->exist;
7068 b->multi_link.last = b->multi_link.now;
7069 bt->inq_pag.last = bt->inq_pag.now;
7070 b->profile_cnt.now = 0;
7071 hid->type = 0;
7073 /* parse raw info low-Byte2 */
7074 btinfo.val = bt->raw_info[BTC_BTINFO_L2];
7075 b->status.map.connect = btinfo.lb2.connect;
7076 b->status.map.sco_busy = btinfo.lb2.sco_busy;
7077 b->status.map.acl_busy = btinfo.lb2.acl_busy;
7078 b->status.map.inq_pag = btinfo.lb2.inq_pag;
7079 bt->inq_pag.now = btinfo.lb2.inq_pag;
7080 cx->cnt_bt[BTC_BCNT_INQPAG] += !!(bt->inq_pag.now && !bt->inq_pag.last);
7082 hfp->exist = btinfo.lb2.hfp;
7083 b->profile_cnt.now += (u8)hfp->exist;
7084 hid->exist = btinfo.lb2.hid;
7085 b->profile_cnt.now += (u8)hid->exist;
7086 a2dp->exist = btinfo.lb2.a2dp;
7087 b->profile_cnt.now += (u8)a2dp->exist;
7088 pan->active = btinfo.lb2.pan;
7089 btc->dm.trx_info.bt_profile = u32_get_bits(btinfo.val, BT_PROFILE_PROTOCOL_MASK);
7091 /* parse raw info low-Byte3 */
7092 btinfo.val = bt->raw_info[BTC_BTINFO_L3];
7094 cx->cnt_bt[BTC_BCNT_RETRY]++;
7095 b->cqddr = btinfo.lb3.cqddr;
7096 cx->cnt_bt[BTC_BCNT_INQ] += !!(btinfo.lb3.inq && !bt->inq);
7097 bt->inq = btinfo.lb3.inq;
7098 cx->cnt_bt[BTC_BCNT_PAGE] += !!(btinfo.lb3.pag && !bt->pag);
7099 bt->pag = btinfo.lb3.pag;
7101 b->status.map.mesh_busy = btinfo.lb3.mesh_busy;
7102 /* parse raw info high-Byte0 */
7103 btinfo.val = bt->raw_info[BTC_BTINFO_H0];
7104 /* raw val is dBm unit, translate from -100~ 0dBm to 0~100%*/
7105 b->rssi = chip->ops->btc_get_bt_rssi(rtwdev, btinfo.hb0.rssi);
7106 bt->rssi_level = _update_bt_rssi_level(rtwdev, b->rssi);
7107 btc->dm.trx_info.bt_rssi = bt->rssi_level;
7109 /* parse raw info high-Byte1 */
7110 btinfo.val = bt->raw_info[BTC_BTINFO_H1];
7111 b->status.map.ble_connect = btinfo.hb1.ble_connect;
7113 hid->type |= (hid->exist ? BTC_HID_BLE : BTC_HID_RCU);
7115 cx->cnt_bt[BTC_BCNT_REINIT] += !!(btinfo.hb1.reinit && !bt->reinit);
7116 bt->reinit = btinfo.hb1.reinit;
7117 cx->cnt_bt[BTC_BCNT_RELINK] += !!(btinfo.hb1.relink && !b->relink.now);
7118 b->relink.now = btinfo.hb1.relink;
7119 cx->cnt_bt[BTC_BCNT_IGNOWL] += !!(btinfo.hb1.igno_wl && !bt->igno_wl);
7120 bt->igno_wl = btinfo.hb1.igno_wl;
7122 if (bt->igno_wl && !cx->wl.status.map.rf_off)
7125 hid->type |= (btinfo.hb1.voice ? BTC_HID_RCU_VOICE : 0);
7126 bt->ble_scan_en = btinfo.hb1.ble_scan;
7128 cx->cnt_bt[BTC_BCNT_ROLESW] += !!(btinfo.hb1.role_sw && !b->role_sw);
7129 b->role_sw = btinfo.hb1.role_sw;
7131 b->multi_link.now = btinfo.hb1.multi_link;
7133 /* parse raw info high-Byte2 */
7134 btinfo.val = bt->raw_info[BTC_BTINFO_H2];
7135 pan->exist = btinfo.hb2.pan_active;
7136 b->profile_cnt.now += (u8)pan->exist;
7138 cx->cnt_bt[BTC_BCNT_AFH] += !!(btinfo.hb2.afh_update && !b->afh_update);
7139 b->afh_update = btinfo.hb2.afh_update;
7140 a2dp->active = btinfo.hb2.a2dp_active;
7141 b->slave_role = btinfo.hb2.slave;
7142 hid->slot_info = btinfo.hb2.hid_slot;
7143 hid->pair_cnt = btinfo.hb2.hid_cnt;
7144 hid->type |= (hid->slot_info == BTC_HID_218 ?
7146 /* parse raw info high-Byte3 */
7147 btinfo.val = bt->raw_info[BTC_BTINFO_H3];
7148 a2dp->bitpool = btinfo.hb3.a2dp_bitpool;
7150 if (b->tx_3m != (u32)btinfo.hb3.tx_3m)
7151 cx->cnt_bt[BTC_BCNT_RATECHG]++;
7152 b->tx_3m = (u32)btinfo.hb3.tx_3m;
7154 a2dp->sink = btinfo.hb3.a2dp_sink;
7156 if (!a2dp->exist_last && a2dp->exist) {
7157 a2dp->vendor_id = 0;
7158 a2dp->flush_time = 0;
7159 a2dp->play_latency = 1;
7160 ieee80211_queue_delayed_work(rtwdev->hw,
7161 &rtwdev->coex_bt_devinfo_work,
7172 rtwvif->sub_entity_idx);
7175 struct rtw89_btc *btc = &rtwdev->btc;
7176 const struct rtw89_btc_ver *ver = btc->ver;
7177 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
7185 vif->type == NL80211_IFTYPE_STATION);
7186 rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], port=%d\n", rtwvif->port);
7188 chan->band_type, chan->channel, chan->band_width);
7193 vif->bss_conf.beacon_int, vif->bss_conf.dtim_period);
7197 rtwsta->mac_id);
7201 sta->deflink.he_cap.has_he,
7202 sta->deflink.vht_cap.vht_supported,
7203 sta->deflink.ht_cap.ht_supported);
7204 if (sta->deflink.he_cap.has_he)
7206 if (sta->deflink.vht_cap.vht_supported)
7208 if (sta->deflink.ht_cap.ht_supported)
7214 if (rtwvif->wifi_role >= RTW89_WIFI_ROLE_MLME_MAX)
7218 "[BTC], wifi_role=%d\n", rtwvif->wifi_role);
7220 r.role = rtwvif->wifi_role;
7221 r.phy = rtwvif->phy_idx;
7222 r.pid = rtwvif->port;
7225 r.bcn_period = vif->bss_conf.beacon_int;
7226 r.dtim_period = vif->bss_conf.dtim_period;
7227 r.band = chan->band_type;
7228 r.ch = chan->channel;
7229 r.bw = chan->band_width;
7230 r.chdef.band = chan->band_type;
7231 r.chdef.center_ch = chan->channel;
7232 r.chdef.bw = chan->band_width;
7233 r.chdef.chan = chan->primary_channel;
7234 ether_addr_copy(r.mac_addr, rtwvif->mac_addr);
7236 if (rtwsta && vif->type == NL80211_IFTYPE_STATION)
7237 r.mac_id = rtwsta->mac_id;
7239 btc->dm.cnt_notify[BTC_NCNT_ROLE_INFO]++;
7241 wlinfo = &wl->link_info[r.pid];
7244 if (ver->fwlrole == 0) {
7247 } else if (ver->fwlrole == 1) {
7250 } else if (ver->fwlrole == 2) {
7253 } else if (ver->fwlrole == 8) {
7254 wlinfo = &wl->rlink_info[r.pid][rlink_id];
7256 link_mode_ori = wl->role_info_v8.link_mode;
7257 pta_req_mac_ori = wl->pta_req_mac;
7260 if (wl->role_info_v8.link_mode != link_mode_ori) {
7261 wl->role_info_v8.link_mode_chg = 1;
7262 if (ver->fcxinit == 7)
7263 wa_type = btc->mdinfo.md_v7.wa_type;
7265 wa_type = btc->mdinfo.md.wa_type;
7271 if (wl->pta_req_mac != pta_req_mac_ori)
7272 wl->pta_reg_mac_chg = 1;
7275 if (wlinfo->role == RTW89_WIFI_ROLE_STATION &&
7276 wlinfo->connected == MLME_NO_LINK)
7277 btc->dm.leak_ap = 0;
7280 wl->status.map.connecting = 1;
7282 wl->status.map.connecting = 0;
7285 wl->status.map._4way = false;
7292 const struct rtw89_chip_info *chip = rtwdev->chip;
7293 struct rtw89_btc *btc = &rtwdev->btc;
7294 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
7299 btc->dm.cnt_notify[BTC_NCNT_RADIO_STATE]++;
7303 wl->status.map.rf_off = 1;
7304 wl->status.map.lps = BTC_LPS_OFF;
7305 wl->status.map.busy = 0;
7308 wl->status.map.rf_off = 0;
7309 wl->status.map.lps = BTC_LPS_RF_OFF;
7310 wl->status.map.busy = 0;
7312 case BTC_RFCTRL_LPS_WL_ON: /* LPS-Protocol (RFon) */
7313 wl->status.map.rf_off = 0;
7314 wl->status.map.lps = BTC_LPS_RF_ON;
7315 wl->status.map.busy = 0;
7319 wl->status.map.rf_off = 0;
7320 wl->status.map.lps = BTC_LPS_OFF;
7329 chip->ops->btc_init_cfg(rtwdev);
7340 wl->status.map.lps_pre != BTC_LPS_OFF)
7344 btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] = 0;
7345 btc->dm.tdma_instant_excute = 1;
7348 wl->status.map.rf_off_pre = wl->status.map.rf_off;
7349 wl->status.map.lps_pre = wl->status.map.lps;
7356 struct rtw89_btc *btc = &rtwdev->btc;
7357 struct rtw89_btc_cx *cx = &btc->cx;
7358 struct rtw89_btc_wl_info *wl = &cx->wl;
7361 wl->rfk_info.type = type;
7362 wl->rfk_info.path_map = FIELD_GET(BTC_RFK_PATH_MAP, phy_path);
7363 wl->rfk_info.phy_map = FIELD_GET(BTC_RFK_PHY_MAP, phy_path);
7364 wl->rfk_info.band = FIELD_GET(BTC_RFK_BAND_MAP, phy_path);
7368 __func__, wl->rfk_info.phy_map, wl->rfk_info.path_map,
7374 wl->rfk_info.state = result ? BTC_WRFK_START : BTC_WRFK_STOP;
7378 btc->dm.cnt_notify[BTC_NCNT_WL_RFK]++;
7382 if (wl->rfk_info.state == BTC_WRFK_STOP) {
7386 wl->rfk_info.state = state;
7391 wl->rfk_info.state = BTC_WRFK_STOP;
7394 cancel_delayed_work(&rtwdev->coex_rfk_chk_work);
7403 if (wl->rfk_info.state == BTC_WRFK_START ||
7404 wl->rfk_info.state == BTC_WRFK_STOP)
7407 if (wl->rfk_info.state == BTC_WRFK_START)
7408 ieee80211_queue_delayed_work(rtwdev->hw,
7409 &rtwdev->coex_rfk_chk_work,
7415 __func__, btc->dm.cnt_notify[BTC_NCNT_WL_RFK], result);
7439 state == BTC_WRFK_ONESHOT_START ? "ONE-SHOT_START" :
7440 "ONE-SHOT_STOP");
7442 if (state != BTC_WRFK_START || rtwdev->is_bt_iqk_timeout) {
7451 rtwdev->is_bt_iqk_timeout = true;
7469 struct rtw89_dev *rtwdev = iter_data->rtwdev;
7470 struct rtw89_btc *btc = &rtwdev->btc;
7471 struct rtw89_btc_dm *dm = &btc->dm;
7472 const struct rtw89_btc_ver *ver = btc->ver;
7473 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
7475 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
7477 struct rtw89_vif *rtwvif = rtwsta->rtwvif;
7478 struct rtw89_traffic_stats *stats = &rtwvif->stats;
7479 const struct rtw89_chip_info *chip = rtwdev->chip;
7484 u8 port = rtwvif->port;
7492 rssi = ewma_rssi_read(&rtwsta->avg_rssi) >> RSSI_FACTOR;
7495 link_info = &wl->link_info[port];
7496 link_info->stat.traffic = rtwvif->stats;
7497 link_info_t = &link_info->stat.traffic;
7499 if (link_info->connected == MLME_NO_LINK) {
7500 link_info->rx_rate_drop_cnt = 0;
7504 link_info->stat.rssi = rssi;
7506 link_info->rssi_state[i] =
7508 link_info->rssi_state[i],
7509 link_info->stat.rssi,
7510 chip->wl_rssi_thres[i]);
7511 if (BTC_RSSI_LOW(link_info->rssi_state[i]))
7514 if (btc->ant_type == BTC_ANT_DEDICATED &&
7515 BTC_RSSI_CHANGE(link_info->rssi_state[i]))
7518 iter_data->rssi_map_all |= rssi_map;
7520 last_tx_rate = link_info_t->tx_rate;
7521 last_rx_rate = link_info_t->rx_rate;
7522 last_tx_lvl = (u16)link_info_t->tx_tfc_lv;
7523 last_rx_lvl = (u16)link_info_t->rx_tfc_lv;
7525 if (stats->tx_tfc_lv != RTW89_TFC_IDLE ||
7526 stats->rx_tfc_lv != RTW89_TFC_IDLE)
7529 if (stats->tx_tfc_lv > stats->rx_tfc_lv)
7534 link_info = &wl->link_info[port];
7535 if (link_info->busy != busy || link_info->dir != dir) {
7537 link_info->busy = busy;
7538 link_info->dir = dir;
7541 iter_data->busy_all |= busy;
7542 iter_data->dir_all |= BIT(dir);
7544 if (rtwsta->rx_hw_rate <= RTW89_HW_RATE_CCK2 &&
7546 link_info_t->rx_tfc_lv > RTW89_TFC_IDLE)
7547 link_info->rx_rate_drop_cnt++;
7549 if (last_tx_rate != rtwsta->ra_report.hw_rate ||
7550 last_rx_rate != rtwsta->rx_hw_rate ||
7551 last_tx_lvl != link_info_t->tx_tfc_lv ||
7552 last_rx_lvl != link_info_t->rx_tfc_lv)
7555 link_info_t->tx_rate = rtwsta->ra_report.hw_rate;
7556 link_info_t->rx_rate = rtwsta->rx_hw_rate;
7558 if (link_info->role == RTW89_WIFI_ROLE_STATION ||
7559 link_info->role == RTW89_WIFI_ROLE_P2P_CLIENT) {
7560 dm->trx_info.tx_rate = link_info_t->tx_rate;
7561 dm->trx_info.rx_rate = link_info_t->rx_rate;
7564 if (ver->fwlrole == 0) {
7565 r = &wl->role_info;
7566 r->active_role[port].tx_lvl = stats->tx_tfc_lv;
7567 r->active_role[port].rx_lvl = stats->rx_tfc_lv;
7568 r->active_role[port].tx_rate = rtwsta->ra_report.hw_rate;
7569 r->active_role[port].rx_rate = rtwsta->rx_hw_rate;
7570 } else if (ver->fwlrole == 1) {
7571 r1 = &wl->role_info_v1;
7572 r1->active_role_v1[port].tx_lvl = stats->tx_tfc_lv;
7573 r1->active_role_v1[port].rx_lvl = stats->rx_tfc_lv;
7574 r1->active_role_v1[port].tx_rate = rtwsta->ra_report.hw_rate;
7575 r1->active_role_v1[port].rx_rate = rtwsta->rx_hw_rate;
7576 } else if (ver->fwlrole == 2) {
7577 dm->trx_info.tx_lvl = stats->tx_tfc_lv;
7578 dm->trx_info.rx_lvl = stats->rx_tfc_lv;
7579 dm->trx_info.tx_rate = rtwsta->ra_report.hw_rate;
7580 dm->trx_info.rx_rate = rtwsta->rx_hw_rate;
7583 dm->trx_info.tx_tp = link_info_t->tx_throughput;
7584 dm->trx_info.rx_tp = link_info_t->rx_throughput;
7586 /* Trigger coex-run if 0x10980 reg-value is diff with coex setup */
7587 if ((dm->wl_btg_rx_rb != dm->wl_btg_rx &&
7588 dm->wl_btg_rx_rb != BTC_BTGCTRL_BB_GNT_NOTFOUND) ||
7589 (dm->wl_pre_agc_rb != dm->wl_pre_agc &&
7590 dm->wl_pre_agc_rb != BTC_PREAGC_NOTFOUND))
7591 iter_data->is_sta_change = true;
7594 iter_data->is_sta_change = true;
7597 iter_data->is_traffic_change = true;
7604 struct rtw89_btc *btc = &rtwdev->btc;
7605 struct rtw89_btc_dm *dm = &btc->dm;
7606 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
7610 ieee80211_iterate_stations_atomic(rtwdev->hw,
7614 wl->rssi_level = 0;
7615 btc->dm.cnt_notify[BTC_NCNT_WL_STA]++;
7616 for (i = BTC_WL_RSSI_THMAX; i > 0; i--) {
7618 if (data.rssi_map_all & BIT(i - 1)) {
7619 wl->rssi_level = i;
7624 if (dm->trx_info.wl_rssi != wl->rssi_level)
7625 dm->trx_info.wl_rssi = wl->rssi_level;
7628 __func__, !!wl->status.map.busy);
7630 _write_scbd(rtwdev, BTC_WSCB_WLBUSY, (!!wl->status.map.busy));
7635 wl->status.map.busy = data.busy_all;
7636 wl->status.map.traffic_dir = data.dir_all;
7638 } else if (btc->dm.cnt_notify[BTC_NCNT_WL_STA] >=
7639 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] + BTC_NHM_CHK_INTVL) {
7640 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] =
7641 btc->dm.cnt_notify[BTC_NCNT_WL_STA];
7642 } else if (btc->dm.cnt_notify[BTC_NCNT_WL_STA] <
7643 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST]) {
7644 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] =
7645 btc->dm.cnt_notify[BTC_NCNT_WL_STA];
7652 struct rtw89_btc *btc = &rtwdev->btc;
7653 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
7654 u8 *buf = &skb->data[RTW89_C2H_HEADER_LEN];
7656 len -= RTW89_C2H_HEADER_LEN;
7668 pfwinfo->event[func]++;
7675 btc->cx.cnt_bt[BTC_BCNT_INFOUPDATE]++;
7681 btc->cx.cnt_bt[BTC_BCNT_SCBDUPDATE]++;
7687 btc->dbg.rb_done = true;
7688 btc->dbg.rb_val = le32_to_cpu(*((__le32 *)buf));
7692 btc->dbg.rb_done = true;
7693 btc->dbg.rb_val = buf[0];
7696 btc->dm.cnt_dm[BTC_DCNT_CX_RUNINFO]++;
7705 union rtw89_btc_module_info *md = &rtwdev->btc.mdinfo;
7706 const struct rtw89_chip_info *chip = rtwdev->chip;
7707 const struct rtw89_btc_ver *ver = rtwdev->btc.ver;
7708 struct rtw89_hal *hal = &rtwdev->hal;
7709 struct rtw89_btc *btc = &rtwdev->btc;
7710 struct rtw89_btc_dm *dm = &btc->dm;
7711 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
7712 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
7716 if (!(dm->coex_info_map & BTC_COEX_INFO_CX))
7719 dm->cnt_notify[BTC_NCNT_SHOW_COEX_INFO]++;
7722 chip->chip_id);
7728 seq_printf(m, " %-15s : Coex:%d.%d.%d(branch:%d), ",
7731 ver_main = FIELD_GET(GENMASK(31, 24), wl->ver_info.fw_coex);
7732 ver_sub = FIELD_GET(GENMASK(23, 16), wl->ver_info.fw_coex);
7733 ver_hotfix = FIELD_GET(GENMASK(15, 8), wl->ver_info.fw_coex);
7734 id_branch = FIELD_GET(GENMASK(7, 0), wl->ver_info.fw_coex);
7738 ver_main = FIELD_GET(GENMASK(31, 24), chip->wlcx_desired);
7739 ver_sub = FIELD_GET(GENMASK(23, 16), chip->wlcx_desired);
7740 ver_hotfix = FIELD_GET(GENMASK(15, 8), chip->wlcx_desired);
7742 (wl->ver_info.fw_coex >= chip->wlcx_desired ?
7746 bt->ver_info.fw_coex,
7747 (bt->ver_info.fw_coex >= chip->btcx_desired ?
7748 "Match" : "Mismatch"), chip->btcx_desired);
7750 if (bt->enable.now && bt->ver_info.fw == 0)
7755 ver_main = FIELD_GET(GENMASK(31, 24), wl->ver_info.fw);
7756 ver_sub = FIELD_GET(GENMASK(23, 16), wl->ver_info.fw);
7757 ver_hotfix = FIELD_GET(GENMASK(15, 8), wl->ver_info.fw);
7758 id_branch = FIELD_GET(GENMASK(7, 0), wl->ver_info.fw);
7759 seq_printf(m, " %-15s : WL_FW:%d.%d.%d.%d, BT_FW:0x%x(%s)\n",
7762 bt->ver_info.fw, bt->run_patch_code ? "patch" : "ROM");
7764 if (ver->fcxinit == 7) {
7765 cv = md->md_v7.kt_ver;
7766 rfe = md->md_v7.rfe_type;
7767 iso = md->md_v7.ant.isolation;
7768 ant_num = md->md_v7.ant.num;
7769 ant_single_pos = md->md_v7.ant.single_pos;
7771 cv = md->md.cv;
7772 rfe = md->md.rfe_type;
7773 iso = md->md.ant.isolation;
7774 ant_num = md->md.ant.num;
7775 ant_single_pos = md->md.ant.single_pos;
7778 seq_printf(m, " %-15s : cv:%x, rfe_type:0x%x, ant_iso:%d, ant_pg:%d, %s",
7784 btc->cx.other.type, rtwdev->dbcc_en, hal->tx_nss,
7785 hal->rx_nss);
7790 struct rtw89_btc *btc = &rtwdev->btc;
7792 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
7793 struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
7797 if (rtwdev->dbcc_en) {
7799 " %-15s : PHY0_band(op:%d/scan:%d/real:%d), ",
7800 "[dbcc_info]", wl_dinfo->op_band[RTW89_PHY_0],
7801 wl_dinfo->scan_band[RTW89_PHY_0],
7802 wl_dinfo->real_band[RTW89_PHY_0]);
7805 wl_dinfo->op_band[RTW89_PHY_1],
7806 wl_dinfo->scan_band[RTW89_PHY_1],
7807 wl_dinfo->real_band[RTW89_PHY_1]);
7811 if (btc->ver->fwlrole == 8)
7812 plink = &btc->cx.wl.rlink_info[i][0];
7814 plink = &btc->cx.wl.link_info[i];
7816 if (!plink->active)
7820 " [port_%d] : role=%d(phy-%d), connect=%d(client_cnt=%d), mode=%d, center_ch=%d, bw=%d",
7821 plink->pid, (u32)plink->role, plink->phy,
7822 (u32)plink->connected, plink->client_cnt - 1,
7823 (u32)plink->mode, plink->ch, (u32)plink->bw);
7825 if (plink->connected == MLME_NO_LINK)
7830 plink->mac_id, plink->tx_time, plink->tx_retry);
7833 " [port_%d] : rssi=-%ddBm(%d), busy=%d, dir=%s, ",
7834 plink->pid, 110 - plink->stat.rssi,
7835 plink->stat.rssi, plink->busy,
7836 plink->dir == RTW89_TFC_UL ? "UL" : "DL");
7838 t = &plink->stat.traffic;
7842 (u32)t->tx_rate, t->tx_tfc_lv);
7845 (u32)t->rx_rate,
7846 t->rx_tfc_lv, plink->rx_rate_drop_cnt);
7852 struct rtw89_btc *btc = &rtwdev->btc;
7853 const struct rtw89_btc_ver *ver = btc->ver;
7854 struct rtw89_btc_cx *cx = &btc->cx;
7855 struct rtw89_btc_wl_info *wl = &cx->wl;
7856 struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info;
7857 struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1;
7858 struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2;
7859 struct rtw89_btc_wl_role_info_v8 *wl_rinfo_v8 = &wl->role_info_v8;
7862 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_WL))
7867 if (ver->fwlrole == 0)
7868 mode = wl_rinfo->link_mode;
7869 else if (ver->fwlrole == 1)
7870 mode = wl_rinfo_v1->link_mode;
7871 else if (ver->fwlrole == 2)
7872 mode = wl_rinfo_v2->link_mode;
7873 else if (ver->fwlrole == 8)
7874 mode = wl_rinfo_v8->link_mode;
7878 seq_printf(m, " %-15s : link_mode:%d, ", "[status]", mode);
7882 wl->status.map.rf_off, wl->status.map.lps,
7883 wl->status.map.scan ? "Y" : "N",
7884 wl->scan_info.band[RTW89_PHY_0], wl->scan_info.phy_map);
7888 wl->status.map.connecting ? "Y" : "N",
7889 wl->status.map.roaming ? "Y" : "N",
7890 wl->status.map._4way ? "Y" : "N",
7891 wl->status.map.init_ok ? "Y" : "N");
7904 struct rtw89_btc *btc = &rtwdev->btc;
7905 struct rtw89_btc_bt_link_info *bt_linfo = &btc->cx.bt.link_info;
7906 struct rtw89_btc_bt_hfp_desc hfp = bt_linfo->hfp_desc;
7907 struct rtw89_btc_bt_hid_desc hid = bt_linfo->hid_desc;
7908 struct rtw89_btc_bt_a2dp_desc a2dp = bt_linfo->a2dp_desc;
7909 struct rtw89_btc_bt_pan_desc pan = bt_linfo->pan_desc;
7912 seq_printf(m, " %-15s : type:%s, sut_pwr:%d, golden-rx:%d",
7914 bt_linfo->sut_pwr_level[0],
7915 bt_linfo->golden_rx_shift[0]);
7920 "\n\r %-15s : type:%s%s%s%s%s pair-cnt:%d, sut_pwr:%d, golden-rx:%d\n",
7926 hid.type & BTC_HID_RCU_VOICE ? "RCU-Voice," : "",
7927 hid.pair_cnt, bt_linfo->sut_pwr_level[1],
7928 bt_linfo->golden_rx_shift[1]);
7933 " %-15s : type:%s, bit-pool:%d, flush-time:%d, ",
7939 "vid:0x%x, Dev-name:0x%x, sut_pwr:%d, golden-rx:%d\n",
7941 bt_linfo->sut_pwr_level[2],
7942 bt_linfo->golden_rx_shift[2]);
7946 seq_printf(m, " %-15s : sut_pwr:%d, golden-rx:%d\n",
7948 bt_linfo->sut_pwr_level[3],
7949 bt_linfo->golden_rx_shift[3]);
7955 struct rtw89_btc *btc = &rtwdev->btc;
7956 const struct rtw89_btc_ver *ver = btc->ver;
7957 struct rtw89_btc_cx *cx = &btc->cx;
7958 struct rtw89_btc_bt_info *bt = &cx->bt;
7959 struct rtw89_btc_wl_info *wl = &cx->wl;
7960 struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info;
7961 union rtw89_btc_module_info *md = &btc->mdinfo;
7962 u8 *afh = bt_linfo->afh_map;
7963 u8 *afh_le = bt_linfo->afh_map_le;
7966 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_BT))
7969 if (ver->fcxinit == 7)
7970 bt_pos = md->md_v7.bt_pos;
7972 bt_pos = md->md.bt_pos;
7976 seq_printf(m, " %-15s : enable:%s, btg:%s%s, connect:%s, ",
7977 "[status]", bt->enable.now ? "Y" : "N",
7978 bt->btg_type ? "Y" : "N",
7979 (bt->enable.now && (bt->btg_type != bt_pos) ?
7980 "(efuse-mismatch!!)" : ""),
7981 (bt_linfo->status.map.connect ? "Y" : "N"));
7984 bt->igno_wl ? "Y" : "N",
7985 bt->mbx_avl ? "Y" : "N", bt->rfk_info.val);
7987 seq_printf(m, " %-15s : profile:%s%s%s%s%s ",
7989 (bt_linfo->profile_cnt.now == 0) ? "None," : "",
7990 bt_linfo->hfp_desc.exist ? "HFP," : "",
7991 bt_linfo->hid_desc.exist ? "HID," : "",
7992 bt_linfo->a2dp_desc.exist ?
7993 (bt_linfo->a2dp_desc.sink ? "A2DP_sink," : "A2DP,") : "",
7994 bt_linfo->pan_desc.exist ? "PAN," : "");
7997 "multi-link:%s, role:%s, ble-connect:%s, CQDDR:%s, A2DP_active:%s, PAN_active:%s\n",
7998 bt_linfo->multi_link.now ? "Y" : "N",
7999 bt_linfo->slave_role ? "Slave" : "Master",
8000 bt_linfo->status.map.ble_connect ? "Y" : "N",
8001 bt_linfo->cqddr ? "Y" : "N",
8002 bt_linfo->a2dp_desc.active ? "Y" : "N",
8003 bt_linfo->pan_desc.active ? "Y" : "N");
8006 " %-15s : rssi:%ddBm(lvl:%d), tx_rate:%dM, %s%s%s",
8007 "[link]", bt_linfo->rssi - 100,
8008 bt->rssi_level,
8009 bt_linfo->tx_3m ? 3 : 2,
8010 bt_linfo->status.map.inq_pag ? " inq-page!!" : "",
8011 bt_linfo->status.map.acl_busy ? " acl_busy!!" : "",
8012 bt_linfo->status.map.mesh_busy ? " mesh_busy!!" : "");
8016 bt_linfo->relink.now ? " ReLink!!" : "",
8020 if (ver->fcxbtafh == 2 && bt_linfo->status.map.ble_connect)
8027 wl->afh_info.en, wl->afh_info.ch, wl->afh_info.bw);
8030 " %-15s : retry:%d, relink:%d, rate_chg:%d, reinit:%d, reenable:%d, ",
8031 "[stat_cnt]", cx->cnt_bt[BTC_BCNT_RETRY],
8032 cx->cnt_bt[BTC_BCNT_RELINK], cx->cnt_bt[BTC_BCNT_RATECHG],
8033 cx->cnt_bt[BTC_BCNT_REINIT], cx->cnt_bt[BTC_BCNT_REENABLE]);
8036 "role-switch:%d, afh:%d, inq_page:%d(inq:%d/page:%d), igno_wl:%d\n",
8037 cx->cnt_bt[BTC_BCNT_ROLESW], cx->cnt_bt[BTC_BCNT_AFH],
8038 cx->cnt_bt[BTC_BCNT_INQPAG], cx->cnt_bt[BTC_BCNT_INQ],
8039 cx->cnt_bt[BTC_BCNT_PAGE], cx->cnt_bt[BTC_BCNT_IGNOWL]);
8044 " %-15s : raw_data[%02x %02x %02x %02x %02x %02x] (type:%s/cnt:%d/same:%d)\n",
8045 "[bt_info]", bt->raw_info[2], bt->raw_info[3],
8046 bt->raw_info[4], bt->raw_info[5], bt->raw_info[6],
8047 bt->raw_info[7],
8048 bt->raw_info[0] == BTC_BTINFO_AUTO ? "auto" : "reply",
8049 cx->cnt_bt[BTC_BCNT_INFOUPDATE],
8050 cx->cnt_bt[BTC_BCNT_INFOSAME]);
8053 " %-15s : Hi-rx = %d, Hi-tx = %d, Lo-rx = %d, Lo-tx = %d (bt_polut_wl_tx = %d)",
8054 "[trx_req_cnt]", cx->cnt_bt[BTC_BCNT_HIPRI_RX],
8055 cx->cnt_bt[BTC_BCNT_HIPRI_TX], cx->cnt_bt[BTC_BCNT_LOPRI_RX],
8056 cx->cnt_bt[BTC_BCNT_LOPRI_TX], cx->cnt_bt[BTC_BCNT_POLUT]);
8058 if (!bt->scan_info_update) {
8063 if (ver->fcxbtscan == 1) {
8065 "(INQ:%d-%d/PAGE:%d-%d/LE:%d-%d/INIT:%d-%d)",
8066 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INQ].win),
8067 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INQ].intvl),
8068 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_PAGE].win),
8069 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_PAGE].intvl),
8070 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_BLE].win),
8071 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_BLE].intvl),
8072 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INIT].win),
8073 le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INIT].intvl));
8074 } else if (ver->fcxbtscan == 2) {
8076 "(BG:%d-%d/INIT:%d-%d/LE:%d-%d)",
8077 le16_to_cpu(bt->scan_info_v2[CXSCAN_BG].win),
8078 le16_to_cpu(bt->scan_info_v2[CXSCAN_BG].intvl),
8079 le16_to_cpu(bt->scan_info_v2[CXSCAN_INIT].win),
8080 le16_to_cpu(bt->scan_info_v2[CXSCAN_INIT].intvl),
8081 le16_to_cpu(bt->scan_info_v2[CXSCAN_LE].win),
8082 le16_to_cpu(bt->scan_info_v2[CXSCAN_LE].intvl));
8087 if (bt_linfo->profile_cnt.now || bt_linfo->status.map.ble_connect)
8092 if (ver->fcxbtafh == 2 && bt_linfo->status.map.ble_connect)
8097 if (bt_linfo->a2dp_desc.exist &&
8098 (bt_linfo->a2dp_desc.flush_time == 0 ||
8099 bt_linfo->a2dp_desc.vendor_id == 0 ||
8100 bt_linfo->a2dp_desc.play_latency == 1))
8318 CASE_BTC_SLOT_STR(BLK);
8405 seq_printf(m, " %-15s : ", prefix);
8408 seq_printf(m, "-> %-20s",
8411 seq_printf(m, "-> %-15s",
8414 seq_printf(m, "-> %-13s",
8416 if (i == (len - 1) || (i % seg_len) == (seg_len - 1))
8423 struct rtw89_btc *btc = &rtwdev->btc;
8424 struct rtw89_btc_dm *dm = &btc->dm;
8428 len = dm->dm_step.step_ov ? RTW89_BTC_DM_MAXSTEP : dm->dm_step.step_pos;
8429 start_idx = dm->dm_step.step_ov ? dm->dm_step.step_pos : 0;
8431 seq_print_segment(m, "[dm_steps]", dm->dm_step.step, len, 6, start_idx,
8432 ARRAY_SIZE(dm->dm_step.step));
8437 struct rtw89_btc *btc = &rtwdev->btc;
8438 const struct rtw89_btc_ver *ver = btc->ver;
8439 struct rtw89_btc_dm *dm = &btc->dm;
8440 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
8441 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
8444 if (!(dm->coex_info_map & BTC_COEX_INFO_DM))
8448 (btc->manual_ctrl ? "(Manual)" : "(Auto)"));
8451 " %-15s : type:%s, reason:%s(), action:%s(), ant_path:%s, init_mode:%s, run_cnt:%d\n",
8453 btc->ant_type == BTC_ANT_SHARED ? "shared" : "dedicated",
8454 steps_to_str(dm->run_reason),
8455 steps_to_str(dm->run_action | BTC_ACT_EXT_BIT),
8456 id_to_ant(FIELD_GET(GENMASK(7, 0), dm->set_ant_path)),
8457 id_to_mode(wl->coex_mode),
8458 dm->cnt_dm[BTC_DCNT_RUN]);
8462 if (ver->fcxctrl == 7)
8463 igno_bt = btc->ctrl.ctrl_v7.igno_bt;
8465 igno_bt = btc->ctrl.ctrl.igno_bt;
8467 seq_printf(m, " %-15s : wl_only:%d, bt_only:%d, igno_bt:%d, free_run:%d, wl_ps_ctrl:%d, wl_mimo_ps:%d, ",
8468 "[dm_flag]", dm->wl_only, dm->bt_only, igno_bt,
8469 dm->freerun, btc->lps, dm->wl_mimo_ps);
8471 seq_printf(m, "leak_ap:%d, fw_offload:%s%s\n", dm->leak_ap,
8473 (dm->wl_fw_cx_offload == BTC_CX_FW_OFFLOAD ?
8476 if (dm->rf_trx_para.wl_tx_power == 0xff)
8478 " %-15s : wl_rssi_lvl:%d, para_lvl:%d, wl_tx_pwr:orig, ",
8479 "[trx_ctrl]", wl->rssi_level, dm->trx_para_level);
8483 " %-15s : wl_rssi_lvl:%d, para_lvl:%d, wl_tx_pwr:%d, ",
8484 "[trx_ctrl]", wl->rssi_level, dm->trx_para_level,
8485 dm->rf_trx_para.wl_tx_power);
8488 "wl_rx_lvl:%d, bt_tx_pwr_dec:%d, bt_rx_lna:%d(%s-tbl), wl_btg_rx:%d\n",
8489 dm->rf_trx_para.wl_rx_gain, dm->rf_trx_para.bt_tx_power,
8490 dm->rf_trx_para.bt_rx_gain,
8491 (bt->hi_lna_rx ? "Hi" : "Ori"), dm->wl_btg_rx);
8494 " %-15s : wl_tx_limit[en:%d/max_t:%dus/max_retry:%d], bt_slot_reg:%d-TU, bt_scan_rx_low_pri:%d\n",
8495 "[dm_ctrl]", dm->wl_tx_limit.enable, dm->wl_tx_limit.tx_time,
8496 dm->wl_tx_limit.tx_retry, btc->bt_req_len, bt->scan_rx_low_pri);
8501 struct rtw89_btc *btc = &rtwdev->btc;
8502 const struct rtw89_btc_ver *ver = btc->ver;
8503 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
8507 pcysta = &pfwinfo->rpt_fbtc_cysta.finfo;
8508 if (ver->fcxcysta == 2) {
8509 pcysta->v2 = pfwinfo->rpt_fbtc_cysta.finfo.v2;
8510 except_cnt = le32_to_cpu(pcysta->v2.except_cnt);
8511 exception_map = le32_to_cpu(pcysta->v2.exception);
8512 } else if (ver->fcxcysta == 3) {
8513 pcysta->v3 = pfwinfo->rpt_fbtc_cysta.finfo.v3;
8514 except_cnt = le32_to_cpu(pcysta->v3.except_cnt);
8515 exception_map = le32_to_cpu(pcysta->v3.except_map);
8516 } else if (ver->fcxcysta == 4) {
8517 pcysta->v4 = pfwinfo->rpt_fbtc_cysta.finfo.v4;
8518 except_cnt = pcysta->v4.except_cnt;
8519 exception_map = le32_to_cpu(pcysta->v4.except_map);
8520 } else if (ver->fcxcysta == 5) {
8521 pcysta->v5 = pfwinfo->rpt_fbtc_cysta.finfo.v5;
8522 except_cnt = pcysta->v5.except_cnt;
8523 exception_map = le32_to_cpu(pcysta->v5.except_map);
8524 } else if (ver->fcxcysta == 7) {
8525 pcysta->v7 = pfwinfo->rpt_fbtc_cysta.finfo.v7;
8526 except_cnt = pcysta->v7.except_cnt;
8527 exception_map = le32_to_cpu(pcysta->v7.except_map);
8532 if (pfwinfo->event[BTF_EVNT_BUF_OVERFLOW] == 0 && except_cnt == 0 &&
8533 !pfwinfo->len_mismch && !pfwinfo->fver_mismch)
8536 seq_printf(m, " %-15s : ", "[error]");
8538 if (pfwinfo->event[BTF_EVNT_BUF_OVERFLOW]) {
8540 "overflow-cnt: %d, ",
8541 pfwinfo->event[BTF_EVNT_BUF_OVERFLOW]);
8544 if (pfwinfo->len_mismch) {
8546 "len-mismatch: 0x%x, ",
8547 pfwinfo->len_mismch);
8550 if (pfwinfo->fver_mismch) {
8552 "fver-mismatch: 0x%x, ",
8553 pfwinfo->fver_mismch);
8559 "exception-type: 0x%x, exception-cnt = %d",
8567 struct rtw89_btc *btc = &rtwdev->btc;
8568 const struct rtw89_btc_ver *ver = btc->ver;
8569 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
8573 pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo;
8574 if (!pcinfo->valid)
8577 if (ver->fcxtdma == 1)
8578 t = &pfwinfo->rpt_fbtc_tdma.finfo.v1;
8580 t = &pfwinfo->rpt_fbtc_tdma.finfo.v3.tdma;
8583 " %-15s : ", "[tdma_policy]");
8586 (u32)t->type,
8587 t->rxflctrl, t->txpause);
8591 t->wtgle_n, t->leak_n, t->ext_ctrl);
8595 (u32)btc->policy_type);
8602 struct rtw89_btc *btc = &rtwdev->btc;
8603 struct rtw89_btc_dm *dm = &btc->dm;
8609 if (btc->ver->fcxslots == 1) {
8610 dur = le16_to_cpu(dm->slot_now.v1[i].dur);
8611 tbl = le32_to_cpu(dm->slot_now.v1[i].cxtbl);
8612 cxtype = le16_to_cpu(dm->slot_now.v1[i].cxtype);
8613 } else if (btc->ver->fcxslots == 7) {
8614 dur = le16_to_cpu(dm->slot_now.v7[i].dur);
8615 tbl = le32_to_cpu(dm->slot_now.v7[i].cxtbl);
8616 cxtype = le16_to_cpu(dm->slot_now.v7[i].cxtype);
8623 " %-15s : %5s[%03d/0x%x/%d]",
8641 struct rtw89_btc *btc = &rtwdev->btc;
8642 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
8643 struct rtw89_btc_dm *dm = &btc->dm;
8644 struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc;
8651 pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo;
8652 if (!pcinfo->valid)
8655 pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo.v2;
8657 " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]",
8659 le16_to_cpu(pcysta_le32->cycles),
8660 le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_ALL]),
8661 le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_ALL_OK]),
8662 le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_BT_SLOT]),
8663 le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_BT_OK]));
8666 if (!le32_to_cpu(pcysta_le32->slot_cnt[i]))
8669 le32_to_cpu(pcysta_le32->slot_cnt[i]));
8672 if (dm->tdma_now.rxflctrl) {
8674 le32_to_cpu(pcysta_le32->leakrx_cnt));
8677 if (le32_to_cpu(pcysta_le32->collision_cnt)) {
8679 le32_to_cpu(pcysta_le32->collision_cnt));
8682 if (le32_to_cpu(pcysta_le32->skip_cnt)) {
8684 le32_to_cpu(pcysta_le32->skip_cnt));
8688 seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]",
8690 le16_to_cpu(pcysta_le32->tavg_cycle[CXT_WL]),
8691 le16_to_cpu(pcysta_le32->tavg_cycle[CXT_BT]),
8692 le16_to_cpu(pcysta_le32->tavg_lk) / 1000,
8693 le16_to_cpu(pcysta_le32->tavg_lk) % 1000);
8695 le16_to_cpu(pcysta_le32->tmax_cycle[CXT_WL]),
8696 le16_to_cpu(pcysta_le32->tmax_cycle[CXT_BT]),
8697 le16_to_cpu(pcysta_le32->tmax_lk) / 1000,
8698 le16_to_cpu(pcysta_le32->tmax_lk) % 1000);
8700 le16_to_cpu(pcysta_le32->tmaxdiff_cycle[CXT_WL]),
8701 le16_to_cpu(pcysta_le32->tmaxdiff_cycle[CXT_BT]));
8703 if (le16_to_cpu(pcysta_le32->cycles) <= 1)
8706 /* 1 cycle record 1 wl-slot and 1 bt-slot */
8709 if (le16_to_cpu(pcysta_le32->cycles) <= slot_pair)
8712 c_begin = le16_to_cpu(pcysta_le32->cycles) - slot_pair + 1;
8714 c_end = le16_to_cpu(pcysta_le32->cycles);
8718 store_index = ((cycle - 1) % slot_pair) * 2;
8722 " %-15s : ->b%02d->w%02d", "[cycle_step]",
8723 le16_to_cpu(pcysta_le32->tslot_cycle[store_index]),
8724 le16_to_cpu(pcysta_le32->tslot_cycle[store_index + 1]));
8727 "->b%02d->w%02d",
8728 le16_to_cpu(pcysta_le32->tslot_cycle[store_index]),
8729 le16_to_cpu(pcysta_le32->tslot_cycle[store_index + 1]));
8734 if (a2dp->exist) {
8736 " %-15s : a2dp_ept:%d, a2dp_late:%d",
8738 le16_to_cpu(pcysta_le32->a2dpept),
8739 le16_to_cpu(pcysta_le32->a2dpeptto));
8743 le16_to_cpu(pcysta_le32->tavg_a2dpept),
8744 le16_to_cpu(pcysta_le32->tmax_a2dpept));
8745 r.val = dm->tdma_now.rxflctrl;
8750 le16_to_cpu(pcysta_le32->cycles_a2dp[CXT_FLCTRL_ON]),
8751 le16_to_cpu(pcysta_le32->cycles_a2dp[CXT_FLCTRL_OFF]));
8755 le16_to_cpu(pcysta_le32->tavg_a2dp[CXT_FLCTRL_ON]),
8756 le16_to_cpu(pcysta_le32->tavg_a2dp[CXT_FLCTRL_OFF]));
8760 le16_to_cpu(pcysta_le32->tmax_a2dp[CXT_FLCTRL_ON]),
8761 le16_to_cpu(pcysta_le32->tmax_a2dp[CXT_FLCTRL_OFF]));
8769 struct rtw89_btc *btc = &rtwdev->btc;
8770 struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc;
8771 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
8772 struct rtw89_btc_dm *dm = &btc->dm;
8779 pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo;
8780 if (!pcinfo->valid)
8783 pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v3;
8785 " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]",
8787 le16_to_cpu(pcysta->cycles),
8788 le32_to_cpu(pcysta->bcn_cnt[CXBCN_ALL]),
8789 le32_to_cpu(pcysta->bcn_cnt[CXBCN_ALL_OK]),
8790 le32_to_cpu(pcysta->bcn_cnt[CXBCN_BT_SLOT]),
8791 le32_to_cpu(pcysta->bcn_cnt[CXBCN_BT_OK]));
8794 if (!le32_to_cpu(pcysta->slot_cnt[i]))
8798 le32_to_cpu(pcysta->slot_cnt[i]));
8801 if (dm->tdma_now.rxflctrl)
8802 seq_printf(m, ", leak_rx:%d", le32_to_cpu(pcysta->leak_slot.cnt_rximr));
8804 if (le32_to_cpu(pcysta->collision_cnt))
8805 seq_printf(m, ", collision:%d", le32_to_cpu(pcysta->collision_cnt));
8807 if (le32_to_cpu(pcysta->skip_cnt))
8808 seq_printf(m, ", skip:%d", le32_to_cpu(pcysta->skip_cnt));
8812 seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]",
8814 le16_to_cpu(pcysta->cycle_time.tavg[CXT_WL]),
8815 le16_to_cpu(pcysta->cycle_time.tavg[CXT_BT]),
8816 le16_to_cpu(pcysta->leak_slot.tavg) / 1000,
8817 le16_to_cpu(pcysta->leak_slot.tavg) % 1000);
8820 le16_to_cpu(pcysta->cycle_time.tmax[CXT_WL]),
8821 le16_to_cpu(pcysta->cycle_time.tmax[CXT_BT]),
8822 le16_to_cpu(pcysta->leak_slot.tmax) / 1000,
8823 le16_to_cpu(pcysta->leak_slot.tmax) % 1000);
8826 le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_WL]),
8827 le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_BT]));
8829 cycle = le16_to_cpu(pcysta->cycles);
8833 /* 1 cycle record 1 wl-slot and 1 bt-slot */
8839 c_begin = cycle - slot_pair + 1;
8843 if (a2dp->exist)
8850 store_index = ((cycle - 1) % slot_pair) * 2;
8853 seq_printf(m, " %-15s : ", "[cycle_step]");
8855 seq_printf(m, "->b%02d",
8856 le16_to_cpu(pcysta->slot_step_time[store_index]));
8857 if (a2dp->exist) {
8858 a2dp_trx = &pcysta->a2dp_trx[store_index];
8860 a2dp_trx->empty_cnt,
8861 a2dp_trx->retry_cnt,
8862 a2dp_trx->tx_rate ? 3 : 2,
8863 a2dp_trx->tx_cnt,
8864 a2dp_trx->ack_cnt,
8865 a2dp_trx->nack_cnt);
8867 seq_printf(m, "->w%02d",
8868 le16_to_cpu(pcysta->slot_step_time[store_index + 1]));
8869 if (a2dp->exist) {
8870 a2dp_trx = &pcysta->a2dp_trx[store_index + 1];
8872 a2dp_trx->empty_cnt,
8873 a2dp_trx->retry_cnt,
8874 a2dp_trx->tx_rate ? 3 : 2,
8875 a2dp_trx->tx_cnt,
8876 a2dp_trx->ack_cnt,
8877 a2dp_trx->nack_cnt);
8883 if (a2dp->exist) {
8884 seq_printf(m, " %-15s : a2dp_ept:%d, a2dp_late:%d",
8886 le16_to_cpu(pcysta->a2dp_ept.cnt),
8887 le16_to_cpu(pcysta->a2dp_ept.cnt_timeout));
8890 le16_to_cpu(pcysta->a2dp_ept.tavg),
8891 le16_to_cpu(pcysta->a2dp_ept.tmax));
8899 struct rtw89_btc *btc = &rtwdev->btc;
8900 struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc;
8901 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
8902 struct rtw89_btc_dm *dm = &btc->dm;
8909 pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo;
8910 if (!pcinfo->valid)
8913 pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v4;
8915 " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]",
8917 le16_to_cpu(pcysta->cycles),
8918 le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL]),
8919 le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL_OK]),
8920 le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_SLOT]),
8921 le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_OK]));
8924 if (!le16_to_cpu(pcysta->slot_cnt[i]))
8928 le16_to_cpu(pcysta->slot_cnt[i]));
8931 if (dm->tdma_now.rxflctrl)
8933 le32_to_cpu(pcysta->leak_slot.cnt_rximr));
8935 if (pcysta->collision_cnt)
8936 seq_printf(m, ", collision:%d", pcysta->collision_cnt);
8938 if (le16_to_cpu(pcysta->skip_cnt))
8940 le16_to_cpu(pcysta->skip_cnt));
8944 seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]",
8946 le16_to_cpu(pcysta->cycle_time.tavg[CXT_WL]),
8947 le16_to_cpu(pcysta->cycle_time.tavg[CXT_BT]),
8948 le16_to_cpu(pcysta->leak_slot.tavg) / 1000,
8949 le16_to_cpu(pcysta->leak_slot.tavg) % 1000);
8952 le16_to_cpu(pcysta->cycle_time.tmax[CXT_WL]),
8953 le16_to_cpu(pcysta->cycle_time.tmax[CXT_BT]),
8954 le16_to_cpu(pcysta->leak_slot.tmax) / 1000,
8955 le16_to_cpu(pcysta->leak_slot.tmax) % 1000);
8958 le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_WL]),
8959 le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_BT]));
8961 cycle = le16_to_cpu(pcysta->cycles);
8965 /* 1 cycle record 1 wl-slot and 1 bt-slot */
8971 c_begin = cycle - slot_pair + 1;
8975 if (a2dp->exist)
8982 store_index = ((cycle - 1) % slot_pair) * 2;
8985 seq_printf(m, " %-15s : ", "[cycle_step]");
8987 seq_printf(m, "->b%02d",
8988 le16_to_cpu(pcysta->slot_step_time[store_index]));
8989 if (a2dp->exist) {
8990 a2dp_trx = &pcysta->a2dp_trx[store_index];
8992 a2dp_trx->empty_cnt,
8993 a2dp_trx->retry_cnt,
8994 a2dp_trx->tx_rate ? 3 : 2,
8995 a2dp_trx->tx_cnt,
8996 a2dp_trx->ack_cnt,
8997 a2dp_trx->nack_cnt);
8999 seq_printf(m, "->w%02d",
9000 le16_to_cpu(pcysta->slot_step_time[store_index + 1]));
9001 if (a2dp->exist) {
9002 a2dp_trx = &pcysta->a2dp_trx[store_index + 1];
9004 a2dp_trx->empty_cnt,
9005 a2dp_trx->retry_cnt,
9006 a2dp_trx->tx_rate ? 3 : 2,
9007 a2dp_trx->tx_cnt,
9008 a2dp_trx->ack_cnt,
9009 a2dp_trx->nack_cnt);
9015 if (a2dp->exist) {
9016 seq_printf(m, " %-15s : a2dp_ept:%d, a2dp_late:%d",
9018 le16_to_cpu(pcysta->a2dp_ept.cnt),
9019 le16_to_cpu(pcysta->a2dp_ept.cnt_timeout));
9022 le16_to_cpu(pcysta->a2dp_ept.tavg),
9023 le16_to_cpu(pcysta->a2dp_ept.tmax));
9031 struct rtw89_btc *btc = &rtwdev->btc;
9032 struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc;
9033 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9034 struct rtw89_btc_dm *dm = &btc->dm;
9041 pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo;
9042 if (!pcinfo->valid)
9045 pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v5;
9047 " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]",
9049 le16_to_cpu(pcysta->cycles),
9050 le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL]),
9051 le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL_OK]),
9052 le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_SLOT]),
9053 le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_OK]));
9056 if (!le16_to_cpu(pcysta->slot_cnt[i]))
9060 le16_to_cpu(pcysta->slot_cnt[i]));
9063 if (dm->tdma_now.rxflctrl)
9065 le32_to_cpu(pcysta->leak_slot.cnt_rximr));
9067 if (pcysta->collision_cnt)
9068 seq_printf(m, ", collision:%d", pcysta->collision_cnt);
9070 if (le16_to_cpu(pcysta->skip_cnt))
9072 le16_to_cpu(pcysta->skip_cnt));
9076 seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]",
9078 le16_to_cpu(pcysta->cycle_time.tavg[CXT_WL]),
9079 le16_to_cpu(pcysta->cycle_time.tavg[CXT_BT]),
9080 le16_to_cpu(pcysta->leak_slot.tavg) / 1000,
9081 le16_to_cpu(pcysta->leak_slot.tavg) % 1000);
9084 le16_to_cpu(pcysta->cycle_time.tmax[CXT_WL]),
9085 le16_to_cpu(pcysta->cycle_time.tmax[CXT_BT]),
9086 le16_to_cpu(pcysta->leak_slot.tmax) / 1000,
9087 le16_to_cpu(pcysta->leak_slot.tmax) % 1000);
9089 cycle = le16_to_cpu(pcysta->cycles);
9093 /* 1 cycle record 1 wl-slot and 1 bt-slot */
9099 c_begin = cycle - slot_pair + 1;
9103 if (a2dp->exist)
9113 store_index = ((cycle - 1) % slot_pair) * 2;
9116 seq_printf(m, " %-15s : ", "[cycle_step]");
9118 seq_printf(m, "->b%02d",
9119 le16_to_cpu(pcysta->slot_step_time[store_index]));
9120 if (a2dp->exist) {
9121 a2dp_trx = &pcysta->a2dp_trx[store_index];
9123 a2dp_trx->empty_cnt,
9124 a2dp_trx->retry_cnt,
9125 a2dp_trx->tx_rate ? 3 : 2,
9126 a2dp_trx->tx_cnt,
9127 a2dp_trx->ack_cnt,
9128 a2dp_trx->nack_cnt);
9130 seq_printf(m, "->w%02d",
9131 le16_to_cpu(pcysta->slot_step_time[store_index + 1]));
9132 if (a2dp->exist) {
9133 a2dp_trx = &pcysta->a2dp_trx[store_index + 1];
9135 a2dp_trx->empty_cnt,
9136 a2dp_trx->retry_cnt,
9137 a2dp_trx->tx_rate ? 3 : 2,
9138 a2dp_trx->tx_cnt,
9139 a2dp_trx->ack_cnt,
9140 a2dp_trx->nack_cnt);
9146 if (a2dp->exist) {
9147 seq_printf(m, " %-15s : a2dp_ept:%d, a2dp_late:%d",
9149 le16_to_cpu(pcysta->a2dp_ept.cnt),
9150 le16_to_cpu(pcysta->a2dp_ept.cnt_timeout));
9153 le16_to_cpu(pcysta->a2dp_ept.tavg),
9154 le16_to_cpu(pcysta->a2dp_ept.tmax));
9162 struct rtw89_btc_bt_info *bt = &rtwdev->btc.cx.bt;
9163 struct rtw89_btc_bt_a2dp_desc *a2dp = &bt->link_info.a2dp_desc;
9164 struct rtw89_btc_btf_fwinfo *pfwinfo = &rtwdev->btc.fwinfo;
9166 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
9172 pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo;
9173 if (!pcinfo->valid)
9176 pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v7;
9177 seq_printf(m, "\n\r %-15s : cycle:%d", "[slot_stat]",
9178 le16_to_cpu(pcysta->cycles));
9181 if (!le16_to_cpu(pcysta->slot_cnt[i]))
9184 id_to_slot(i), le16_to_cpu(pcysta->slot_cnt[i]));
9187 if (dm->tdma_now.rxflctrl)
9189 le32_to_cpu(pcysta->leak_slot.cnt_rximr));
9191 if (pcysta->collision_cnt)
9192 seq_printf(m, ", collision:%d", pcysta->collision_cnt);
9194 if (pcysta->skip_cnt)
9195 seq_printf(m, ", skip:%d", le16_to_cpu(pcysta->skip_cnt));
9197 seq_printf(m, "\n\r %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]",
9199 le16_to_cpu(pcysta->cycle_time.tavg[CXT_WL]),
9200 le16_to_cpu(pcysta->cycle_time.tavg[CXT_BT]),
9201 le16_to_cpu(pcysta->leak_slot.tavg) / 1000,
9202 le16_to_cpu(pcysta->leak_slot.tavg) % 1000);
9204 le16_to_cpu(pcysta->cycle_time.tmax[CXT_WL]),
9205 le16_to_cpu(pcysta->cycle_time.tmax[CXT_BT]),
9206 dm->bt_slot_flood, dm->cnt_dm[BTC_DCNT_BT_SLOT_FLOOD],
9207 le16_to_cpu(pcysta->leak_slot.tamx) / 1000,
9208 le16_to_cpu(pcysta->leak_slot.tamx) % 1000);
9210 le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL]),
9211 le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL_OK]),
9212 le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_SLOT]),
9213 le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_OK]));
9215 if (a2dp->exist) {
9217 "\n\r %-15s : a2dp_ept:%d, a2dp_late:%d(streak 2S:%d/max:%d)",
9219 le16_to_cpu(pcysta->a2dp_ept.cnt),
9220 le16_to_cpu(pcysta->a2dp_ept.cnt_timeout),
9221 a2dp->no_empty_streak_2s, a2dp->no_empty_streak_max);
9224 le16_to_cpu(pcysta->a2dp_ept.tavg),
9225 le16_to_cpu(pcysta->a2dp_ept.tmax));
9228 if (le16_to_cpu(pcysta->cycles) <= 1)
9231 /* 1 cycle = 1 wl-slot + 1 bt-slot */
9234 if (le16_to_cpu(pcysta->cycles) <= slot_pair)
9237 c_begin = le16_to_cpu(pcysta->cycles) - slot_pair + 1;
9239 c_end = le16_to_cpu(pcysta->cycles);
9241 if (a2dp->exist)
9251 s_id = ((cycle - 1) % slot_pair) * 2;
9254 if (a2dp->exist)
9255 seq_printf(m, "\n\r %-15s : ", "[slotT_wermtan]");
9257 seq_printf(m, "\n\r %-15s : ", "[slotT_rxerr]");
9260 seq_printf(m, "->b%d", le16_to_cpu(pcysta->slot_step_time[s_id]));
9262 if (a2dp->exist)
9264 pcysta->wl_rx_err_ratio[s_id],
9265 pcysta->a2dp_trx[s_id].empty_cnt,
9266 pcysta->a2dp_trx[s_id].retry_cnt,
9267 (pcysta->a2dp_trx[s_id].tx_rate ? 3 : 2),
9268 pcysta->a2dp_trx[s_id].tx_cnt,
9269 pcysta->a2dp_trx[s_id].ack_cnt,
9270 pcysta->a2dp_trx[s_id].nack_cnt);
9272 seq_printf(m, "(%d)", pcysta->wl_rx_err_ratio[s_id]);
9274 seq_printf(m, "->w%d", le16_to_cpu(pcysta->slot_step_time[s_id + 1]));
9276 if (a2dp->exist)
9278 pcysta->wl_rx_err_ratio[s_id + 1],
9279 pcysta->a2dp_trx[s_id + 1].empty_cnt,
9280 pcysta->a2dp_trx[s_id + 1].retry_cnt,
9281 (pcysta->a2dp_trx[s_id + 1].tx_rate ? 3 : 2),
9282 pcysta->a2dp_trx[s_id + 1].tx_cnt,
9283 pcysta->a2dp_trx[s_id + 1].ack_cnt,
9284 pcysta->a2dp_trx[s_id + 1].nack_cnt);
9286 seq_printf(m, "(%d)", pcysta->wl_rx_err_ratio[s_id + 1]);
9292 struct rtw89_btc *btc = &rtwdev->btc;
9293 const struct rtw89_btc_ver *ver = btc->ver;
9294 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9299 if (!btc->dm.tdma_now.rxflctrl)
9302 pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo;
9303 if (!pcinfo->valid)
9306 ns = &pfwinfo->rpt_fbtc_nullsta.finfo;
9307 if (ver->fcxnullsta == 1) {
9309 seq_printf(m, " %-15s : ", "[NULL-STA]");
9310 seq_printf(m, "null-%d", i);
9312 le32_to_cpu(ns->v1.result[i][1]));
9314 le32_to_cpu(ns->v1.result[i][0]));
9316 le32_to_cpu(ns->v1.result[i][2]));
9318 le32_to_cpu(ns->v1.result[i][3]));
9320 le32_to_cpu(ns->v1.avg_t[i]) / 1000,
9321 le32_to_cpu(ns->v1.avg_t[i]) % 1000);
9323 le32_to_cpu(ns->v1.max_t[i]) / 1000,
9324 le32_to_cpu(ns->v1.max_t[i]) % 1000);
9326 } else if (ver->fcxnullsta == 7) {
9328 seq_printf(m, " %-15s : ", "[NULL-STA]");
9329 seq_printf(m, "null-%d", i);
9331 le32_to_cpu(ns->v7.result[i][4]));
9333 le32_to_cpu(ns->v7.result[i][1]));
9335 le32_to_cpu(ns->v7.result[i][0]));
9337 le32_to_cpu(ns->v7.result[i][2]));
9339 le32_to_cpu(ns->v7.result[i][3]));
9341 le32_to_cpu(ns->v7.tavg[i]) / 1000,
9342 le32_to_cpu(ns->v7.tavg[i]) % 1000);
9344 le32_to_cpu(ns->v7.tmax[i]) / 1000,
9345 le32_to_cpu(ns->v7.tmax[i]) % 1000);
9349 seq_printf(m, " %-15s : ", "[NULL-STA]");
9350 seq_printf(m, "null-%d", i);
9352 le32_to_cpu(ns->v2.result[i][4]));
9354 le32_to_cpu(ns->v2.result[i][1]));
9356 le32_to_cpu(ns->v2.result[i][0]));
9358 le32_to_cpu(ns->v2.result[i][2]));
9360 le32_to_cpu(ns->v2.result[i][3]));
9362 le32_to_cpu(ns->v2.avg_t[i]) / 1000,
9363 le32_to_cpu(ns->v2.avg_t[i]) % 1000);
9365 le32_to_cpu(ns->v2.max_t[i]) / 1000,
9366 le32_to_cpu(ns->v2.max_t[i]) % 1000);
9373 struct rtw89_btc *btc = &rtwdev->btc;
9374 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9377 const struct rtw89_btc_ver *ver = btc->ver;
9383 pcinfo = &pfwinfo->rpt_fbtc_step.cinfo;
9384 if (!pcinfo->valid)
9387 pstep = &pfwinfo->rpt_fbtc_step.finfo.v2;
9388 pos_old = le16_to_cpu(pstep->pos_old);
9389 pos_new = le16_to_cpu(pstep->pos_new);
9391 if (pcinfo->req_fver != pstep->fver)
9398 if (ver->fcxctrl == 7 || ver->fcxctrl == 1)
9401 trace_step = btc->ctrl.ctrl.trace_step;
9407 n_stop = trace_step - 1;
9413 type = pstep->step[i].type;
9414 val = pstep->step[i].val;
9415 diff_t = le16_to_cpu(pstep->step[i].difft);
9421 seq_printf(m, " %-15s : ", "[steps]");
9423 seq_printf(m, "-> %s(%02d)(%02d)",
9448 struct rtw89_btc *btc = &rtwdev->btc;
9449 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9456 if ((pfwinfo->rpt_en_map &
9460 pcinfo = &pfwinfo->rpt_fbtc_step.cinfo;
9461 if (!pcinfo->valid)
9464 pstep = &pfwinfo->rpt_fbtc_step.finfo.v3;
9465 if (pcinfo->req_fver != pstep->fver)
9468 if (le32_to_cpu(pstep->cnt) <= FCXDEF_STEP)
9471 n_begin = le32_to_cpu(pstep->cnt) - FCXDEF_STEP + 1;
9473 n_end = le32_to_cpu(pstep->cnt);
9480 array_idx = (i - 1) % FCXDEF_STEP;
9481 type = pstep->step[array_idx].type;
9482 val = pstep->step[array_idx].val;
9483 diff_t = le16_to_cpu(pstep->step[array_idx].difft);
9489 seq_printf(m, " %-15s : ", "[steps]");
9491 seq_printf(m, "-> %s(%02d)",
9505 struct rtw89_btc *btc = &rtwdev->btc;
9506 const struct rtw89_btc_ver *ver = btc->ver;
9508 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_DM))
9515 if (ver->fcxcysta == 2)
9517 else if (ver->fcxcysta == 3)
9519 else if (ver->fcxcysta == 4)
9521 else if (ver->fcxcysta == 5)
9523 else if (ver->fcxcysta == 7)
9528 if (ver->fcxstep == 2)
9530 else if (ver->fcxstep == 3)
9537 const struct rtw89_chip_info *chip = rtwdev->chip;
9541 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B ||
9542 chip->chip_id == RTL8851B || chip->chip_id == RTL8852BT) {
9546 gnt = &gnt_cfg->band[0];
9547 gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S0_SW_CTRL);
9548 gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S0_STA);
9549 gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S0_SW_CTRL);
9550 gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S0_STA);
9552 gnt = &gnt_cfg->band[1];
9553 gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S1_SW_CTRL);
9554 gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S1_STA);
9555 gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S1_SW_CTRL);
9556 gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S1_STA);
9557 } else if (chip->chip_id == RTL8852C) {
9561 gnt = &gnt_cfg->band[0];
9562 gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S0_SWCTRL);
9563 gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S0);
9564 gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S0_SWCTRL);
9565 gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S0);
9567 gnt = &gnt_cfg->band[1];
9568 gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S1_SWCTRL);
9569 gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S1);
9570 gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S1_SWCTRL);
9571 gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S1);
9579 struct rtw89_btc_btf_fwinfo *pfwinfo = &rtwdev->btc.fwinfo;
9580 const struct rtw89_btc_ver *ver = rtwdev->btc.ver;
9586 pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo;
9587 gdbg = &rtwdev->btc.fwinfo.rpt_fbtc_gpio_dbg.finfo;
9588 if (!pcinfo->valid) {
9596 if (ver->fcxgpiodbg == 7) {
9597 en_map = le32_to_cpu(gdbg->v7.en_map);
9598 gpio_map = gdbg->v7.gpio_map;
9600 en_map = le32_to_cpu(gdbg->v1.en_map);
9601 gpio_map = gdbg->v1.gpio_map;
9607 seq_printf(m, " %-15s : enable_map:0x%08x",
9613 seq_printf(m, ", %s->GPIO%d", id_to_gdbg(i), gpio_map[i]);
9620 const struct rtw89_chip_info *chip = rtwdev->chip;
9621 struct rtw89_btc *btc = &rtwdev->btc;
9622 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9625 struct rtw89_btc_cx *cx = &btc->cx;
9626 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
9627 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
9633 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_MREG))
9639 " %-15s : WL->BT:0x%08x(cnt:%d), BT->WL:0x%08x(total:%d, bt_update:%d)\n",
9640 "[scoreboard]", wl->scbd, cx->cnt_wl[BTC_WCNT_SCBDUPDATE],
9641 bt->scbd, cx->cnt_bt[BTC_BCNT_SCBDREAD],
9642 cx->cnt_bt[BTC_BCNT_SCBDUPDATE]);
9644 btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
9649 " %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ",
9651 chip->chip_id == RTL8852C ? "HW" :
9652 btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
9657 seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
9663 pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
9664 if (!pcinfo->valid) {
9671 pmreg = &pfwinfo->rpt_fbtc_mregval.finfo.v1;
9674 __func__, pmreg->reg_num);
9676 for (i = 0; i < pmreg->reg_num; i++) {
9677 type = (u8)le16_to_cpu(chip->mon_reg[i].type);
9678 offset = le32_to_cpu(chip->mon_reg[i].offset);
9679 val = le32_to_cpu(pmreg->mreg_val[i]);
9682 seq_printf(m, " %-15s : %d_0x%04x=0x%08x",
9691 if (i >= pmreg->reg_num)
9698 const struct rtw89_chip_info *chip = rtwdev->chip;
9699 struct rtw89_btc *btc = &rtwdev->btc;
9700 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9703 struct rtw89_btc_cx *cx = &btc->cx;
9704 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
9705 struct rtw89_btc_bt_info *bt = &btc->cx.bt;
9711 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_MREG))
9717 " %-15s : WL->BT:0x%08x(cnt:%d), BT->WL:0x%08x(total:%d, bt_update:%d)\n",
9718 "[scoreboard]", wl->scbd, cx->cnt_wl[BTC_WCNT_SCBDUPDATE],
9719 bt->scbd, cx->cnt_bt[BTC_BCNT_SCBDREAD],
9720 cx->cnt_bt[BTC_BCNT_SCBDUPDATE]);
9722 btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
9727 " %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], polut_type:%s",
9729 chip->chip_id == RTL8852C ? "HW" :
9730 btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
9733 id_to_polut(wl->bt_polut_type[wl->pta_req_mac]));
9736 seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
9742 pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
9743 if (!pcinfo->valid) {
9750 pmreg = &pfwinfo->rpt_fbtc_mregval.finfo.v2;
9753 __func__, pmreg->reg_num);
9755 for (i = 0; i < pmreg->reg_num; i++) {
9756 type = (u8)le16_to_cpu(chip->mon_reg[i].type);
9757 offset = le32_to_cpu(chip->mon_reg[i].offset);
9758 val = le32_to_cpu(pmreg->mreg_val[i]);
9761 seq_printf(m, " %-15s : %d_0x%04x=0x%08x",
9770 if (i >= pmreg->reg_num)
9777 struct rtw89_btc *btc = &rtwdev->btc;
9778 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9781 struct rtw89_btc_cx *cx = &btc->cx;
9782 struct rtw89_btc_wl_info *wl = &cx->wl;
9783 struct rtw89_btc_bt_info *bt = &cx->bt;
9785 struct rtw89_btc_dm *dm = &btc->dm;
9789 if (!(dm->coex_info_map & BTC_COEX_INFO_MREG))
9795 "\n\r %-15s : WL->BT:0x%08x(cnt:%d), BT->WL:0x%08x(total:%d, bt_update:%d)",
9796 "[scoreboard]", wl->scbd, cx->cnt_wl[BTC_WCNT_SCBDUPDATE],
9797 bt->scbd, cx->cnt_bt[BTC_BCNT_SCBDREAD],
9798 cx->cnt_bt[BTC_BCNT_SCBDUPDATE]);
9800 /* To avoid I/O if WL LPS or power-off */
9801 dm->pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
9804 "\n\r %-15s : pta_owner:%s, pta_req_mac:MAC%d, rf_gnt_source: polut_type:%s",
9806 rtwdev->chip->para_ver & BTC_FEAT_PTA_ONOFF_CTRL ? "HW" :
9807 dm->pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
9808 wl->pta_req_mac, id_to_polut(wl->bt_polut_type[wl->pta_req_mac]));
9810 gnt = &dm->gnt.band[RTW89_PHY_0];
9812 seq_printf(m, ", phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d]",
9813 gnt->gnt_wl_sw_en ? "SW" : "HW", gnt->gnt_wl,
9814 gnt->gnt_bt_sw_en ? "SW" : "HW", gnt->gnt_bt);
9816 if (rtwdev->dbcc_en) {
9817 gnt = &dm->gnt.band[RTW89_PHY_1];
9818 seq_printf(m, ", phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]",
9819 gnt->gnt_wl_sw_en ? "SW" : "HW", gnt->gnt_wl,
9820 gnt->gnt_bt_sw_en ? "SW" : "HW", gnt->gnt_bt);
9823 pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
9824 if (!pcinfo->valid)
9827 pmreg = &pfwinfo->rpt_fbtc_mregval.finfo.v7;
9829 for (i = 0; i < pmreg->reg_num; i++) {
9830 type = (u8)le16_to_cpu(rtwdev->chip->mon_reg[i].type);
9831 offset = le32_to_cpu(rtwdev->chip->mon_reg[i].offset);
9832 val = le32_to_cpu(pmreg->mreg_val[i]);
9835 seq_printf(m, "\n\r %-15s : %s_0x%x=0x%x", "[reg]",
9847 struct rtw89_btc *btc = &rtwdev->btc;
9848 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9851 struct rtw89_btc_cx *cx = &btc->cx;
9852 struct rtw89_btc_dm *dm = &btc->dm;
9853 struct rtw89_btc_wl_info *wl = &cx->wl;
9854 struct rtw89_btc_bt_info *bt = &cx->bt;
9855 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
9858 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
9863 pcinfo = &pfwinfo->rpt_ctrl.cinfo;
9864 if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) {
9865 prptctrl = &pfwinfo->rpt_ctrl.finfo.v1;
9868 " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d), ",
9869 "[summary]", pfwinfo->cnt_h2c,
9870 pfwinfo->cnt_h2c_fail, prptctrl->h2c_cnt,
9871 pfwinfo->cnt_c2h, prptctrl->c2h_cnt);
9875 pfwinfo->event[BTF_EVNT_RPT], prptctrl->rpt_cnt,
9876 prptctrl->rpt_enable, dm->error.val);
9878 if (dm->error.map.wl_fw_hang)
9882 " %-15s : send_ok:%d, send_fail:%d, recv:%d",
9883 "[mailbox]", prptctrl->mb_send_ok_cnt,
9884 prptctrl->mb_send_fail_cnt, prptctrl->mb_recv_cnt);
9888 prptctrl->mb_a2dp_empty_cnt,
9889 prptctrl->mb_a2dp_flct_cnt,
9890 prptctrl->mb_a2dp_full_cnt);
9893 " %-15s : wl_rfk[req:%d/go:%d/reject:%d/timeout:%d]",
9894 "[RFK]", cx->cnt_wl[BTC_WCNT_RFK_REQ],
9895 cx->cnt_wl[BTC_WCNT_RFK_GO],
9896 cx->cnt_wl[BTC_WCNT_RFK_REJECT],
9897 cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]);
9901 prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_REQ],
9902 prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_GO],
9903 prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_REJECT],
9904 prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_TIMEOUT],
9905 prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_FAIL]);
9907 if (prptctrl->bt_rfk_cnt[BTC_BCNT_RFK_TIMEOUT] > 0)
9908 bt->rfk_info.map.timeout = 1;
9910 bt->rfk_info.map.timeout = 0;
9912 dm->error.map.wl_rfk_timeout = bt->rfk_info.map.timeout;
9915 " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d, rpt_cnt=%d, rpt_map=0x%x",
9916 "[summary]", pfwinfo->cnt_h2c,
9917 pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h,
9918 pfwinfo->event[BTF_EVNT_RPT],
9919 btc->fwinfo.rpt_en_map);
9924 cnt_sum += dm->cnt_notify[i];
9927 " %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ",
9938 " %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ",
9951 struct rtw89_btc *btc = &rtwdev->btc;
9952 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
9955 struct rtw89_btc_cx *cx = &btc->cx;
9956 struct rtw89_btc_dm *dm = &btc->dm;
9957 struct rtw89_btc_wl_info *wl = &cx->wl;
9958 struct rtw89_btc_bt_info *bt = &cx->bt;
9959 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
9962 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
9967 pcinfo = &pfwinfo->rpt_ctrl.cinfo;
9968 if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) {
9969 prptctrl = &pfwinfo->rpt_ctrl.finfo.v4;
9972 " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d), ",
9973 "[summary]", pfwinfo->cnt_h2c,
9974 pfwinfo->cnt_h2c_fail,
9975 le32_to_cpu(prptctrl->rpt_info.cnt_h2c),
9976 pfwinfo->cnt_c2h,
9977 le32_to_cpu(prptctrl->rpt_info.cnt_c2h));
9981 pfwinfo->event[BTF_EVNT_RPT],
9982 le32_to_cpu(prptctrl->rpt_info.cnt),
9983 le32_to_cpu(prptctrl->rpt_info.en),
9984 dm->error.val);
9986 if (dm->error.map.wl_fw_hang)
9990 " %-15s : send_ok:%d, send_fail:%d, recv:%d, ",
9992 le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_ok),
9993 le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_fail),
9994 le32_to_cpu(prptctrl->bt_mbx_info.cnt_recv));
9998 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_empty),
9999 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_flowctrl),
10000 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_tx),
10001 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_ack),
10002 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_nack));
10005 " %-15s : wl_rfk[req:%d/go:%d/reject:%d/timeout:%d]",
10006 "[RFK]", cx->cnt_wl[BTC_WCNT_RFK_REQ],
10007 cx->cnt_wl[BTC_WCNT_RFK_GO],
10008 cx->cnt_wl[BTC_WCNT_RFK_REJECT],
10009 cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]);
10013 le32_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REQ]),
10014 le32_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_GO]),
10015 le32_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REJECT]),
10016 le32_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_TIMEOUT]),
10017 le32_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_FAIL]));
10019 if (le32_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0)
10020 bt->rfk_info.map.timeout = 1;
10022 bt->rfk_info.map.timeout = 0;
10024 dm->error.map.wl_rfk_timeout = bt->rfk_info.map.timeout;
10027 " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d, rpt_cnt=%d, rpt_map=0x%x",
10028 "[summary]", pfwinfo->cnt_h2c,
10029 pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h,
10030 pfwinfo->event[BTF_EVNT_RPT],
10031 btc->fwinfo.rpt_en_map);
10036 cnt_sum += dm->cnt_notify[i];
10039 " %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ",
10050 " %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ",
10063 struct rtw89_btc *btc = &rtwdev->btc;
10064 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
10067 struct rtw89_btc_cx *cx = &btc->cx;
10068 struct rtw89_btc_dm *dm = &btc->dm;
10069 struct rtw89_btc_wl_info *wl = &cx->wl;
10070 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
10073 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
10078 pcinfo = &pfwinfo->rpt_ctrl.cinfo;
10079 if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) {
10080 prptctrl = &pfwinfo->rpt_ctrl.finfo.v5;
10083 " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d, len:%d), ",
10084 "[summary]", pfwinfo->cnt_h2c, pfwinfo->cnt_h2c_fail,
10085 le16_to_cpu(prptctrl->rpt_info.cnt_h2c),
10086 pfwinfo->cnt_c2h,
10087 le16_to_cpu(prptctrl->rpt_info.cnt_c2h),
10088 le16_to_cpu(prptctrl->rpt_info.len_c2h));
10092 pfwinfo->event[BTF_EVNT_RPT],
10093 le16_to_cpu(prptctrl->rpt_info.cnt),
10094 le32_to_cpu(prptctrl->rpt_info.en));
10096 if (dm->error.map.wl_fw_hang)
10100 " %-15s : send_ok:%d, send_fail:%d, recv:%d, ",
10102 le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_ok),
10103 le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_fail),
10104 le32_to_cpu(prptctrl->bt_mbx_info.cnt_recv));
10108 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_empty),
10109 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_flowctrl),
10110 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_tx),
10111 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_ack),
10112 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_nack));
10115 " %-15s : wl_rfk[req:%d/go:%d/reject:%d/tout:%d]",
10116 "[RFK/LPS]", cx->cnt_wl[BTC_WCNT_RFK_REQ],
10117 cx->cnt_wl[BTC_WCNT_RFK_GO],
10118 cx->cnt_wl[BTC_WCNT_RFK_REJECT],
10119 cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]);
10123 le16_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REQ]));
10127 le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on),
10128 le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off));
10131 " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d",
10132 "[summary]", pfwinfo->cnt_h2c,
10133 pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h);
10136 if (!pcinfo->valid || pfwinfo->len_mismch || pfwinfo->fver_mismch ||
10137 pfwinfo->err[BTFRE_EXCEPTION]) {
10140 " %-15s : WL FW rpt error!![rpt_ctrl_valid:%d/len:"
10142 "[ERROR]", pcinfo->valid, pfwinfo->len_mismch,
10143 pfwinfo->fver_mismch, pfwinfo->err[BTFRE_EXCEPTION],
10144 wl->status.map.lps, wl->status.map.rf_off);
10148 cnt_sum += dm->cnt_notify[i];
10152 " %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ",
10165 " %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ",
10178 struct rtw89_btc *btc = &rtwdev->btc;
10179 struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
10182 struct rtw89_btc_cx *cx = &btc->cx;
10183 struct rtw89_btc_dm *dm = &btc->dm;
10184 struct rtw89_btc_wl_info *wl = &cx->wl;
10185 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
10188 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
10193 pcinfo = &pfwinfo->rpt_ctrl.cinfo;
10194 if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) {
10195 prptctrl = &pfwinfo->rpt_ctrl.finfo.v105;
10198 " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d, len:%d), ",
10199 "[summary]", pfwinfo->cnt_h2c, pfwinfo->cnt_h2c_fail,
10200 le16_to_cpu(prptctrl->rpt_info.cnt_h2c),
10201 pfwinfo->cnt_c2h,
10202 le16_to_cpu(prptctrl->rpt_info.cnt_c2h),
10203 le16_to_cpu(prptctrl->rpt_info.len_c2h));
10207 pfwinfo->event[BTF_EVNT_RPT],
10208 le16_to_cpu(prptctrl->rpt_info.cnt),
10209 le32_to_cpu(prptctrl->rpt_info.en));
10211 if (dm->error.map.wl_fw_hang)
10215 " %-15s : send_ok:%d, send_fail:%d, recv:%d, ",
10217 le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_ok),
10218 le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_fail),
10219 le32_to_cpu(prptctrl->bt_mbx_info.cnt_recv));
10223 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_empty),
10224 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_flowctrl),
10225 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_tx),
10226 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_ack),
10227 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_nack));
10230 " %-15s : wl_rfk[req:%d/go:%d/reject:%d/tout:%d]",
10231 "[RFK/LPS]", cx->cnt_wl[BTC_WCNT_RFK_REQ],
10232 cx->cnt_wl[BTC_WCNT_RFK_GO],
10233 cx->cnt_wl[BTC_WCNT_RFK_REJECT],
10234 cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]);
10238 le16_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REQ]));
10242 le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on),
10243 le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off));
10246 " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d",
10247 "[summary]", pfwinfo->cnt_h2c,
10248 pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h);
10251 if (!pcinfo->valid || pfwinfo->len_mismch || pfwinfo->fver_mismch ||
10252 pfwinfo->err[BTFRE_EXCEPTION]) {
10255 " %-15s : WL FW rpt error!![rpt_ctrl_valid:%d/len:"
10257 "[ERROR]", pcinfo->valid, pfwinfo->len_mismch,
10258 pfwinfo->fver_mismch, pfwinfo->err[BTFRE_EXCEPTION],
10259 wl->status.map.lps, wl->status.map.rf_off);
10263 cnt_sum += dm->cnt_notify[i];
10267 " %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ",
10280 " %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ",
10293 struct rtw89_btc_btf_fwinfo *pfwinfo = &rtwdev->btc.fwinfo;
10296 struct rtw89_btc_cx *cx = &rtwdev->btc.cx;
10297 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
10298 struct rtw89_btc_wl_info *wl = &cx->wl;
10299 u32 *cnt = rtwdev->btc.dm.cnt_notify;
10303 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
10308 pcinfo = &pfwinfo->rpt_ctrl.cinfo;
10309 if (pcinfo->valid && wl->status.map.lps != BTC_LPS_RF_OFF &&
10310 !wl->status.map.rf_off) {
10311 prptctrl = &pfwinfo->rpt_ctrl.finfo.v8;
10314 "\n\r %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d, len:%d, max:fw-%d/drv-%d), ",
10315 "[summary]", pfwinfo->cnt_h2c, pfwinfo->cnt_h2c_fail,
10316 le16_to_cpu(prptctrl->rpt_info.cnt_h2c), pfwinfo->cnt_c2h,
10317 le16_to_cpu(prptctrl->rpt_info.cnt_c2h),
10318 le16_to_cpu(prptctrl->rpt_info.len_c2h),
10319 (prptctrl->rpt_len_max_h << 8) + prptctrl->rpt_len_max_l,
10320 rtwdev->btc.ver->info_buf);
10323 pfwinfo->event[BTF_EVNT_RPT],
10324 le16_to_cpu(prptctrl->rpt_info.cnt),
10325 le32_to_cpu(prptctrl->rpt_info.en));
10327 if (dm->error.map.wl_fw_hang)
10330 seq_printf(m, "\n\r %-15s : send_ok:%d, send_fail:%d, recv:%d, ",
10331 "[mailbox]", le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_ok),
10332 le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_fail),
10333 le32_to_cpu(prptctrl->bt_mbx_info.cnt_recv));
10336 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_empty),
10337 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_flowctrl),
10338 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_tx),
10339 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_ack),
10340 le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_nack));
10343 "\n\r %-15s : wl_rfk[req:%d/go:%d/reject:%d/tout:%d/time:%dms]",
10344 "[RFK/LPS]", cx->cnt_wl[BTC_WCNT_RFK_REQ],
10345 cx->cnt_wl[BTC_WCNT_RFK_GO],
10346 cx->cnt_wl[BTC_WCNT_RFK_REJECT],
10347 cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT],
10348 wl->rfk_info.proc_time);
10351 le16_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REQ]));
10354 le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on),
10355 le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off));
10358 "\n\r %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d (lps=%d/rf_off=%d)",
10360 pfwinfo->cnt_h2c, pfwinfo->cnt_h2c_fail,
10361 pfwinfo->cnt_c2h,
10362 wl->status.map.lps, wl->status.map.rf_off);
10366 cnt_sum += dm->cnt_notify[i];
10369 "\n\r %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ",
10381 "\n\r %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, switch_chbw=%d, special_pkt=%d, ",
10389 rtwdev->btc.hubmsg_cnt, cnt[BTC_NCNT_RESUME_DL_FW],
10395 struct rtw89_fw_suit *fw_suit = &rtwdev->fw.normal;
10396 struct rtw89_btc *btc = &rtwdev->btc;
10397 const struct rtw89_btc_ver *ver = btc->ver;
10398 struct rtw89_btc_cx *cx = &btc->cx;
10399 struct rtw89_btc_bt_info *bt = &cx->bt;
10403 fw_suit->major_ver, fw_suit->minor_ver,
10404 fw_suit->sub_ver, fw_suit->sub_idex);
10405 seq_printf(m, "manual %d\n", btc->manual_ctrl);
10409 seq_printf(m, "\n\r %-15s : raw_data[%02x %02x %02x %02x %02x %02x] (type:%s/cnt:%d/same:%d)",
10411 bt->raw_info[2], bt->raw_info[3],
10412 bt->raw_info[4], bt->raw_info[5],
10413 bt->raw_info[6], bt->raw_info[7],
10414 bt->raw_info[0] == BTC_BTINFO_AUTO ? "auto" : "reply",
10415 cx->cnt_bt[BTC_BCNT_INFOUPDATE],
10416 cx->cnt_bt[BTC_BCNT_INFOSAME]);
10426 if (ver->fcxmreg == 1)
10428 else if (ver->fcxmreg == 2)
10430 else if (ver->fcxmreg == 7)
10435 if (ver->fcxbtcrpt == 1)
10437 else if (ver->fcxbtcrpt == 4)
10439 else if (ver->fcxbtcrpt == 5)
10441 else if (ver->fcxbtcrpt == 105)
10443 else if (ver->fcxbtcrpt == 8)
10449 const struct rtw89_chip_info *chip = rtwdev->chip;
10450 struct rtw89_btc *btc = &rtwdev->btc;
10462 if (chip->chip_id != btc_ver_def->chip_id)
10465 if (suit_ver_code >= btc_ver_def->fw_ver_code) {
10466 btc->ver = btc_ver_def;
10471 btc->ver = &rtw89_btc_ver_defs[RTW89_DEFAULT_BTC_VER_IDX];
10475 (int)(btc->ver - rtw89_btc_ver_defs), btc->ver->fw_ver_code);