Lines Matching defs:idx
127 enum rtw89_sub_entity_idx idx,
131 struct rtw89_chan *chan = &hal->sub[idx].chan;
132 struct rtw89_chan_rcd *rcd = &hal->sub[idx].rcd;
152 u8 idx;
156 for_each_set_bit(idx, hal->entity_map, NUM_OF_RTW89_SUB_ENTITY) {
157 chan = rtw89_chan_get(rtwdev, idx);
167 enum rtw89_sub_entity_idx idx,
173 hal->sub[idx].chandef = *chandef;
176 set_bit(idx, hal->entity_map);
180 enum rtw89_sub_entity_idx idx,
183 __rtw89_config_entity_chandef(rtwdev, idx, chandef, true);
187 enum rtw89_sub_entity_idx idx,
195 RTW89_SUB_ENTITY_IDLE, idx);
198 "ROC still processing on entity %d\n", idx);
204 cur = atomic_cmpxchg(&hal->roc_entity_idx, idx,
206 if (cur == idx)
211 "ROC already finished on entity %d\n", idx);
243 int idx;
245 for_each_set_bit(idx, hal->entity_map, NUM_OF_RTW89_SUB_ENTITY) {
246 cfg = hal->sub[idx].cfg;
271 u8 idx;
307 for_each_set_bit(idx, recalc_map, NUM_OF_RTW89_SUB_ENTITY) {
308 chandef = rtw89_chandef_get(rtwdev, idx);
311 WARN(1, "Invalid channel on chanctx %d\n", idx);
315 rtw89_assign_entity_chan(rtwdev, idx, &chan);
373 unsigned int idx;
378 for (idx = 0; idx < NUM_OF_RTW89_MCC_ROLES; idx++) {
379 ret = iterator(rtwdev, roles[idx], idx, data);
492 unsigned int idx = bit / 8;
495 if (idx >= ARRAY_SIZE(mcc_role->macid_bitmap))
498 mcc_role->macid_bitmap[idx] |= BIT(pos);
2353 hal->sub[idx1].cfg->idx = idx2;
2354 hal->sub[idx2].cfg->idx = idx1;
2380 u8 idx;
2382 idx = find_first_zero_bit(hal->entity_map, NUM_OF_RTW89_SUB_ENTITY);
2383 if (idx >= chip->support_chanctx_num)
2386 rtw89_config_entity_chandef(rtwdev, idx, &ctx->def);
2387 cfg->idx = idx;
2389 hal->sub[idx].cfg = cfg;
2399 clear_bit(cfg->idx, hal->entity_map);
2407 u8 idx = cfg->idx;
2410 rtw89_config_entity_chandef(rtwdev, idx, &ctx->def);
2422 rtwvif->sub_entity_idx = cfg->idx;
2426 if (cfg->idx == RTW89_SUB_ENTITY_0)
2434 rtw89_swap_sub_entity(rtwdev, cfg->idx, RTW89_SUB_ENTITY_0);
2457 if (cfg->idx != RTW89_SUB_ENTITY_0)
2461 cfg->idx + 1);
2469 rtw89_swap_sub_entity(rtwdev, cfg->idx, roll);