Lines Matching +full:12 +full:bit

164 	le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(15, 12))
182 #define BIT_LDOE25_PON		BIT(0)
199 #define BITS_SUBTUNE		GENMASK(15, 12)
210 #define BIT_PT_OPT		BIT(21)
213 #define BIT_PATH_EN		BIT(31)
215 #define BIT_DIS_SHARERX_TXGAT	BIT(27)
216 #define BIT_3WIRE_TX_EN		BIT(0)
217 #define BIT_3WIRE_RX_EN		BIT(1)
219 #define BIT_3WIRE_PI_ON		BIT(28)
221 #define BIT_ANAPAR_UPDATE	BIT(29)
223 #define BIT_RFTXEN_GCK_FORCE_ON	BIT(31)
225 #define BIT_TX_SCALE_0DB	BIT(7)
227 #define BITS_RXAGC_CCK		GENMASK(15, 12)
238 #define BITS_RX_IQ_WEIGHT	(BIT(8) | BIT(9))
243 #define BIT_CCK_FA_RST		(BIT(14) | BIT(15))
244 #define BIT_OFDM_FA_RST		(BIT(12) | BIT(13))
247 #define BIT_BB_CCK_CHECK_EN	BIT(18)
254 #define BIT_NBI_EN		BIT(30)
262 #define BIT_DPD_EN		BIT(31)
263 #define BIT_PS_EN		BIT(7)
268 #define BIT_BYPASS_DPD		BIT(25)
272 #define BIT_GLOSS_DB		GENMASK(14, 12)
278 #define BIT_GAIN_RST		BIT(15)
279 #define BIT_Q_GAIN_SEL		GENMASK(14, 12)
285 #define BIT_IRQ_TEST_MODE	BIT(20)
287 #define BIT_INNER_LB		BIT(21)
292 #define BIT_RPT_EN		BIT(21)
304 #define BIT_GAPK_RPT3		GENMASK(15, 12)
313 #define BIT_CCK_BLK_EN		BIT(1)
314 #define BIT_CCK_OFDM_BLK_EN	(BIT(0) | BIT(1))
317 #define BIT_RSTB_3WIRE		BIT(8)
319 #define BIT_TST_IQK2SET_SRC	BIT(31)
320 #define BIT_EN_IOQ_IQK_DPK	BIT(30)
321 #define BIT_IQK_DPK_RESET_SRC	BIT(29)
322 #define BIT_IQK_DPK_CLOCK_SRC	BIT(28)
325 #define BIT_COM_RX_GCK_EN	BIT(31)
332 #define BIT_IQK_DPK_EN		BIT(17)
340 #define BIT_ALL_CNT_RST		BIT(25)
357 #define BIT_EXT_TIA_BW		BIT(1)
370 #define BIT_TX_CCK_IND		BIT(16)
371 #define BIT_BW_TXBB		GENMASK(14, 12)
373 #define BIT_DBG_CCK_CCA		BIT(1)
385 #define RF_PABIAS_2G_MASK	GENMASK(15, 12)
389 #define BIT_LB_SW		GENMASK(13, 12)
392 #define BIT_RXG_GAIN		BIT(18)
396 #define BIT_PW_EXT_TIA		BIT(1)
398 #define BIT_TXBB		BIT(10)
399 #define BIT_TIA_BYPASS		BIT(5)
401 #define BIT_DE_PWR_TRIM		BIT(19)
402 #define BIT_DE_TX_GAIN		BIT(16)
403 #define BIT_DE_TRXBW		BIT(2)