Lines Matching defs:dpk_info
3176 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3179 dpk_info->gnt_control = rtw_read32(rtwdev, 0x70);
3180 dpk_info->gnt_value = rtw_coex_read_indirect_reg(rtwdev, 0x38);
3185 dpk_info->gnt_value);
3186 rtw_write32(rtwdev, 0x70, dpk_info->gnt_control);
3242 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3253 dpk_info->dpk_band = 1 << band_shift;
3254 dpk_info->dpk_ch = FIELD_GET(0xff, reg);
3255 dpk_info->dpk_bw = FIELD_GET(0x3000, reg);
3329 if (rtwdev->dm_info.dpk_info.dpk_band == RTW_BAND_2G)
3353 if (rtwdev->dm_info.dpk_info.dpk_band == RTW_BAND_2G) {
3367 if (rtwdev->dm_info.dpk_info.dpk_bw == DPK_CHANNEL_WIDTH_80)
3382 u8 bw = rtwdev->dm_info.dpk_info.dpk_bw == DPK_CHANNEL_WIDTH_80 ? 2 : 0;
3741 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3747 dpk_info->coef[path][i] = rtw8822c_dpk_coef_transfer(rtwdev);
3768 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3773 coef_i = FIELD_GET(0x1fff0000, dpk_info->coef[path][addr]);
3774 coef_q = FIELD_GET(0x1fff, dpk_info->coef[path][addr]);
3786 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3801 coef = dpk_info->coef[path][addr];
3810 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3819 dpk_info->result[path] = result;
3820 dpk_info->dpk_txagc[path] = rtw_read8(rtwdev, REG_DPD_AGC);
3827 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3858 dpk_info->thermal_dpk_delta[path] = abs(t2 - t1);
3882 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3903 if (dpk_info->dpk_bw == DPK_CHANNEL_WIDTH_80) {
3947 dpk_info->dpk_gs[path] = tmp_gs;
3952 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3968 i_scaling = 0x16c00 / dpk_info->dpk_gs[path];
3985 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
3992 if (test_bit(path, dpk_info->dpk_path_ok))
4017 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
4021 clear_bit(path, dpk_info->dpk_path_ok);
4026 dpk_info->dpk_txagc[path] = 0;
4027 dpk_info->result[path] = 0;
4028 dpk_info->dpk_gs[path] = 0x5b;
4029 dpk_info->pre_pwsf[path] = 0;
4030 dpk_info->thermal_dpk[path] = rtw8822c_dpk_thermal_read(rtwdev,
4037 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
4052 if (dpk_info->result[path])
4053 set_bit(path, dpk_info->dpk_path_ok);
4067 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
4073 dpk_info->is_dpk_pwr_on);
4075 dpk_info->is_dpk_pwr_on);
4077 if (test_bit(RF_PATH_A, dpk_info->dpk_path_ok)) {
4079 rtw_write8(rtwdev, REG_DPD_CTL0_S0, dpk_info->dpk_gs[RF_PATH_A]);
4081 if (test_bit(RF_PATH_B, dpk_info->dpk_path_ok)) {
4083 rtw_write8(rtwdev, REG_DPD_CTL0_S1, dpk_info->dpk_gs[RF_PATH_B]);
4089 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
4092 if (!test_bit(RF_PATH_A, dpk_info->dpk_path_ok) &&
4093 !test_bit(RF_PATH_B, dpk_info->dpk_path_ok) &&
4094 dpk_info->dpk_ch == 0)
4100 if (dpk_info->dpk_band == RTW_BAND_2G)
4105 rtw_write8(rtwdev, REG_DPD_AGC, dpk_info->dpk_txagc[path]);
4108 test_bit(path, dpk_info->dpk_path_ok));
4116 dpk_info->dpk_gs[path]);
4119 dpk_info->dpk_gs[path]);
4126 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
4129 dpk_info->is_reload = false;
4137 if (channel == dpk_info->dpk_ch) {
4139 "[DPK] DPK reload for CH%d!!\n", dpk_info->dpk_ch);
4141 dpk_info->is_reload = true;
4144 return dpk_info->is_reload;
4149 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
4160 if (!dpk_info->is_dpk_pwr_on) {
4168 ewma_thermal_init(&dpk_info->avg_thermal[path]);
4200 struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info;
4205 if (dpk_info->thermal_dpk[0] == 0 && dpk_info->thermal_dpk[1] == 0)
4210 ewma_thermal_add(&dpk_info->avg_thermal[path],
4213 ewma_thermal_read(&dpk_info->avg_thermal[path]);
4214 delta_dpk[path] = dpk_info->thermal_dpk[path] -
4217 dpk_info->thermal_dpk_delta[path];
4220 if (offset[path] != dpk_info->pre_pwsf[path]) {
4225 dpk_info->pre_pwsf[path] = offset[path];