Lines Matching +full:10 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
26 rx_pwr_all = -94 + 2 * (27 - vga_idx); in rtw8812a_cck_rx_pwr()
28 rx_pwr_all = -94; in rtw8812a_cck_rx_pwr()
31 rx_pwr_all = -42 + 2 * (2 - vga_idx); in rtw8812a_cck_rx_pwr()
34 rx_pwr_all = -36 + 2 * (7 - vga_idx); in rtw8812a_cck_rx_pwr()
37 rx_pwr_all = -30 + 2 * (7 - vga_idx); in rtw8812a_cck_rx_pwr()
40 rx_pwr_all = -18 + 2 * (7 - vga_idx); in rtw8812a_cck_rx_pwr()
43 rx_pwr_all = 2 * (5 - vga_idx); in rtw8812a_cck_rx_pwr()
46 rx_pwr_all = 14 - 2 * vga_idx; in rtw8812a_cck_rx_pwr()
49 rx_pwr_all = 20 - 2 * vga_idx; in rtw8812a_cck_rx_pwr()
64 if (pkt_stat->rate >= DESC_RATE6M) in rtw8812a_query_phy_status()
67 if (rtwdev->hal.cck_high_power) in rtw8812a_query_phy_status()
70 if (pkt_stat->rssi >= 80) in rtw8812a_query_phy_status()
71 pkt_stat->rssi = ((pkt_stat->rssi - 80) << 1) + in rtw8812a_query_phy_status()
72 ((pkt_stat->rssi - 80) >> 1) + 80; in rtw8812a_query_phy_status()
73 else if (pkt_stat->rssi <= 78 && pkt_stat->rssi >= 20) in rtw8812a_query_phy_status()
74 pkt_stat->rssi += 3; in rtw8812a_query_phy_status()
92 rtw_write_rf(rtwdev, RF_PATH_A, RF_LCK, BIT(14), 1); in rtw8812a_do_lck()
102 mdelay(10); in rtw8812a_do_lck()
110 rtw_write_rf(rtwdev, RF_PATH_A, RF_LCK, BIT(14), 0); in rtw8812a_do_lck()
124 /* [31] = 0 --> Page C */ in rtw8812a_iqk_backup_rf()
125 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_backup_rf()
143 /* [31] = 0 --> Page C */ in rtw8812a_iqk_restore_rf()
144 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_restore_rf()
158 /* [31] = 0 --> Page C */ in rtw8812a_iqk_restore_afe()
159 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_restore_afe()
165 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk_restore_afe()
166 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk_restore_afe()
172 rtw_write32_mask(rtwdev, REG_LSSI_WRITE_A, BIT(7), 1); in rtw8812a_iqk_restore_afe()
173 rtw_write32_mask(rtwdev, REG_IQK_DPD_CFG, BIT(18), 1); in rtw8812a_iqk_restore_afe()
174 rtw_write32_mask(rtwdev, REG_IQK_DPD_CFG, BIT(29), 1); in rtw8812a_iqk_restore_afe()
175 rtw_write32_mask(rtwdev, REG_CFG_PMPD, BIT(29), 1); in rtw8812a_iqk_restore_afe()
181 rtw_write32_mask(rtwdev, REG_LSSI_WRITE_B, BIT(7), 1); in rtw8812a_iqk_restore_afe()
182 rtw_write32_mask(rtwdev, REG_BPBDB, BIT(18), 1); in rtw8812a_iqk_restore_afe()
183 rtw_write32_mask(rtwdev, REG_BPBDB, BIT(29), 1); in rtw8812a_iqk_restore_afe()
184 rtw_write32_mask(rtwdev, REG_PHYTXONB, BIT(29), 1); in rtw8812a_iqk_restore_afe()
192 /* [31] = 0 --> Page C */ in rtw8812a_iqk_rx_fill()
193 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_rx_fill()
213 /* [31] = 0 --> Page C */ in rtw8812a_iqk_rx_fill()
214 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_rx_fill()
243 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk_tx_fill()
244 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk_tx_fill()
245 rtw_write32_mask(rtwdev, REG_PREDISTA, BIT(7), 0x1); in rtw8812a_iqk_tx_fill()
246 rtw_write32_mask(rtwdev, REG_IQK_DPD_CFG, BIT(18), 0x1); in rtw8812a_iqk_tx_fill()
247 rtw_write32_mask(rtwdev, REG_IQK_DPD_CFG, BIT(29), 0x1); in rtw8812a_iqk_tx_fill()
248 rtw_write32_mask(rtwdev, REG_CFG_PMPD, BIT(29), 0x1); in rtw8812a_iqk_tx_fill()
260 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk_tx_fill()
261 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk_tx_fill()
262 rtw_write32_mask(rtwdev, REG_PREDISTB, BIT(7), 0x1); in rtw8812a_iqk_tx_fill()
263 rtw_write32_mask(rtwdev, REG_BPBDB, BIT(18), 0x1); in rtw8812a_iqk_tx_fill()
264 rtw_write32_mask(rtwdev, REG_BPBDB, BIT(29), 0x1); in rtw8812a_iqk_tx_fill()
265 rtw_write32_mask(rtwdev, REG_PHYTXONB, BIT(29), 0x1); in rtw8812a_iqk_tx_fill()
283 int tx_x0_temp[10], tx_y0_temp[10], tx_x1_temp[10], tx_y1_temp[10]; in rtw8812a_iqk()
284 int rx_x0_temp[10], rx_y0_temp[10], rx_x1_temp[10], rx_y1_temp[10]; in rtw8812a_iqk()
290 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8812a_iqk()
296 /* [31] = 0 --> Page C */ in rtw8812a_iqk()
297 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk()
299 /* ========path-A AFE all on======== */ in rtw8812a_iqk()
311 /* hardware 3-wire off */ in rtw8812a_iqk()
319 /* [31] = 0 --> Page C */ in rtw8812a_iqk()
320 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk()
338 rtw_write32_mask(rtwdev, REG_TXAGCIDX, BIT(0), 0x1); in rtw8812a_iqk()
339 rtw_write32_mask(rtwdev, REG_INIDLYB, BIT(0), 0x1); in rtw8812a_iqk()
343 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk()
344 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk()
346 if (efuse->ext_pa_5g) { in rtw8812a_iqk()
347 if (efuse->rfe_option == 1) { in rtw8812a_iqk()
359 if (rtwdev->hal.current_band_type == RTW_BAND_5G) { in rtw8812a_iqk()
366 if (efuse->rfe_option == 3) { in rtw8812a_iqk()
367 if (efuse->ext_pa_2g) in rtw8812a_iqk()
396 mdelay(10); in rtw8812a_iqk()
405 BIT(10)); in rtw8812a_iqk()
409 BIT(10)); in rtw8812a_iqk()
421 tx0_fail = rtw_read32_mask(rtwdev, REG_IQKA_END, BIT(12)); in rtw8812a_iqk()
422 tx1_fail = rtw_read32_mask(rtwdev, REG_IQKB_END, BIT(12)); in rtw8812a_iqk()
445 if (cal0_retry == 10) in rtw8812a_iqk()
470 if (cal1_retry == 10) in rtw8812a_iqk()
480 if (cal0_retry == 10) in rtw8812a_iqk()
504 if ((cal0_retry + tx0_avg) >= 10 || in rtw8812a_iqk()
505 (cal1_retry + tx1_avg) >= 10) in rtw8812a_iqk()
512 /* [31] = 0 --> Page C */ in rtw8812a_iqk()
513 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk()
519 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk()
520 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk()
522 /* [31] = 0 --> Page C */ in rtw8812a_iqk()
523 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk()
551 rtw_write32_mask(rtwdev, REG_IQK_COM00, BIT(31), 0x1); in rtw8812a_iqk()
552 rtw_write32_mask(rtwdev, REG_IQK_COM00, BIT(31), 0x0); in rtw8812a_iqk()
555 if (rtwdev->hci.type == RTW_HCI_TYPE_PCIE) in rtw8812a_iqk()
560 if (efuse->rfe_option == 1) { in rtw8812a_iqk()
572 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk()
573 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk()
594 /* [31] = 0 --> Page C */ in rtw8812a_iqk()
595 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk()
602 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk()
603 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk()
604 if (efuse->rfe_option == 1) in rtw8812a_iqk()
616 /* [31] = 0 --> Page C */ in rtw8812a_iqk()
617 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk()
622 /* [31] = 1 --> Page C1 */ in rtw8812a_iqk()
623 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk()
624 if (efuse->rfe_option == 1) in rtw8812a_iqk()
639 BIT(10)); in rtw8812a_iqk()
643 BIT(10)); in rtw8812a_iqk()
655 rx0_fail = rtw_read32_mask(rtwdev, REG_IQKA_END, BIT(11)); in rtw8812a_iqk()
656 rx1_fail = rtw_read32_mask(rtwdev, REG_IQKB_END, BIT(11)); in rtw8812a_iqk()
682 if (cal0_retry == 10) in rtw8812a_iqk()
707 if (cal1_retry == 10) in rtw8812a_iqk()
720 if (cal0_retry == 10) in rtw8812a_iqk()
749 if ((cal0_retry + rx0_avg) >= 10 || in rtw8812a_iqk()
750 (cal1_retry + rx1_avg) >= 10 || in rtw8812a_iqk()
809 rtw_write32_set(rtwdev, REG_CCASEL, BIT(31)); in rtw8812a_do_iqk()
812 rtw_write32_clr(rtwdev, REG_CCASEL, BIT(31)); in rtw8812a_do_iqk()
831 rtw_write32_set(rtwdev, REG_CCASEL, BIT(31)); in rtw8812a_do_iqk()
834 rtw_write32_clr(rtwdev, REG_CCASEL, BIT(31)); in rtw8812a_do_iqk()
842 u8 channel = rtwdev->hal.current_channel; in rtw8812a_phy_calibration()
858 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8812a_pwr_track()
860 if (!dm_info->pwr_trk_triggered) { in rtw8812a_pwr_track()
863 dm_info->pwr_trk_triggered = true; in rtw8812a_pwr_track()
868 dm_info->pwr_trk_triggered = false; in rtw8812a_pwr_track()
878 ledcfg &= BIT(6) | BIT(4); in rtw8812a_led_set()
879 ledcfg |= BIT(5); in rtw8812a_led_set()
882 ledcfg |= BIT(3); in rtw8812a_led_set()
1020 {0, 20, false, 7}, /* for WL-CPT */
1029 {0, 20, false, 7}, /* for WL-CPT */