Lines Matching refs:rtw_write32
118 rtw_write32(rtwdev, REG_BAR_MODE_CTRL, WLAN_BAR_VAL);
138 rtw_write32(rtwdev, REG_LTR_IDLE_LATENCY, WLAN_LTR_IDLE_LAT);
139 rtw_write32(rtwdev, REG_LTR_ACTIVE_LATENCY, WLAN_LTR_ACT_LAT);
140 rtw_write32(rtwdev, REG_LTR_CTRL_BASIC, WLAN_LTR_CTRL1);
141 rtw_write32(rtwdev, REG_LTR_CTRL_BASIC + 4, WLAN_LTR_CTRL2);
243 rtw_write32(rtwdev, REG_ANALOG_P4, DIS_3WIRE);
244 rtw_write32(rtwdev, REG_PSDFN, freq);
245 rtw_write32(rtwdev, REG_PSDFN, START_PSD | freq);
251 rtw_write32(rtwdev, REG_PSDFN, freq);
252 rtw_write32(rtwdev, REG_ANALOG_P4, EN_3WIRE);
262 rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x00000000);
263 rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000);
264 rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000);
265 rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00000000);
274 rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x04000000);
275 rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000);
276 rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000);
277 rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00000000);
283 rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x00000000);
284 rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000);
285 rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000);
286 rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00080000);
361 rtw_write32(rtwdev, cck_dfir->reg, cck_dfir->val);
505 rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0x800f0054);
515 rtw_write32(rtwdev, REG_IQK_AGC_PTS_11N, pts);
516 rtw_write32(rtwdev, REG_IQK_AGC_PTS_11N, 0xf8000000);
528 rtw_write32(rtwdev, REG_BB_SEL_BTG, backup->bb_sel_btg);
549 rtw_write32(rtwdev, REG_BB_SEL_BTG, iqk_cfg->val_bb_sel_btg);
559 rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x08008c0c);
560 rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x38008c1c);
561 rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, iqk_cfg->val_txiqk_pi);
562 rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28160200);
563 rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00);
564 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);
567 rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x00462911);
609 rtw_write32(rtwdev, REG_BB_SEL_BTG, iqk_cfg->val_bb_sel_btg);
614 rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00);
615 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);
618 rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x18008c1c);
619 rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x38008c1c);
620 rtw_write32(rtwdev, REG_TX_IQK_TONE_B, 0x38008c1c);
621 rtw_write32(rtwdev, REG_RX_IQK_TONE_B, 0x38008c1c);
622 rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, 0x82160000);
623 rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28160000);
626 rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x0046a911);
658 rtw_write32(rtwdev, REG_TXIQK_11N, BIT_SET_TXIQK_11N(tx_x, tx_y));
669 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);
670 rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x38008c1c);
671 rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x18008c1c);
672 rtw_write32(rtwdev, REG_TX_IQK_TONE_B, 0x38008c1c);
673 rtw_write32(rtwdev, REG_RX_IQK_TONE_B, 0x38008c1c);
674 rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, 0x82170000);
675 rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28171400);
678 rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x0046a8d1);
814 rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00);
815 rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);
836 rtw_write32(rtwdev, REG_BB_RX_PATH_11N, 0x03a05611);
837 rtw_write32(rtwdev, REG_TRMUX_11N, 0x000800e4);
838 rtw_write32(rtwdev, REG_BB_PWR_SAV1_11N, 0x25204200);
991 rtw_write32(rtwdev, REG_BB_SEL_BTG, backup.bb_sel_btg);
1146 rtw_write32(rtwdev, REG_AGCRSSI, wl_rx_low_gain_on[i]);
1149 rtw_write32(rtwdev, REG_AGCRSSI, wl_rx_low_gain_off[i]);
1190 rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, value32);
1197 rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32);
1238 rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, ofdm_swing);
1243 rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32);