Lines Matching defs:value32

1161 	s32 value32;
1189 		value32 = BIT_SET_TXIQ_ELM_ACD(ele_A, ele_C, ele_D);
1190 		rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, value32);
1191 		value32 = BIT_SET_TXIQ_ELM_C1(ele_C);
1193 				 value32);
1194 		value32 = rtw_read32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD);
1195 		value32 &= ~BIT_MASK_OFDM0_EXTS;
1196 		value32 |= BIT_SET_OFDM0_EXTS(ele_A_ext, ele_C_ext, ele_D_ext);
1197 		rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32);
1220 	s32 value32;
1241 		value32 = rtw_read32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD);
1242 		value32 &= ~BIT_MASK_OFDM0_EXTS;
1243 		rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32);