Lines Matching +full:freq +full:- +full:track +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
39 /* rssi in percentage % (dbm = % - 100) */
52 {0, 10, false, 7}, /* for WL-CPT */
61 {0, 10, false, 7}, /* for WL-CPT */
69 0x0b40002d, /* 0, -15.0dB */
70 0x0c000030, /* 1, -14.5dB */
71 0x0cc00033, /* 2, -14.0dB */
72 0x0d800036, /* 3, -13.5dB */
73 0x0e400039, /* 4, -13.0dB */
74 0x0f00003c, /* 5, -12.5dB */
75 0x10000040, /* 6, -12.0dB */
76 0x11000044, /* 7, -11.5dB */
77 0x12000048, /* 8, -11.0dB */
78 0x1300004c, /* 9, -10.5dB */
79 0x14400051, /* 10, -10.0dB */
80 0x15800056, /* 11, -9.5dB */
81 0x16c0005b, /* 12, -9.0dB */
82 0x18000060, /* 13, -8.5dB */
83 0x19800066, /* 14, -8.0dB */
84 0x1b00006c, /* 15, -7.5dB */
85 0x1c800072, /* 16, -7.0dB */
86 0x1e400079, /* 17, -6.5dB */
87 0x20000080, /* 18, -6.0dB */
88 0x22000088, /* 19, -5.5dB */
89 0x24000090, /* 20, -5.0dB */
90 0x26000098, /* 21, -4.5dB */
91 0x288000a2, /* 22, -4.0dB */
92 0x2ac000ab, /* 23, -3.5dB */
93 0x2d4000b5, /* 24, -3.0dB */
94 0x300000c0, /* 25, -2.5dB */
95 0x32c000cb, /* 26, -2.0dB */
96 0x35c000d7, /* 27, -1.5dB */
97 0x390000e4, /* 28, -1.0dB */
98 0x3c8000f2, /* 29, -0.5dB */
121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
127 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
139 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
145 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
147 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
149 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
151 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
153 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
159 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
525 struct device_node *node = rtwdev->dev->of_node; in try_mac_from_devicetree()
526 struct rtw_efuse *efuse = &rtwdev->efuse; in try_mac_from_devicetree()
530 ret = of_get_mac_address(node, efuse->addr); in try_mac_from_devicetree()
534 efuse->addr); in try_mac_from_devicetree()
542 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8703b_read_efuse()
549 if (!is_valid_ether_addr(efuse->addr)) in rtw8703b_read_efuse()
557 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_pwrtrack_init()
566 dm_info->default_ofdm_index = 30; in rtw8703b_pwrtrack_init()
567 dm_info->default_cck_index = 20; in rtw8703b_pwrtrack_init()
569 for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) { in rtw8703b_pwrtrack_init()
570 ewma_thermal_init(&dm_info->avg_thermal[path]); in rtw8703b_pwrtrack_init()
571 dm_info->delta_power_index[path] = 0; in rtw8703b_pwrtrack_init()
573 dm_info->pwr_trk_triggered = false; in rtw8703b_pwrtrack_init()
574 dm_info->pwr_trk_init_trigger = true; in rtw8703b_pwrtrack_init()
575 dm_info->thermal_meter_k = rtwdev->efuse.thermal_meter_k; in rtw8703b_pwrtrack_init()
576 dm_info->txagc_remnant_cck = 0; in rtw8703b_pwrtrack_init()
577 dm_info->txagc_remnant_ofdm[RF_PATH_A] = 0; in rtw8703b_pwrtrack_init()
582 u8 xtal_cap = rtwdev->efuse.crystal_cap & 0x3F; in rtw8703b_phy_set_param()
655 rtwdev->dm_info.rx_cck_agc_report_type = 1; in rtw8703b_phy_set_param()
657 rtwdev->dm_info.rx_cck_agc_report_type = 0; in rtw8703b_phy_set_param()
670 u32 freq, u32 thres) in rtw8703b_check_spur_ov_thres() argument
675 rtw_write32(rtwdev, REG_PSDFN, freq); in rtw8703b_check_spur_ov_thres()
676 rtw_write32(rtwdev, REG_PSDFN, START_PSD | freq); in rtw8703b_check_spur_ov_thres()
682 rtw_write32(rtwdev, REG_PSDFN, freq); in rtw8703b_check_spur_ov_thres()
751 "Bug: Notch filter enable called for channel %u!", in rtw8703b_cfg_notch()
762 u32 freq; in rtw8703b_spur_cal() local
765 freq = FREQ_CH5; in rtw8703b_spur_cal()
767 freq = FREQ_CH6; in rtw8703b_spur_cal()
769 freq = FREQ_CH7; in rtw8703b_spur_cal()
771 freq = FREQ_CH8; in rtw8703b_spur_cal()
773 freq = FREQ_CH13; in rtw8703b_spur_cal()
775 freq = FREQ_CH14; in rtw8703b_spur_cal()
781 notch = rtw8703b_check_spur_ov_thres(rtwdev, freq, SPUR_THRES); in rtw8703b_spur_cal()
841 rtw_write32(rtwdev, cck_dfir->reg, cck_dfir->val); in rtw8703b_set_channel_bb()
883 -2, LNA_IDX_INVALID, LNA_IDX_INVALID, LNA_IDX_INVALID,
884 -6, LNA_IDX_INVALID, LNA_IDX_INVALID, -19,
885 -32, LNA_IDX_INVALID, -36, -42,
886 LNA_IDX_INVALID, LNA_IDX_INVALID, LNA_IDX_INVALID, -48,
898 return -120; in get_cck_rx_pwr()
901 return lna_gain - 2 * vga_idx; in get_cck_rx_pwr()
908 u8 vga_idx = phy_status->cck_agc_rpt_ofdm_cfosho_a & VGA_BITS; in query_phy_status_cck()
909 u8 lna_idx = phy_status->cck_agc_rpt_ofdm_cfosho_a & LNA_L_BITS; in query_phy_status_cck()
912 if (rtwdev->dm_info.rx_cck_agc_report_type == 1) in query_phy_status_cck()
914 phy_status->cck_rpt_b_ofdm_cfosho_b & LNA_H_BIT) in query_phy_status_cck()
920 pkt_stat->rx_power[RF_PATH_A] = rx_power; in query_phy_status_cck()
921 pkt_stat->rssi = rtw_phy_rf_power_2_rssi(pkt_stat->rx_power, 1); in query_phy_status_cck()
922 rtwdev->dm_info.rssi[RF_PATH_A] = pkt_stat->rssi; in query_phy_status_cck()
923 pkt_stat->signal_power = rx_power; in query_phy_status_cck()
930 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in query_phy_status_ofdm()
933 val_s8 = phy_status->path_agc[RF_PATH_A].gain & 0x3F; in query_phy_status_ofdm()
934 pkt_stat->rx_power[RF_PATH_A] = (val_s8 * 2) - 110; in query_phy_status_ofdm()
935 pkt_stat->rssi = rtw_phy_rf_power_2_rssi(pkt_stat->rx_power, 1); in query_phy_status_ofdm()
936 pkt_stat->rx_snr[RF_PATH_A] = (s8)(phy_status->path_rxsnr[RF_PATH_A] / 2); in query_phy_status_ofdm()
939 val_s8 = phy_status->cck_sig_qual_ofdm_pwdb_all >> 1; in query_phy_status_ofdm()
940 pkt_stat->signal_power = (val_s8 & 0x7f) - 110; in query_phy_status_ofdm()
942 pkt_stat->rx_evm[RF_PATH_A] = phy_status->stream_rxevm[RF_PATH_A]; in query_phy_status_ofdm()
943 pkt_stat->cfo_tail[RF_PATH_A] = phy_status->path_cfotail[RF_PATH_A]; in query_phy_status_ofdm()
945 dm_info->curr_rx_rate = pkt_stat->rate; in query_phy_status_ofdm()
946 dm_info->rssi[RF_PATH_A] = pkt_stat->rssi; in query_phy_status_ofdm()
947 dm_info->rx_snr[RF_PATH_A] = pkt_stat->rx_snr[RF_PATH_A] >> 1; in query_phy_status_ofdm()
949 dm_info->cfo_tail[RF_PATH_A] = (pkt_stat->cfo_tail[RF_PATH_A] * 5) >> 1; in query_phy_status_ofdm()
951 /* (EVM value as s8 / 2) is dbm, should usually be in -33 to 0 in query_phy_status_ofdm()
954 val_s8 = (s8)pkt_stat->rx_evm[RF_PATH_A]; in query_phy_status_ofdm()
955 val_s8 = clamp_t(s8, -val_s8 >> 1, 0, 64); in query_phy_status_ofdm()
956 val_s8 &= 0x3F; /* 64->0: second path of 1SS rate is 64 */ in query_phy_status_ofdm()
957 dm_info->rx_evm_dbm[RF_PATH_A] = val_s8; in query_phy_status_ofdm()
963 if (pkt_stat->rate <= DESC_RATE11M) in query_phy_status()
978 backup->mac8[i] & (~BIT(3))); in rtw8703b_iqk_config_mac()
1029 rtw_write32(rtwdev, REG_BB_SEL_BTG, backup->bb_sel_btg); in rtw8703b_iqk_txrx_path_post()
1338 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_phy_calibration()
1397 dm_info->iqk.result.s1_x = result[final_candidate][IQK_S1_TX_X]; in rtw8703b_phy_calibration()
1398 dm_info->iqk.result.s1_y = result[final_candidate][IQK_S1_TX_Y]; in rtw8703b_phy_calibration()
1399 dm_info->iqk.result.s0_x = result[final_candidate][IQK_S0_TX_X]; in rtw8703b_phy_calibration()
1400 dm_info->iqk.result.s0_y = result[final_candidate][IQK_S0_TX_Y]; in rtw8703b_phy_calibration()
1401 dm_info->iqk.done = true; in rtw8703b_phy_calibration()
1435 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_set_iqk_matrix_by_result()
1445 iqk_result_x = dm_info->iqk.result.s1_x; in rtw8703b_set_iqk_matrix_by_result()
1446 iqk_result_y = dm_info->iqk.result.s1_y; in rtw8703b_set_iqk_matrix_by_result()
1449 iqk_result_x = dm_info->iqk.result.s0_x; in rtw8703b_set_iqk_matrix_by_result()
1450 iqk_result_y = dm_info->iqk.result.s0_y; in rtw8703b_set_iqk_matrix_by_result()
1497 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_set_iqk_matrix()
1501 ofdm_index = clamp_t(s8, ofdm_index, 0, RTW_OFDM_SWING_TABLE_SIZE - 1); in rtw8703b_set_iqk_matrix()
1505 if (dm_info->iqk.done) { in rtw8703b_set_iqk_matrix()
1537 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_pwrtrack_set_ofdm_pwr()
1539 dm_info->txagc_remnant_ofdm[RF_PATH_A] = txagc_idx; in rtw8703b_pwrtrack_set_ofdm_pwr()
1548 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_pwrtrack_set_cck_pwr()
1550 dm_info->txagc_remnant_cck = txagc_idx; in rtw8703b_pwrtrack_set_cck_pwr()
1552 swing_idx = clamp_t(s8, swing_idx, 0, RTW_CCK_SWING_TABLE_SIZE - 1); in rtw8703b_pwrtrack_set_cck_pwr()
1564 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_pwrtrack_set()
1565 struct rtw_hal *hal = &rtwdev->hal; in rtw8703b_pwrtrack_set()
1573 final_ofdm_swing_index = dm_info->default_ofdm_index + in rtw8703b_pwrtrack_set()
1574 dm_info->delta_power_index[path]; in rtw8703b_pwrtrack_set()
1575 final_cck_swing_index = dm_info->default_cck_index + in rtw8703b_pwrtrack_set()
1576 dm_info->delta_power_index[path]; in rtw8703b_pwrtrack_set()
1580 final_ofdm_swing_index - limit_ofdm); in rtw8703b_pwrtrack_set()
1589 final_cck_swing_index - limit_cck); in rtw8703b_pwrtrack_set()
1596 rtw_phy_set_tx_power_level(rtwdev, hal->current_channel); in rtw8703b_pwrtrack_set()
1601 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_phy_pwrtrack()
1608 if (rtwdev->efuse.thermal_meter[0] == 0xff) in rtw8703b_phy_pwrtrack()
1620 if (dm_info->pwr_trk_init_trigger) in rtw8703b_phy_pwrtrack()
1621 dm_info->pwr_trk_init_trigger = false; in rtw8703b_phy_pwrtrack()
1628 delta = min_t(u8, delta, RTW_PWR_TRK_TBL_SZ - 1); in rtw8703b_phy_pwrtrack()
1630 for (path = 0; path < rtwdev->hal.rf_path_num; path++) { in rtw8703b_phy_pwrtrack()
1633 delta_last = dm_info->delta_power_index[path]; in rtw8703b_phy_pwrtrack()
1639 dm_info->delta_power_index[path] = delta_cur; in rtw8703b_phy_pwrtrack()
1652 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8703b_pwr_track()
1653 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8703b_pwr_track()
1655 if (efuse->power_track_type != 0) { in rtw8703b_pwr_track()
1656 rtw_warn(rtwdev, "unsupported power track type"); in rtw8703b_pwr_track()
1660 if (!dm_info->pwr_trk_triggered) { in rtw8703b_pwr_track()
1663 dm_info->pwr_trk_triggered = true; in rtw8703b_pwr_track()
1668 dm_info->pwr_trk_triggered = false; in rtw8703b_pwr_track()
1681 struct rtw_coex *coex = &rtwdev->coex; in rtw8703b_coex_set_rfe_type()
1682 struct rtw_coex_rfe *coex_rfe = &coex->rfe; in rtw8703b_coex_set_rfe_type()
1684 coex_rfe->rfe_module_type = rtwdev->efuse.rfe_option; in rtw8703b_coex_set_rfe_type()
1685 coex_rfe->ant_switch_polarity = 0; in rtw8703b_coex_set_rfe_type()
1686 coex_rfe->ant_switch_exist = false; in rtw8703b_coex_set_rfe_type()
1687 coex_rfe->ant_switch_with_bt = false; in rtw8703b_coex_set_rfe_type()
1688 coex_rfe->ant_switch_diversity = false; in rtw8703b_coex_set_rfe_type()
1689 coex_rfe->wlg_at_btg = true; in rtw8703b_coex_set_rfe_type()
1746 0, 0, 0, -1, -1, -1, -1, -2, -2, -2, -3, -3, -3, -3, -3,
1747 -4, -2, -2, -1, -1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1
1751 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 1, 0, -1, -1, -1,
1752 -2, -3, -7, -9, -10, -11, -14, -16, -18, -20, -22, -24, -26, -28, -30
1774 /* Shared-Antenna Coex Table */
1776 {0xffffffff, 0xffffffff}, /* case-0 */
1781 {0xfafafafa, 0xfafafafa}, /* case-5 */
1786 {0x66555555, 0x6a5a5a5a}, /* case-10 */
1791 {0x66555555, 0xaaaaaaaa}, /* case-15 */
1796 {0xaa5555aa, 0x6a5a5a5a}, /* case-20 */
1801 {0xffffffff, 0x5a5a5aaa}, /* case-25 */
1806 {0x66556aaa, 0x6a5a6aaa}, /* case-30 */
1811 /* Shared-Antenna TDMA */
1813 { {0x00, 0x00, 0x00, 0x00, 0x00} }, /* case-0 */
1814 { {0x61, 0x45, 0x03, 0x11, 0x11} }, /* case-1 */
1818 { {0x61, 0x10, 0x03, 0x11, 0x11} }, /* case-5 */
1823 { {0x61, 0x10, 0x03, 0x11, 0x10} }, /* case-10 */
1828 { {0x51, 0x08, 0x07, 0x10, 0x54} }, /* case-15 */
1833 { {0x51, 0x10, 0x03, 0x10, 0x50} }, /* case-20 */
1838 { {0x51, 0x10, 0x03, 0x10, 0x51} }, /* case-25 */
1961 /* Vendor driver has a time-based format, converted from
1976 /* sant -> shared antenna, nsant -> non-shared antenna
1977 * Not sure if 8703b versions with non-shard antenna even exist.