Lines Matching defs:bw

1581 				       u8 bw, u8 rs, u8 ch, s8 pwr_limit)
1592 if (regd >= RTW_REGD_MAX || bw >= RTW_CHANNEL_WIDTH_MAX ||
1595 "wrong txpwr_lmt regd=%u, band=%u bw=%u, rs=%u, ch_idx=%u, pwr_limit=%d\n",
1596 regd, band, bw, rs, ch_idx, pwr_limit);
1601 hal->tx_pwr_limit_2g[regd][bw][rs][ch_idx] = pwr_limit;
1602 ww = hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx];
1604 hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx] = ww;
1606 hal->tx_pwr_limit_5g[regd][bw][rs][ch_idx] = pwr_limit;
1607 ww = hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx];
1609 hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx] = ww;
1616 u8 bw, u8 ch_idx, u8 rs_ht, u8 rs_vht)
1620 s8 lmt_ht = hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx];
1621 s8 lmt_vht = hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx];
1627 hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx] = lmt_vht;
1630 hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx] = lmt_ht;
1635 rtw_xref_txpwr_lmt_by_rs(struct rtw_dev *rtwdev, u8 regd, u8 bw, u8 ch_idx)
1645 rtw_xref_5g_txpwr_lmt(rtwdev, regd, bw, ch_idx, rs_ht, rs_vht);
1651 rtw_xref_5g_txpwr_lmt_by_ch(struct rtw_dev *rtwdev, u8 regd, u8 bw)
1656 rtw_xref_txpwr_lmt_by_rs(rtwdev, regd, bw, ch_idx);
1663 u8 bw;
1665 for (bw = RTW_CHANNEL_WIDTH_20; bw <= RTW_CHANNEL_WIDTH_40; bw++)
1666 rtw_xref_5g_txpwr_lmt_by_ch(rtwdev, regd, bw);
1679 __cfg_txpwr_lmt_by_alt(struct rtw_hal *hal, u8 regd, u8 regd_alt, u8 bw, u8 rs)
1684 hal->tx_pwr_limit_2g[regd][bw][rs][ch] =
1685 hal->tx_pwr_limit_2g[regd_alt][bw][rs][ch];
1688 hal->tx_pwr_limit_5g[regd][bw][rs][ch] =
1689 hal->tx_pwr_limit_5g[regd_alt][bw][rs][ch];
1695 u8 bw, rs;
1697 for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
1700 bw, rs);
1715 p->bw, p->rs, p->ch, p->txpwr_lmt);
2077 enum rtw_bandwidth bw, u8 rf_path,
2096 bw = RTW_CHANNEL_WIDTH_20;
2100 bw = min_t(u8, bw, RTW_CHANNEL_WIDTH_40);
2103 for (cur_bw = RTW_CHANNEL_WIDTH_20; cur_bw <= bw; cur_bw++) {
2120 WARN(1, "invalid arguments, band=%d, bw=%d, path=%d, rate=%d, ch=%d\n",
2121 band, bw, rf_path, rate, channel);
2146 void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw,
2167 bw, rate, group);
2173 bw, rate, group);
2177 *limit = rtw_phy_get_tx_power_limit(rtwdev, band, bw, path,
2221 u8 bw;
2229 bw = hal->current_band_width;
2233 bw, ch, regd);
2325 __rtw_phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)
2332 hal->tx_pwr_limit_2g[regd][bw][rs][ch] -= base;
2337 hal->tx_pwr_limit_5g[regd][bw][rs][ch] -= base;
2343 u8 regd, bw, rs;
2349 for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
2351 __rtw_phy_tx_power_limit_config(hal, regd, bw, rs);
2355 u8 regd, u8 bw, u8 rs)
2363 hal->tx_pwr_limit_2g[regd][bw][rs][ch] = max_power_index;
2367 hal->tx_pwr_limit_5g[regd][bw][rs][ch] = max_power_index;
2373 u8 regd, path, rate, rs, bw;
2385 for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
2387 rtw_phy_init_tx_power_limit(rtwdev, regd, bw,