Lines Matching defs:efuse

20 #include "efuse.h"
1026 		WARN(1, "invalid hw configuration from efuse\n");
1240 	struct rtw_efuse *efuse = &rtwdev->efuse;
1269 	if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1448 	wifi_only = !rtwdev->efuse.btcoex;
1591 	struct rtw_efuse *efuse = &rtwdev->efuse;
1604 	if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1611 	if (efuse->hw_cap.nss > 1) {
1627 	struct rtw_efuse *efuse = &rtwdev->efuse;
1631 	if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1632 	    efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1659 	if (efuse->hw_cap.nss > 1) {
1884 	struct rtw_efuse *efuse = &rtwdev->efuse;
1921 	efuse->physical_size = chip->phy_efuse_size;
1922 	efuse->logical_size = chip->log_efuse_size;
1923 	efuse->protect_size = chip->ptct_efuse_size;
1976 	struct rtw_efuse *efuse = &rtwdev->efuse;
1997 	efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1998 	efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1999 	efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
2000 	efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
2001 	efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
2003 	rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
2005 	if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
2006 	    efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
2007 		efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
2011 		efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
2012 		efuse->hw_cap.ant_num, efuse->hw_cap.nss);
2025 	struct rtw_efuse *efuse = &rtwdev->efuse;
2030 	/* power on mac to read efuse */
2047 	if (efuse->crystal_cap == 0xff)
2048 		efuse->crystal_cap = 0;
2049 	if (efuse->pa_type_2g == 0xff)
2050 		efuse->pa_type_2g = 0;
2051 	if (efuse->pa_type_5g == 0xff)
2052 		efuse->pa_type_5g = 0;
2053 	if (efuse->lna_type_2g == 0xff)
2054 		efuse->lna_type_2g = 0;
2055 	if (efuse->lna_type_5g == 0xff)
2056 		efuse->lna_type_5g = 0;
2057 	if (efuse->channel_plan == 0xff)
2058 		efuse->channel_plan = 0x7f;
2059 	if (efuse->rf_board_option == 0xff)
2060 		efuse->rf_board_option = 0;
2061 	if (efuse->bt_setting & BIT(0))
2062 		efuse->share_ant = true;
2063 	if (efuse->regd == 0xff)
2064 		efuse->regd = 0;
2065 	if (efuse->tx_bb_swing_setting_2g == 0xff)
2066 		efuse->tx_bb_swing_setting_2g = 0;
2067 	if (efuse->tx_bb_swing_setting_5g == 0xff)
2068 		efuse->tx_bb_swing_setting_5g = 0;
2070 	efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
2071 	efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
2072 	efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
2073 	efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
2074 	efuse->ext_lna_5g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
2076 	if (!is_valid_ether_addr(efuse->addr)) {
2077 		eth_random_addr(efuse->addr);
2078 		dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n");
2120 		rtw_err(rtwdev, "failed to setup chip efuse info\n");
2334 	SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);