Lines Matching defs:value
391 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \
392 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0))
393 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \
394 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
395 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \
396 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16))
397 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \
398 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0))
407 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \
408 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16))
409 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value) \
410 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
412 #define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value) \
413 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(7, 0))
414 #define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value) \
415 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
416 #define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value) \
417 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
418 #define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value) \
419 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
420 #define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value) \
421 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28))
422 #define IQK_SET_CLEAR(h2c_pkt, value) \
423 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
424 #define IQK_SET_SEGMENT_IQK(h2c_pkt, value) \
425 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
427 #define CHSW_INFO_SET_CH(pkt, value) \
428 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(7, 0))
429 #define CHSW_INFO_SET_PRI_CH_IDX(pkt, value) \
430 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(11, 8))
431 #define CHSW_INFO_SET_BW(pkt, value) \
432 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(15, 12))
433 #define CHSW_INFO_SET_TIMEOUT(pkt, value) \
434 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16))
435 #define CHSW_INFO_SET_ACTION_ID(pkt, value) \
436 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24))
437 #define CHSW_INFO_SET_EXTRA_INFO(pkt, value) \
438 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, BIT(31))
440 #define CH_INFO_SET_CH(pkt, value) \
441 u8p_replace_bits((u8 *)(pkt) + 0x00, value, GENMASK(7, 0))
442 #define CH_INFO_SET_PRI_CH_IDX(pkt, value) \
443 u8p_replace_bits((u8 *)(pkt) + 0x01, value, GENMASK(3, 0))
444 #define CH_INFO_SET_BW(pkt, value) \
445 u8p_replace_bits((u8 *)(pkt) + 0x01, value, GENMASK(7, 4))
446 #define CH_INFO_SET_TIMEOUT(pkt, value) \
447 u8p_replace_bits((u8 *)(pkt) + 0x02, value, GENMASK(7, 0))
448 #define CH_INFO_SET_ACTION_ID(pkt, value) \
449 u8p_replace_bits((u8 *)(pkt) + 0x03, value, GENMASK(6, 0))
450 #define CH_INFO_SET_EXTRA_INFO(pkt, value) \
451 u8p_replace_bits((u8 *)(pkt) + 0x03, value, BIT(7))
453 #define EXTRA_CH_INFO_SET_ID(pkt, value) \
454 u8p_replace_bits((u8 *)(pkt) + 0x04, value, GENMASK(6, 0))
455 #define EXTRA_CH_INFO_SET_INFO(pkt, value) \
456 u8p_replace_bits((u8 *)(pkt) + 0x04, value, BIT(7))
457 #define EXTRA_CH_INFO_SET_SIZE(pkt, value) \
458 u8p_replace_bits((u8 *)(pkt) + 0x05, value, GENMASK(7, 0))
459 #define EXTRA_CH_INFO_SET_DFS_EXT_TIME(pkt, value) \
460 u8p_replace_bits((u8 *)(pkt) + 0x06, value, GENMASK(7, 0))
462 #define UPDATE_PKT_SET_SIZE(h2c_pkt, value) \
463 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0))
464 #define UPDATE_PKT_SET_PKT_ID(h2c_pkt, value) \
465 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
466 #define UPDATE_PKT_SET_LOCATION(h2c_pkt, value) \
467 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 24))
469 #define CH_SWITCH_SET_START(h2c_pkt, value) \
470 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
471 #define CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, value) \
472 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
473 #define CH_SWITCH_SET_ABSOLUTE_TIME(h2c_pkt, value) \
474 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2))
475 #define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value) \
476 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3))
477 #define CH_SWITCH_SET_SCAN_MODE(h2c_pkt, value) \
478 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(5))
479 #define CH_SWITCH_SET_BACK_OP_EN(h2c_pkt, value) \
480 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(6))
481 #define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value) \
482 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
483 #define CH_SWITCH_SET_CH_NUM(h2c_pkt, value) \
484 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
485 #define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value) \
486 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
487 #define CH_SWITCH_SET_DEST_BW(h2c_pkt, value) \
488 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28))
489 #define CH_SWITCH_SET_DEST_CH(h2c_pkt, value) \
490 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0))
491 #define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value) \
492 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(13, 8))
493 #define CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, value) \
494 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 14))
495 #define CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, value) \
496 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(21, 16))
497 #define CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, value) \
498 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 22))
499 #define CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, value) \
500 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(31, 24))
501 #define CH_SWITCH_SET_TSF_HIGH(h2c_pkt, value) \
502 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 0))
503 #define CH_SWITCH_SET_TSF_LOW(h2c_pkt, value) \
504 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(31, 0))
505 #define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value) \
506 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0))
508 #define SCAN_OFFLOAD_SET_START(h2c_pkt, value) \
509 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
510 #define SCAN_OFFLOAD_SET_BACK_OP_EN(h2c_pkt, value) \
511 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
512 #define SCAN_OFFLOAD_SET_RANDOM_SEQ_EN(h2c_pkt, value) \
513 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2))
514 #define SCAN_OFFLOAD_SET_NO_CCK_EN(h2c_pkt, value) \
515 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(3))
516 #define SCAN_OFFLOAD_SET_VERBOSE(h2c_pkt, value) \
517 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(4))
518 #define SCAN_OFFLOAD_SET_CH_NUM(h2c_pkt, value) \
519 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
520 #define SCAN_OFFLOAD_SET_CH_INFO_SIZE(h2c_pkt, value) \
521 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 16))
522 #define SCAN_OFFLOAD_SET_CH_INFO_LOC(h2c_pkt, value) \
523 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0))
524 #define SCAN_OFFLOAD_SET_OP_CH(h2c_pkt, value) \
525 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 8))
526 #define SCAN_OFFLOAD_SET_OP_PRI_CH_IDX(h2c_pkt, value) \
527 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(19, 16))
528 #define SCAN_OFFLOAD_SET_OP_BW(h2c_pkt, value) \
529 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 20))
530 #define SCAN_OFFLOAD_SET_OP_PORT_ID(h2c_pkt, value) \
531 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(26, 24))
532 #define SCAN_OFFLOAD_SET_OP_DWELL_TIME(h2c_pkt, value) \
533 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(15, 0))
534 #define SCAN_OFFLOAD_SET_OP_GAP_TIME(h2c_pkt, value) \
535 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 16))
536 #define SCAN_OFFLOAD_SET_MODE(h2c_pkt, value) \
537 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(3, 0))
538 #define SCAN_OFFLOAD_SET_SSID_NUM(h2c_pkt, value) \
539 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(7, 4))
540 #define SCAN_OFFLOAD_SET_PKT_LOC(h2c_pkt, value) \
541 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(15, 8))
576 #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \
577 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0))
579 #define MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, value) \
580 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
581 #define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value) \
582 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
584 #define SET_WL_PHY_INFO_TX_TP(h2c_pkt, value) \
585 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(17, 8))
586 #define SET_WL_PHY_INFO_RX_TP(h2c_pkt, value) \
587 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(27, 18))
588 #define SET_WL_PHY_INFO_TX_RATE_DESC(h2c_pkt, value) \
589 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
590 #define SET_WL_PHY_INFO_RX_RATE_DESC(h2c_pkt, value) \
591 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
592 #define SET_WL_PHY_INFO_RX_EVM(h2c_pkt, value) \
593 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
594 #define SET_BCN_FILTER_OFFLOAD_P1_MACID(h2c_pkt, value) \
595 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
596 #define SET_BCN_FILTER_OFFLOAD_P1_ENABLE(h2c_pkt, value) \
597 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(16))
598 #define SET_BCN_FILTER_OFFLOAD_P1_HYST(h2c_pkt, value) \
599 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 17))
600 #define SET_BCN_FILTER_OFFLOAD_P1_OFFLOAD_MODE(h2c_pkt, value) \
601 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 21))
602 #define SET_BCN_FILTER_OFFLOAD_P1_THRESHOLD(h2c_pkt, value) \
603 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
604 #define SET_BCN_FILTER_OFFLOAD_P1_BCN_LOSS_CNT(h2c_pkt, value) \
605 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(3, 0))
606 #define SET_BCN_FILTER_OFFLOAD_P1_BCN_INTERVAL(h2c_pkt, value) \
607 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(13, 4))
609 #define SET_SCAN_START(h2c_pkt, value) \
610 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
612 #define SET_ADAPTIVITY_MODE(h2c_pkt, value) \
613 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(11, 8))
614 #define SET_ADAPTIVITY_OPTION(h2c_pkt, value) \
615 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12))
616 #define SET_ADAPTIVITY_IGI(h2c_pkt, value) \
617 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
618 #define SET_ADAPTIVITY_L2H(h2c_pkt, value) \
619 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
620 #define SET_ADAPTIVITY_DENSITY(h2c_pkt, value) \
621 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
623 #define SET_PWR_MODE_SET_MODE(h2c_pkt, value) \
624 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8))
625 #define SET_PWR_MODE_SET_RLBM(h2c_pkt, value) \
626 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(19, 16))
627 #define SET_PWR_MODE_SET_SMART_PS(h2c_pkt, value) \
628 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 20))
629 #define SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, value) \
630 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
631 #define SET_PWR_MODE_SET_PORT_ID(h2c_pkt, value) \
632 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 5))
633 #define SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, value) \
634 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
635 #define LPS_PG_INFO_LOC(h2c_pkt, value) \
636 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
637 #define LPS_PG_DPK_LOC(h2c_pkt, value) \
638 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
639 #define LPS_PG_SEC_CAM_EN(h2c_pkt, value) \
640 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
641 #define LPS_PG_PATTERN_CAM_EN(h2c_pkt, value) \
642 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
643 #define SET_RSSI_INFO_MACID(h2c_pkt, value) \
644 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
645 #define SET_RSSI_INFO_RSSI(h2c_pkt, value) \
646 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
647 #define SET_RSSI_INFO_STBC(h2c_pkt, value) \
648 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, BIT(1))
649 #define SET_RA_INFO_MACID(h2c_pkt, value) \
650 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
651 #define SET_RA_INFO_RATE_ID(h2c_pkt, value) \
652 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 16))
653 #define SET_RA_INFO_INIT_RA_LVL(h2c_pkt, value) \
654 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(22, 21))
655 #define SET_RA_INFO_SGI_EN(h2c_pkt, value) \
656 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(23))
657 #define SET_RA_INFO_BW_MODE(h2c_pkt, value) \
658 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(25, 24))
659 #define SET_RA_INFO_LDPC(h2c_pkt, value) \
660 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(26))
661 #define SET_RA_INFO_NO_UPDATE(h2c_pkt, value) \
662 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(27))
663 #define SET_RA_INFO_VHT_EN(h2c_pkt, value) \
664 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(29, 28))
665 #define SET_RA_INFO_DIS_PT(h2c_pkt, value) \
666 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(30))
667 #define SET_RA_INFO_RA_MASK0(h2c_pkt, value) \
668 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
669 #define SET_RA_INFO_RA_MASK1(h2c_pkt, value) \
670 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
671 #define SET_RA_INFO_RA_MASK2(h2c_pkt, value) \
672 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
673 #define SET_RA_INFO_RA_MASK3(h2c_pkt, value) \
674 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 24))
675 #define SET_QUERY_BT_INFO(h2c_pkt, value) \
676 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
677 #define SET_WL_CH_INFO_LINK(h2c_pkt, value) \
678 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
679 #define SET_WL_CH_INFO_CHNL(h2c_pkt, value) \
680 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
681 #define SET_WL_CH_INFO_BW(h2c_pkt, value) \
682 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
683 #define SET_BT_MP_INFO_SEQ(h2c_pkt, value) \
684 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12))
685 #define SET_BT_MP_INFO_OP_CODE(h2c_pkt, value) \
686 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
687 #define SET_BT_MP_INFO_PARA1(h2c_pkt, value) \
688 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
689 #define SET_BT_MP_INFO_PARA2(h2c_pkt, value) \
690 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
691 #define SET_BT_MP_INFO_PARA3(h2c_pkt, value) \
692 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
693 #define SET_BT_TX_POWER_INDEX(h2c_pkt, value) \
694 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
695 #define SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, value) \
696 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
697 #define SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, value) \
698 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
699 #define SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, value) \
700 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
701 #define SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, value) \
702 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
703 #define SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, value) \
704 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
705 #define SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, value) \
706 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
707 #define SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, value) \
708 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
709 #define SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, value) \
710 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
711 #define SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, value) \
712 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
713 #define SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, value) \
714 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
715 #define SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, value) \
716 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
717 #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \
718 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
720 #define SET_COEX_QUERY_HID_INFO_SUBID(h2c_pkt, value) \
721 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
722 #define SET_COEX_QUERY_HID_INFO_DATA1(h2c_pkt, value) \
723 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
725 #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \
726 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
727 #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \
728 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
729 #define SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, value) \
730 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
731 #define SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, value) \
732 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
734 #define SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, value) \
735 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
736 #define SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, value) \
737 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
738 #define SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, value) \
739 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
740 #define SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, value) \
741 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
743 #define SET_WOWLAN_FUNC_ENABLE(h2c_pkt, value) \
744 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
745 #define SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, value) \
746 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
747 #define SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, value) \
748 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
749 #define SET_WOWLAN_UNICAST_PKT_ENABLE(h2c_pkt, value) \
750 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(11))
751 #define SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, value) \
752 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(14))
753 #define SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, value) \
754 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(15))
756 #define SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, value) \
757 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
758 #define SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, value) \
759 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(12))
761 #define SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, value) \
762 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
763 #define SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, value) \
764 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
766 #define SET_NLO_FUN_EN(h2c_pkt, value) \
767 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
768 #define SET_NLO_PS_32K(h2c_pkt, value) \
769 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
770 #define SET_NLO_IGNORE_SECURITY(h2c_pkt, value) \
771 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
772 #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \
773 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
775 #define SET_RECOVER_BT_DEV_EN(h2c_pkt, value) \
776 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
793 #define RFK_SET_INFORM_START(h2c_pkt, value) \
794 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))