Lines Matching full:bit
12 #define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)
13 #define MT_MCU_INT_EVENT_DMA_INIT BIT(1)
14 #define MT_MCU_INT_EVENT_SER_TRIGGER BIT(2)
15 #define MT_MCU_INT_EVENT_RESET_DONE BIT(3)
33 #define MT_TMAC_TCR0_TBTT_STOP_CTRL BIT(25)
48 #define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17)
49 #define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18)
59 #define MT_DMA_DCR0_RXD_G5_EN BIT(23)
78 #define MT_LPON_TCR_SW_WRITE BIT(0)
99 #define MT_MIB_TXDUR_EN BIT(8)
100 #define MT_MIB_RXDUR_EN BIT(9)
160 #define MT_WTBL_UPDATE_BUSY BIT(31)
163 #define MT_WTBL_ITCR_WR BIT(16)
164 #define MT_WTBL_ITCR_EXEC BIT(31)
167 #define MT_WTBL_SPE_IDX_SEL BIT(6)
182 #define MT_AGG_PCR0_MM_PROT BIT(0)
183 #define MT_AGG_PCR0_GF_PROT BIT(1)
184 #define MT_AGG_PCR0_BW20_PROT BIT(2)
185 #define MT_AGG_PCR0_BW40_PROT BIT(4)
186 #define MT_AGG_PCR0_BW80_PROT BIT(6)
188 #define MT_AGG_PCR0_VHT_PROT BIT(13)
189 #define MT_AGG_PCR0_PTA_WIN_DIS BIT(15)
200 #define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6)
212 #define MT_ARB_SCR_TX_DISABLE BIT(8)
213 #define MT_ARB_SCR_RX_DISABLE BIT(9)
222 #define MT_WF_RFCR_DROP_STBC_MULTI BIT(0)
223 #define MT_WF_RFCR_DROP_FCSFAIL BIT(1)
224 #define MT_WF_RFCR_DROP_VERSION BIT(3)
225 #define MT_WF_RFCR_DROP_PROBEREQ BIT(4)
226 #define MT_WF_RFCR_DROP_MCAST BIT(5)
227 #define MT_WF_RFCR_DROP_BCAST BIT(6)
228 #define MT_WF_RFCR_DROP_MCAST_FILTERED BIT(7)
229 #define MT_WF_RFCR_DROP_A3_MAC BIT(8)
230 #define MT_WF_RFCR_DROP_A3_BSSID BIT(9)
231 #define MT_WF_RFCR_DROP_A2_BSSID BIT(10)
232 #define MT_WF_RFCR_DROP_OTHER_BEACON BIT(11)
233 #define MT_WF_RFCR_DROP_FRAME_REPORT BIT(12)
234 #define MT_WF_RFCR_DROP_CTL_RSV BIT(13)
235 #define MT_WF_RFCR_DROP_CTS BIT(14)
236 #define MT_WF_RFCR_DROP_RTS BIT(15)
237 #define MT_WF_RFCR_DROP_DUPLICATE BIT(16)
238 #define MT_WF_RFCR_DROP_OTHER_BSS BIT(17)
239 #define MT_WF_RFCR_DROP_OTHER_UC BIT(18)
240 #define MT_WF_RFCR_DROP_OTHER_TIM BIT(19)
241 #define MT_WF_RFCR_DROP_NDPA BIT(20)
242 #define MT_WF_RFCR_DROP_UNWANTED_CTL BIT(21)
245 #define MT_WF_RFCR1_DROP_ACK BIT(4)
246 #define MT_WF_RFCR1_DROP_BF_POLL BIT(5)
247 #define MT_WF_RFCR1_DROP_BA BIT(6)
248 #define MT_WF_RFCR1_DROP_CFEND BIT(7)
249 #define MT_WF_RFCR1_DROP_CFACK BIT(8)
252 #define MT_WF_RMAC_MIB_RXTIME_CLR BIT(31)
253 #define MT_WF_RMAC_MIB_RXTIME_EN BIT(30)
264 #define MT_WFDMA0_RST_LOGIC_RST BIT(4)
265 #define MT_WFDMA0_RST_DMASHDL_ALL_RST BIT(5)
268 #define MT_WFDMA0_BUSY_ENA_TX_FIFO0 BIT(0)
269 #define MT_WFDMA0_BUSY_ENA_TX_FIFO1 BIT(1)
270 #define MT_WFDMA0_BUSY_ENA_RX_FIFO BIT(2)
273 #define MT_MCU_CMD_WAKE_RX_PCIE BIT(0)
274 #define MT_MCU_CMD_STOP_DMA_FW_RELOAD BIT(1)
275 #define MT_MCU_CMD_STOP_DMA BIT(2)
276 #define MT_MCU_CMD_RESET_DONE BIT(3)
277 #define MT_MCU_CMD_RECOVERY_DONE BIT(4)
278 #define MT_MCU_CMD_NORMAL_STATE BIT(5)
284 #define HOST_RX_DONE_INT_STS0 BIT(0) /* Rx mcu */
285 #define HOST_RX_DONE_INT_STS2 BIT(2) /* Rx data */
286 #define HOST_RX_DONE_INT_STS4 BIT(22) /* Rx mcu after fw downloaded */
287 #define HOST_TX_DONE_INT_STS16 BIT(26)
288 #define HOST_TX_DONE_INT_STS17 BIT(27) /* MCU tx done*/
291 #define MT_WFDMA0_GLO_CFG_TX_DMA_EN BIT(0)
292 #define MT_WFDMA0_GLO_CFG_TX_DMA_BUSY BIT(1)
293 #define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2)
294 #define MT_WFDMA0_GLO_CFG_RX_DMA_BUSY BIT(3)
296 #define MT_WFDMA0_GLO_CFG_TX_WB_DDONE BIT(6)
297 #define MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL BIT(9)
298 #define MT_WFDMA0_GLO_CFG_FIFO_DIS_CHECK BIT(11)
299 #define MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12)
300 #define MT_WFDMA0_GLO_CFG_RX_WB_DDONE BIT(13)
301 #define MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN BIT(15)
302 #define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21)
303 #define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO BIT(27)
304 #define MT_WFDMA0_GLO_CFG_OMIT_TX_INFO BIT(28)
305 #define MT_WFDMA0_GLO_CFG_CLK_GAT_DIS BIT(30)
307 #define HOST_RX_DONE_INT_ENA0 BIT(0)
308 #define HOST_RX_DONE_INT_ENA1 BIT(1)
309 #define HOST_RX_DONE_INT_ENA2 BIT(2)
310 #define HOST_RX_DONE_INT_ENA3 BIT(3)
311 #define HOST_TX_DONE_INT_ENA0 BIT(4)
312 #define HOST_TX_DONE_INT_ENA1 BIT(5)
313 #define HOST_TX_DONE_INT_ENA2 BIT(6)
314 #define HOST_TX_DONE_INT_ENA3 BIT(7)
315 #define HOST_TX_DONE_INT_ENA4 BIT(8)
316 #define HOST_TX_DONE_INT_ENA5 BIT(9)
317 #define HOST_TX_DONE_INT_ENA6 BIT(10)
318 #define HOST_TX_DONE_INT_ENA7 BIT(11)
319 #define HOST_RX_COHERENT_EN BIT(20)
320 #define HOST_TX_COHERENT_EN BIT(21)
321 #define MCU2HOST_SW_INT_ENA BIT(29)
322 #define HOST_TX_DONE_INT_ENA18 BIT(30)
331 #define MT_WFDMA0_CSR_TX_DMASHDL_ENABLE BIT(6)
364 #define MT_WFDMA_EXT_CSR_HIF_MISC_BUSY BIT(0)
377 #define MT_TOP_LPCR_HOST_FW_OWN BIT(0)
378 #define MT_TOP_LPCR_HOST_DRV_OWN BIT(1)
387 #define MT_WFDMA_NEED_REINIT BIT(1)
391 #define MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH BIT(0)
398 #define MT_HW_EMI_CTL_SLPPROT_EN BIT(1)
404 #define MT_PCIE_MAC_PM_L0S_DIS BIT(8)
408 #define MT_DMASHDL_DMASHDL_BYPASS BIT(28)
411 #define MT_DMASHDL_GROUP_SEQ_ORDER BIT(16)
429 #define MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN BIT(6)
433 #define MT_FW_DL_EN BIT(3)
442 #define MT_WL_TX_TMOUT_FUNC_EN BIT(16)
443 #define MT_WL_TX_DPH_CHK_EN BIT(17)
444 #define MT_WL_RX_MPSZ_PAD0 BIT(18)
445 #define MT_WL_RX_FLUSH BIT(19)
446 #define MT_TICK_1US_EN BIT(20)
447 #define MT_WL_RX_AGG_EN BIT(21)
448 #define MT_WL_RX_EN BIT(22)
449 #define MT_WL_TX_EN BIT(23)
450 #define MT_WL_RX_BUSY BIT(30)
451 #define MT_WL_TX_BUSY BIT(31)
454 #define MT_UDMA_CONN_WFSYS_INIT_DONE BIT(22)
467 #define MT_WIFI_PATCH_DL_STATE BIT(0)
470 #define PCIE_LPCR_HOST_SET_OWN BIT(0)
471 #define PCIE_LPCR_HOST_CLR_OWN BIT(1)
472 #define PCIE_LPCR_HOST_OWN_SYNC BIT(2)
475 #define MT_TOP_MISC2_FW_PWR_ON BIT(0)
476 #define MT_TOP_MISC2_FW_N9_ON BIT(1)
481 #define MT_WF_SW_SER_TRIGGER_SUSPEND BIT(6)
482 #define MT_WF_SW_SER_DONE_SUSPEND BIT(7)
484 #define WFSYS_SW_RST_B BIT(0)
485 #define WFSYS_SW_INIT_DONE BIT(4)