20 	mt76_wr(dev, dev->irq_map->host_irq_enable, 0);  in mt792x_irq_handler()
34 	const struct mt792x_irq_map *irq_map = dev->irq_map;  in mt792x_irq_tasklet()  local
37 	mt76_wr(dev, irq_map->host_irq_enable, 0);  in mt792x_irq_tasklet()
45 	mask |= intr & (irq_map->rx.data_complete_mask |  in mt792x_irq_tasklet()
46 			irq_map->rx.wm_complete_mask |  in mt792x_irq_tasklet()
47 			irq_map->rx.wm2_complete_mask);  in mt792x_irq_tasklet()
48 	if (intr & dev->irq_map->tx.mcu_complete_mask)  in mt792x_irq_tasklet()
49 		mask |= dev->irq_map->tx.mcu_complete_mask;  in mt792x_irq_tasklet()
58 			mask |= irq_map->rx.data_complete_mask;  in mt792x_irq_tasklet()
59 			intr |= irq_map->rx.data_complete_mask;  in mt792x_irq_tasklet()
63 	mt76_set_irq_mask(&dev->mt76, irq_map->host_irq_enable, mask, 0);  in mt792x_irq_tasklet()
65 	if (intr & dev->irq_map->tx.all_complete_mask)  in mt792x_irq_tasklet()
68 	if (intr & irq_map->rx.wm_complete_mask)  in mt792x_irq_tasklet()
71 	if (intr & irq_map->rx.wm2_complete_mask)  in mt792x_irq_tasklet()
74 	if (intr & irq_map->rx.data_complete_mask)  in mt792x_irq_tasklet()
82 	const struct mt792x_irq_map *irq_map = dev->irq_map;  in mt792x_rx_poll_complete()  local
85 		mt76_connac_irq_enable(mdev, irq_map->rx.data_complete_mask);  in mt792x_rx_poll_complete()
87 		mt76_connac_irq_enable(mdev, irq_map->rx.wm2_complete_mask);  in mt792x_rx_poll_complete()
89 		mt76_connac_irq_enable(mdev, irq_map->rx.wm_complete_mask);  in mt792x_rx_poll_complete()
165 			       dev->irq_map->tx.all_complete_mask |  in mt792x_dma_enable()
166 			       dev->irq_map->rx.data_complete_mask |  in mt792x_dma_enable()
167 			       dev->irq_map->rx.wm2_complete_mask |  in mt792x_dma_enable()
168 			       dev->irq_map->rx.wm_complete_mask |  in mt792x_dma_enable()
238 		mt76_wr(dev, dev->irq_map->host_irq_enable, 0);  in mt792x_wpdma_reinit_cond()
334 				       dev->irq_map->tx.all_complete_mask);  in mt792x_poll_tx()