Lines Matching refs:__REG
126 #define __REG(id) (dev->reg.reg_rev[(id)]) macro
139 #define MT_MCU_INT_EVENT __REG(INT_MCU_CMD_EVENT)
581 #define MT_WFDMA0_BASE __REG(WFDMA0_ADDR)
636 #define MT_WFDMA_EXT_CSR_BASE __REG(WFDMA_EXT_CSR_ADDR)
664 #define MT_WFDMA0_PCIE1_BASE __REG(WFDMA0_PCIE1_ADDR)
704 #define MT_TXQ_WED_RING_BASE __REG(TXQ_WED_RING_BASE)
705 #define MT_RXQ_WED_RING_BASE __REG(RXQ_WED_RING_BASE)
706 #define MT_RXQ_WED_DATA_RING_BASE __REG(RXQ_WED_DATA_RING_BASE)
708 #define MT_INT_SOURCE_CSR __REG(INT_SOURCE_CSR)
709 #define MT_INT_MASK_CSR __REG(INT_MASK_CSR)
711 #define MT_INT1_SOURCE_CSR __REG(INT1_SOURCE_CSR)
712 #define MT_INT1_MASK_CSR __REG(INT1_MASK_CSR)
761 #define MT_MCU_CMD __REG(INT_MCU_CMD_SOURCE)
815 #define MT_CBTOP1_PHY_END __REG(CBTOP1_PHY_END)
818 #define MT_INFRA_MCU_END __REG(INFRA_MCU_ADDR_END)
1019 #define MT_FW_ASSERT_STAT __REG(FW_ASSERT_STAT_ADDR)
1020 #define MT_FW_EXCEPT_TYPE __REG(FW_EXCEPT_TYPE_ADDR)
1021 #define MT_FW_EXCEPT_COUNT __REG(FW_EXCEPT_COUNT_ADDR)
1022 #define MT_FW_CIRQ_COUNT __REG(FW_CIRQ_COUNT_ADDR)
1023 #define MT_FW_CIRQ_IDX __REG(FW_CIRQ_IDX_ADDR)
1024 #define MT_FW_CIRQ_LISR __REG(FW_CIRQ_LISR_ADDR)
1025 #define MT_FW_TASK_ID __REG(FW_TASK_ID_ADDR)
1026 #define MT_FW_TASK_IDX __REG(FW_TASK_IDX_ADDR)
1027 #define MT_FW_TASK_QID1 __REG(FW_TASK_QID1_ADDR)
1028 #define MT_FW_TASK_QID2 __REG(FW_TASK_QID2_ADDR)
1029 #define MT_FW_TASK_START __REG(FW_TASK_START_ADDR)
1030 #define MT_FW_TASK_END __REG(FW_TASK_END_ADDR)
1031 #define MT_FW_TASK_SIZE __REG(FW_TASK_SIZE_ADDR)
1032 #define MT_FW_LAST_MSG_ID __REG(FW_LAST_MSG_ID_ADDR)
1033 #define MT_FW_EINT_INFO __REG(FW_EINT_INFO_ADDR)
1034 #define MT_FW_SCHED_INFO __REG(FW_SCHED_INFO_ADDR)
1036 #define MT_SWDEF_BASE __REG(SWDEF_BASE_ADDR)