Lines Matching full:mmio
15 val = readl(dev->mmio.regs + offset); in mt76_mmio_rr()
17 val = readl((u8 *)dev->mmio.regs + offset); in mt76_mmio_rr()
28 writel(val, dev->mmio.regs + offset); in mt76_mmio_wr()
30 writel(val, (u8 *)dev->mmio.regs + offset); in mt76_mmio_wr()
45 __iowrite32_copy(dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4)); in mt76_mmio_write_copy()
47 __iowrite32_copy((u8 *)dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4)); in mt76_mmio_write_copy()
55 __ioread32_copy(data, dev->mmio.regs + offset, DIV_ROUND_UP(len, 4)); in mt76_mmio_read_copy()
57 __ioread32_copy(data, (u8 *)dev->mmio.regs + offset, DIV_ROUND_UP(len, 4)); in mt76_mmio_read_copy()
90 spin_lock_irqsave(&dev->mmio.irq_lock, flags); in mt76_set_irq_mask()
91 dev->mmio.irqmask &= ~clear; in mt76_set_irq_mask()
92 dev->mmio.irqmask |= set; in mt76_set_irq_mask()
94 if (mtk_wed_device_active(&dev->mmio.wed)) in mt76_set_irq_mask()
95 mtk_wed_device_irq_set_mask(&dev->mmio.wed, in mt76_set_irq_mask()
96 dev->mmio.irqmask); in mt76_set_irq_mask()
98 mt76_mmio_wr(dev, addr, dev->mmio.irqmask); in mt76_set_irq_mask()
100 spin_unlock_irqrestore(&dev->mmio.irq_lock, flags); in mt76_set_irq_mask()
118 dev->mmio.regs = regs; in mt76_mmio_init()
120 spin_lock_init(&dev->mmio.irq_lock); in mt76_mmio_init()