Lines Matching refs:trans
9 #include "iwl-trans.h"
23 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
27 IWL_DEBUG_INFO(trans, "Init card's basic functions\n");
38 iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS,
42 iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
48 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
51 iwl_pcie_apm_config(trans);
53 ret = iwl_finish_nic_init(trans);
57 set_bit(STATUS_DEVICE_ENABLED, &trans->status);
62 static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
64 IWL_DEBUG_INFO(trans, "Stop card, put in low power state\n");
67 if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status))
68 iwl_pcie_gen2_apm_init(trans);
71 iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
73 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
77 iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
82 clear_bit(STATUS_DEVICE_ENABLED, &trans->status);
85 iwl_pcie_apm_stop_master(trans);
87 iwl_trans_sw_reset(trans, false);
93 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
94 iwl_clear_bit(trans, CSR_GP_CNTRL,
97 iwl_clear_bit(trans, CSR_GP_CNTRL,
101 static void iwl_trans_pcie_fw_reset_handshake(struct iwl_trans *trans)
103 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
108 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
109 iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER,
111 else if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210)
112 iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6,
115 iwl_write32(trans, CSR_DOORBELL_VECTOR,
123 u32 inta_hw = iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD);
125 IWL_ERR(trans,
130 iwl_trans_fw_error(trans, true);
136 void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
138 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
145 if (trans->state >= IWL_TRANS_FW_STARTED)
147 iwl_trans_pcie_fw_reset_handshake(trans);
152 iwl_disable_interrupts(trans);
155 iwl_pcie_disable_ict(trans);
164 if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) {
165 IWL_DEBUG_INFO(trans,
167 iwl_pcie_synchronize_irqs(trans);
168 iwl_pcie_rx_napi_sync(trans);
169 iwl_txq_gen2_tx_free(trans);
170 iwl_pcie_rx_stop(trans);
173 iwl_pcie_ctxt_info_free_paging(trans);
174 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
175 iwl_pcie_ctxt_info_gen3_free(trans, false);
177 iwl_pcie_ctxt_info_free(trans);
180 iwl_pcie_gen2_apm_stop(trans, false);
183 iwl_trans_sw_reset(trans, true);
201 iwl_disable_interrupts(trans);
204 clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);
205 clear_bit(STATUS_INT_ENABLED, &trans->status);
206 clear_bit(STATUS_TPOWER_PMI, &trans->status);
212 iwl_enable_rfkill_int(trans);
215 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
217 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
220 iwl_op_mode_time_point(trans->op_mode,
226 was_in_rfkill = test_bit(STATUS_RFKILL_OPMODE, &trans->status);
227 _iwl_trans_pcie_gen2_stop_device(trans);
228 iwl_trans_pcie_handle_stop_rfkill(trans, was_in_rfkill);
232 static int iwl_pcie_gen2_nic_init(struct iwl_trans *trans)
234 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
236 trans->cfg->min_txq_size);
241 ret = iwl_pcie_gen2_apm_init(trans);
246 iwl_op_mode_nic_config(trans->op_mode);
249 if (iwl_pcie_gen2_rx_init(trans))
253 if (iwl_txq_gen2_init(trans, trans_pcie->txqs.cmd.q_id, queue_size))
257 iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF);
258 IWL_DEBUG_INFO(trans, "Enabling shadow registers in device\n");
263 static void iwl_pcie_get_rf_name(struct iwl_trans *trans)
265 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
274 switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {
301 CSR_HW_RFID_STEP(trans->hw_rf_id))
310 switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {
314 version = iwl_read_prph(trans, CNVI_MBOX_C);
333 trans->hw_rf_id);
335 IWL_INFO(trans, "Detected RF %s\n", buf);
345 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans)
347 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
349 iwl_pcie_reset_ict(trans);
360 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
361 iwl_pcie_ctxt_info_gen3_free(trans, true);
363 iwl_pcie_ctxt_info_free(trans);
369 iwl_enable_interrupts(trans);
371 iwl_pcie_check_hw_rf_kill(trans);
373 iwl_pcie_get_rf_name(trans);
377 static bool iwl_pcie_set_ltr(struct iwl_trans *trans)
394 if ((trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210 ||
395 trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) &&
396 !trans->trans_cfg->integrated) {
397 iwl_write32(trans, CSR_LTR_LONG_VAL_AD, ltr_val);
401 if (trans->trans_cfg->integrated &&
402 trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) {
403 iwl_write_prph(trans, HPM_MAC_LTR_CSR, HPM_MAC_LRT_ENABLE_ALL);
404 iwl_write_prph(trans, HPM_UMAC_LTR, ltr_val);
408 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
410 iwl_write32(trans, CSR_MSIX_HW_INT_CAUSES_AD,
426 static void iwl_pcie_spin_for_iml(struct iwl_trans *trans)
430 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
438 value = iwl_read32(trans, CSR_LTR_LAST_MSG);
439 IWL_DEBUG_INFO(trans, "Polling for IML load - CSR_LTR_LAST_MSG=0x%x\n",
443 if (iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD) &
449 value = iwl_read32(trans, CSR_LTR_LAST_MSG);
453 IWL_DEBUG_INFO(trans,
464 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
467 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
472 if (iwl_pcie_prepare_card_hw(trans)) {
473 IWL_WARN(trans, "Exit HW not ready\n");
477 iwl_enable_rfkill_int(trans);
479 iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
486 iwl_disable_interrupts(trans);
489 iwl_pcie_synchronize_irqs(trans);
494 hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);
502 IWL_WARN(trans,
509 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
510 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,
514 iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
516 ret = iwl_pcie_gen2_nic_init(trans);
518 IWL_ERR(trans, "Unable to init nic\n");
522 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
523 ret = iwl_pcie_ctxt_info_gen3_init(trans, fw);
525 ret = iwl_pcie_ctxt_info_init(trans, fw);
529 keep_ram_busy = !iwl_pcie_set_ltr(trans);
531 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
532 iwl_write32(trans, CSR_FUNC_SCRATCH, CSR_FUNC_SCRATCH_INIT_VALUE);
533 iwl_set_bit(trans, CSR_GP_CNTRL,
535 } else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
536 iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);
538 iwl_write_prph(trans, UREG_CPU_INIT_RUN, 1);
542 iwl_pcie_spin_for_iml(trans);
545 hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);