Lines Matching +full:control +full:- +full:bit

1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3  * Copyright (C) 2018, 2020-2025 Intel Corporation
8 #include "iwl-context-info.h"
18 /* Set bit for enabling automatic function boot */
19 #define CSR_AUTO_FUNC_BOOT_ENA          BIT(1)
20 /* Set bit for initiating function boot */
21 #define CSR_AUTO_FUNC_INIT              BIT(7)
24  * enum iwl_prph_scratch_mtr_format - tfd size configuration
25  * @IWL_PRPH_MTR_FORMAT_16B: 16 bit tfd
26  * @IWL_PRPH_MTR_FORMAT_32B: 32 bit tfd
27  * @IWL_PRPH_MTR_FORMAT_64B: 64 bit tfd
28  * @IWL_PRPH_MTR_FORMAT_256B: 256 bit tfd
38  * enum iwl_prph_scratch_flags - PRPH scratch control flags
48  * @IWL_PRPH_SCRATCH_MTR_MODE: format used for completion - 0: for
51  *	There are 4 optional values: 0: 16 bit, 1: 32 bit, 2: 64 bit,
52  *	3: 256 bit.
64 	IWL_PRPH_SCRATCH_IMR_DEBUG_EN		= BIT(1),
65 	IWL_PRPH_SCRATCH_EARLY_DEBUG_EN		= BIT(4),
66 	IWL_PRPH_SCRATCH_EDBG_DEST_DRAM		= BIT(8),
67 	IWL_PRPH_SCRATCH_EDBG_DEST_INTERNAL	= BIT(9),
68 	IWL_PRPH_SCRATCH_EDBG_DEST_ST_ARBITER	= BIT(10),
69 	IWL_PRPH_SCRATCH_EDBG_DEST_TB22DTF	= BIT(11),
70 	IWL_PRPH_SCRATCH_RB_SIZE_4K		= BIT(16),
71 	IWL_PRPH_SCRATCH_MTR_MODE		= BIT(17),
72 	IWL_PRPH_SCRATCH_MTR_FORMAT		= BIT(18) | BIT(19),
77 	IWL_PRPH_SCRATCH_SCU_FORCE_ACTIVE	= BIT(29),
78 	IWL_PRPH_SCRATCH_TOP_RESET		= BIT(30),
82  * enum iwl_prph_scratch_ext_flags - PRPH scratch control ext flags
89 	IWL_PRPH_SCRATCH_EXT_EXT_FSEQ		= BIT(0),
90 	IWL_PRPH_SCRATCH_EXT_URM_FW		= BIT(4),
91 	IWL_PRPH_SCRATCH_EXT_URM_PERM		= BIT(5),
92 	IWL_PRPH_SCRATCH_EXT_32KHZ_CLK_VALID	= BIT(8),
96  * struct iwl_prph_scratch_version - version structure
110  * struct iwl_prph_scratch_control - control structure
121  * struct iwl_prph_scratch_pnvm_cfg - PNVM scratch
133  * struct iwl_prph_scratch_mem_desc_addr_array - DRAM
142  * struct iwl_prph_scratch_hwm_cfg - hwm config
154  * struct iwl_prph_scratch_rbd_cfg - RBDs configuration
164  * struct iwl_prph_scratch_uefi_cfg - prph scratch reduce power table
176  * struct iwl_prph_scratch_step_cfg - prph scratch step configuration
190  * struct iwl_prph_scratch_ctrl_cfg - prph scratch ctrl and config
192  * @control: control flags of FH configurations
201 	struct iwl_prph_scratch_control control;  member
212  * struct iwl_context_info_dram_fseq - images DRAM map (with fseq)
223  * struct iwl_prph_scratch - peripheral scratch mapping
224  * @ctrl_cfg: control and configuration of prph scratch
239  * struct iwl_prph_info - peripheral information
253  * struct iwl_context_info_v2 - device INIT configuration
256  * @config: context in which the peripheral would execute - a subset of
289  * @msg_rings_ctrl_flags: message rings control flags