Lines Matching refs:ctxt_info_gen3
104 struct iwl_context_info_gen3 *ctxt_info_gen3;
198 ctxt_info_gen3 = dma_alloc_coherent(trans->dev,
199 sizeof(*ctxt_info_gen3),
202 if (!ctxt_info_gen3) {
207 ctxt_info_gen3->prph_info_base_addr =
209 ctxt_info_gen3->prph_scratch_base_addr =
211 ctxt_info_gen3->prph_scratch_size =
213 ctxt_info_gen3->cr_head_idx_arr_base_addr =
215 ctxt_info_gen3->tr_tail_idx_arr_base_addr =
217 ctxt_info_gen3->cr_tail_idx_arr_base_addr =
219 ctxt_info_gen3->mtr_base_addr =
221 ctxt_info_gen3->mcr_base_addr =
223 ctxt_info_gen3->mtr_size =
225 ctxt_info_gen3->mcr_size =
228 trans_pcie->ctxt_info_gen3 = ctxt_info_gen3;
258 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),
259 trans_pcie->ctxt_info_gen3,
261 trans_pcie->ctxt_info_gen3 = NULL;
291 if (!trans_pcie->ctxt_info_gen3)
294 /* ctxt_info_gen3 and prph_scratch are still needed for PNVM load */
295 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),
296 trans_pcie->ctxt_info_gen3,
299 trans_pcie->ctxt_info_gen3 = NULL;