Lines Matching full:trans
6 #include "iwl-trans.h"
33 iwl_pcie_ctxt_info_dbg_enable(struct iwl_trans *trans,
41 if (!iwl_trans_dbg_ini_valid(trans)) {
42 struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon;
44 iwl_pcie_alloc_fw_monitor(trans, 0);
49 IWL_DEBUG_FW(trans,
59 fw_mon_cfg = &trans->dbg.fw_mon_cfg[alloc_id];
64 IWL_DEBUG_FW(trans,
70 IWL_DEBUG_FW(trans,
75 if (trans->dbg.fw_mon_ini[alloc_id].num_frags) {
77 &trans->dbg.fw_mon_ini[alloc_id].frags[0];
81 dbg_cfg->debug_token_config = cpu_to_le32(trans->dbg.ucode_preset);
82 IWL_DEBUG_FW(trans,
85 IWL_DEBUG_FW(trans,
88 trans->dbg.fw_mon_ini[alloc_id].num_frags);
92 IWL_DEBUG_FW(trans, "WRT: Invalid buffer destination (%d)\n",
100 int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans,
103 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
111 trans->cfg->min_txq_size);
134 prph_scratch = dma_alloc_coherent(trans->dev, sizeof(*prph_scratch),
144 cpu_to_le16((u16)trans->hw_rev);
150 if (trans->trans_cfg->imr_enabled)
153 if (CSR_HW_REV_TYPE(trans->hw_rev) == IWL_CFG_MAC_TYPE_GL &&
156 IWL_DEBUG_FW(trans,
165 iwl_pcie_ctxt_info_dbg_enable(trans, &prph_sc_ctrl->hwm_cfg,
170 prph_sc_ctrl->step_cfg.mbx_addr_0 = cpu_to_le32(trans->mbx_addr_0_step);
171 prph_sc_ctrl->step_cfg.mbx_addr_1 = cpu_to_le32(trans->mbx_addr_1_step);
174 ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram);
189 prph_info = dma_alloc_coherent(trans->dev, PAGE_SIZE,
198 ctxt_info_gen3 = dma_alloc_coherent(trans->dev,
226 cpu_to_le16(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds));
233 trans_pcie->iml = dma_alloc_coherent(trans->dev, trans->iml_len,
241 memcpy(trans_pcie->iml, trans->iml, trans->iml_len);
243 iwl_enable_fw_load_int_ctx_info(trans);
246 iwl_write64(trans, CSR_CTXT_INFO_ADDR,
248 iwl_write64(trans, CSR_IML_DATA_ADDR,
250 iwl_write32(trans, CSR_IML_SIZE_ADDR, trans->iml_len);
252 iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL,
258 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),
263 dma_free_coherent(trans->dev, PAGE_SIZE, prph_info,
267 dma_free_coherent(trans->dev,
275 void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans, bool alive)
277 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
280 dma_free_coherent(trans->dev, trans->iml_len, trans_pcie->iml,
286 iwl_pcie_ctxt_info_free_fw_img(trans);
295 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),
301 dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch),
308 dma_free_coherent(trans->dev, PAGE_SIZE, trans_pcie->prph_info,
314 static int iwl_pcie_load_payloads_continuously(struct iwl_trans *trans,
321 IWL_DEBUG_FW(trans, "expected 2 payloads, got %d.\n",
329 IWL_DEBUG_FW(trans, "sizes of payloads overflow.\n");
334 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len,
337 IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA.\n");
349 (struct iwl_trans *trans,
363 (trans,
367 IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA.\n");
379 if (iwl_pcie_ctxt_info_alloc_dma(trans,
384 trans->dev);
403 int iwl_trans_pcie_ctx_info_gen3_load_pnvm(struct iwl_trans *trans,
407 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
414 if (trans->pnvm_loaded)
420 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
424 IWL_DEBUG_FW(trans, "no payloads\n");
430 ret = iwl_pcie_load_payloads_segments(trans,
434 trans->pnvm_loaded = true;
438 (trans,
443 trans->pnvm_loaded = true;
462 static void iwl_pcie_set_pnvm_segments(struct iwl_trans *trans)
464 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
475 static void iwl_pcie_set_continuous_pnvm(struct iwl_trans *trans)
477 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
487 void iwl_trans_pcie_ctx_info_gen3_set_pnvm(struct iwl_trans *trans,
490 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
494 iwl_pcie_set_pnvm_segments(trans);
496 iwl_pcie_set_continuous_pnvm(trans);
499 int iwl_trans_pcie_ctx_info_gen3_load_reduce_power(struct iwl_trans *trans,
503 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
510 if (trans->reduce_power_loaded)
513 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
520 IWL_DEBUG_FW(trans, "no payloads\n");
526 ret = iwl_pcie_load_payloads_segments(trans,
530 trans->reduce_power_loaded = true;
534 (trans,
539 trans->reduce_power_loaded = true;
546 static void iwl_pcie_set_reduce_power_segments(struct iwl_trans *trans)
548 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
559 static void iwl_pcie_set_continuous_reduce_power(struct iwl_trans *trans)
561 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
572 iwl_trans_pcie_ctx_info_gen3_set_reduce_power(struct iwl_trans *trans,
575 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
579 iwl_pcie_set_reduce_power_segments(trans);
581 iwl_pcie_set_continuous_reduce_power(trans);