Lines Matching refs:tid_data

474 		if (mvmsta->tid_data[tid].state == IWL_AGG_ON)
521 if (mvmsta->tid_data[tid].state == IWL_AGG_ON)
523 mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
538 * The TX path may have been using this TXQ_ID from the tid_data,
926 mvmsta->tid_data[tid].txq_id = queue;
1088 ssn = IEEE80211_SEQ_TO_SN(mvmsta->tid_data[tid].seq_number);
1100 if (mvmsta->tid_data[tid].state == IWL_AGG_ON) {
1151 if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
1155 if (mvmsta->tid_data[tid].state != IWL_AGG_OFF)
1172 mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
1353 ssn = IEEE80211_SEQ_TO_SN(mvmsta->tid_data[tid].seq_number);
1453 mvmsta->tid_data[tid].seq_number += 0x10;
1456 mvmsta->tid_data[tid].txq_id = queue;
1458 queue_state = mvmsta->tid_data[tid].state;
1641 struct iwl_mvm_tid_data *tid_data = &mvm_sta->tid_data[i];
1642 int txq_id = tid_data->txq_id;
1664 tid_data->txq_id = txq_id;
1672 tid_data->seq_number = 0;
1674 u16 seq = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
1786 mvm_sta->tid_data[i].txq_id = IWL_MVM_INVALID_QUEUE;
2007 for (i = 0; i < ARRAY_SIZE(mvm_sta->tid_data); i++) {
2008 if (mvm_sta->tid_data[i].txq_id == IWL_MVM_INVALID_QUEUE)
2012 &mvm_sta->tid_data[i].txq_id, i);
2013 mvm_sta->tid_data[i].txq_id = IWL_MVM_INVALID_QUEUE;
2033 for (i = 0; i < ARRAY_SIZE(mvm_sta->tid_data); i++) {
2038 txq_id = mvm_sta->tid_data[i].txq_id;
3110 struct iwl_mvm_tid_data *tid_data;
3118 if (mvmsta->tid_data[tid].state != IWL_AGG_QUEUED &&
3119 mvmsta->tid_data[tid].state != IWL_AGG_OFF) {
3122 mvmsta->tid_data[tid].state);
3128 if (mvmsta->tid_data[tid].txq_id == IWL_MVM_INVALID_QUEUE &&
3145 txq_id = mvmsta->tid_data[tid].txq_id;
3178 tid_data = &mvmsta->tid_data[tid];
3179 tid_data->ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
3180 tid_data->txq_id = txq_id;
3181 *ssn = tid_data->ssn;
3186 tid_data->ssn,
3187 tid_data->next_reclaimed);
3193 normalized_ssn = tid_data->ssn;
3197 if (normalized_ssn == tid_data->next_reclaimed) {
3198 tid_data->state = IWL_AGG_STARTING;
3201 tid_data->state = IWL_EMPTYING_HW_QUEUE_ADDBA;
3216 struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
3242 ssn = tid_data->ssn;
3243 queue = tid_data->txq_id;
3244 tid_data->state = IWL_AGG_ON;
3246 tid_data->ssn = 0xffff;
3247 tid_data->amsdu_in_ampdu_allowed = amsdu;
3342 struct iwl_mvm_tid_data *tid_data)
3344 u16 txq_id = tid_data->txq_id;
3360 tid_data->txq_id = IWL_MVM_INVALID_QUEUE;
3368 struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
3383 txq_id = tid_data->txq_id;
3387 tid_data->state);
3391 iwl_mvm_unreserve_agg_queue(mvm, mvmsta, tid_data);
3393 switch (tid_data->state) {
3395 tid_data->ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
3399 tid_data->ssn, tid_data->next_reclaimed);
3401 tid_data->ssn = 0xffff;
3402 tid_data->state = IWL_AGG_OFF;
3420 tid_data->state = IWL_AGG_OFF;
3426 mvmsta->deflink.sta_id, tid, tid_data->state);
3428 "\ttid_data->txq_id = %d\n", tid_data->txq_id);
3441 struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
3450 txq_id = tid_data->txq_id;
3453 tid_data->state);
3454 old_state = tid_data->state;
3455 tid_data->state = IWL_AGG_OFF;
3459 iwl_mvm_unreserve_agg_queue(mvm, mvmsta, tid_data);
4106 struct iwl_mvm_tid_data *tid_data;
4109 tid_data = &mvmsta->tid_data[tid];
4111 n_queued = iwl_mvm_tid_queued(mvm, tid_data);
4314 u16 iwl_mvm_tid_queued(struct iwl_mvm *mvm, struct iwl_mvm_tid_data *tid_data)
4316 u16 sn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
4325 return ieee80211_sn_sub(sn, tid_data->next_reclaimed);