Lines Matching defs:phy_data
956 struct iwl_mvm_rx_phy_data *phy_data,
959 u32 phy_data2 = le32_to_cpu(phy_data->d2);
960 u32 phy_data3 = le32_to_cpu(phy_data->d3);
961 u16 phy_data4 = le16_to_cpu(phy_data->d4);
962 u32 rate_n_flags = phy_data->rate_n_flags;
1007 iwl_mvm_decode_he_phy_ru_alloc(struct iwl_mvm_rx_phy_data *phy_data,
1020 u8 ru = le32_get_bits(phy_data->d1, IWL_RX_PHY_DATA1_HE_RU_ALLOC_MASK);
1021 u32 rate_n_flags = phy_data->rate_n_flags;
1061 if (phy_data->d1 & cpu_to_le32(IWL_RX_PHY_DATA1_HE_RU_ALLOC_SEC80))
1089 struct iwl_mvm_rx_phy_data *phy_data,
1095 switch (phy_data->info_type) {
1112 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->d2,
1115 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->d2,
1118 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->d2,
1121 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->d2,
1137 he->data3 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1140 if (phy_data->info_type != IWL_RX_PHY_INFO_TYPE_HE_TB &&
1141 phy_data->info_type != IWL_RX_PHY_INFO_TYPE_HE_TB_EXT) {
1143 he->data3 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1147 he->data3 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1150 he->data5 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1153 he->data5 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1156 he->data5 |= le16_encode_bits(le32_get_bits(phy_data->d1,
1159 he->data6 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1162 he->data6 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1168 switch (phy_data->info_type) {
1173 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1182 switch (phy_data->info_type) {
1185 le16_encode_bits(le16_get_bits(phy_data->d4,
1189 le16_encode_bits(le16_get_bits(phy_data->d4,
1193 le16_encode_bits(le16_get_bits(phy_data->d4,
1196 iwl_mvm_decode_he_mu_ext(mvm, phy_data, he_mu);
1200 le16_encode_bits(le32_get_bits(phy_data->d1,
1204 le16_encode_bits(le32_get_bits(phy_data->d1,
1210 iwl_mvm_decode_he_phy_ru_alloc(phy_data, he, he_mu, rx_status);
1214 he->data3 |= le16_encode_bits(le32_get_bits(phy_data->d0,
1270 struct iwl_mvm_rx_phy_data *phy_data,
1275 if (phy_data->with_data) {
1276 __le32 data1 = phy_data->d1;
1277 __le32 data2 = phy_data->d2;
1278 __le32 data3 = phy_data->d3;
1279 __le32 data4 = phy_data->eht_d4;
1280 __le32 data5 = phy_data->d5;
1281 u32 phy_bw = phy_data->rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK;
1346 __le32 usig_a1 = phy_data->rx_vec[0];
1347 __le32 usig_a2 = phy_data->rx_vec[1];
1380 struct iwl_mvm_rx_phy_data *phy_data,
1385 if (phy_data->with_data) {
1386 __le32 data5 = phy_data->d5;
1399 __le32 usig_a1 = phy_data->rx_vec[0];
1400 __le32 usig_a2 = phy_data->rx_vec[1];
1496 struct iwl_mvm_rx_phy_data *phy_data,
1502 __le32 data0 = phy_data->d0;
1503 __le32 data1 = phy_data->d1;
1504 __le32 usig_a1 = phy_data->rx_vec[0];
1505 u8 info_type = phy_data->info_type;
1515 if (phy_data->with_data) {
1566 if (phy_data->with_data)
1605 iwl_mvm_decode_eht_ext_tb(mvm, phy_data, rx_status, eht, usig);
1609 iwl_mvm_decode_eht_ext_mu(mvm, phy_data, rx_status, eht, usig);
1613 struct iwl_mvm_rx_phy_data *phy_data,
1622 u32 rate_n_flags = phy_data->rate_n_flags;
1626 u16 phy_info = phy_data->phy_info;
1630 if (phy_data->with_data)
1645 le32_to_cpu(phy_data->d0));
1654 if (phy_data->d0 & cpu_to_le32(IWL_RX_PHY_DATA0_EHT_DELIM_EOF))
1660 (phy_info & IWL_RX_MPDU_PHY_AMPDU) && phy_data->first_subframe) {
1662 if (phy_data->d0 & cpu_to_le32(IWL_RX_PHY_DATA0_EHT_DELIM_EOF))
1667 iwl_mvm_decode_eht_phy_data(mvm, phy_data, rx_status, eht, usig);
1720 if (!phy_data->with_data) {
1724 le32_encode_bits(le32_get_bits(phy_data->rx_vec[2],
1756 struct iwl_mvm_rx_phy_data *phy_data,
1762 u32 rate_n_flags = phy_data->rate_n_flags;
1781 u16 phy_info = phy_data->phy_info;
1786 if (phy_data->info_type == IWL_RX_PHY_INFO_TYPE_HE_MU ||
1787 phy_data->info_type == IWL_RX_PHY_INFO_TYPE_HE_MU_EXT) {
1796 if (phy_data->d0 & cpu_to_le32(IWL_RX_PHY_DATA0_HE_DELIM_EOF))
1801 iwl_mvm_decode_he_phy_data(mvm, phy_data, he, he_mu, rx_status,
1806 (phy_info & IWL_RX_MPDU_PHY_AMPDU) && phy_data->first_subframe) {
1808 if (phy_data->d0 & cpu_to_le32(IWL_RX_PHY_DATA0_EHT_DELIM_EOF))
1883 struct iwl_mvm_rx_phy_data *phy_data)
1888 switch (phy_data->info_type) {
1903 lsig->data2 = le16_encode_bits(le32_get_bits(phy_data->d1,
1932 * as phy_data (apart from phy_data->info_type)
1936 struct iwl_mvm_rx_phy_data *phy_data,
1940 u32 rate_n_flags = phy_data->rate_n_flags;
1945 phy_data->info_type = IWL_RX_PHY_INFO_TYPE_NONE;
1947 if (phy_data->phy_info & IWL_RX_MPDU_PHY_TSF_OVERLOAD)
1948 phy_data->info_type =
1949 le32_get_bits(phy_data->d1,
1972 iwl_mvm_rx_he(mvm, skb, phy_data, queue);
1974 iwl_mvm_decode_lsig(skb, phy_data);
1976 rx_status->device_timestamp = phy_data->gp2_on_air_rise;
1980 iwl_mvm_ptp_get_adj_time(mvm, phy_data->gp2_on_air_rise * NSEC_PER_USEC);
1987 rx_status->freq = ieee80211_channel_to_frequency(phy_data->channel,
1990 phy_data->energy_a, phy_data->energy_b);
1994 iwl_mvm_rx_eht(mvm, skb, phy_data, queue);
2069 struct iwl_mvm_rx_phy_data phy_data = {};
2086 phy_data.rate_n_flags = le32_to_cpu(desc->v3.rate_n_flags);
2087 phy_data.channel = desc->v3.channel;
2088 phy_data.gp2_on_air_rise = le32_to_cpu(desc->v3.gp2_on_air_rise);
2089 phy_data.energy_a = desc->v3.energy_a;
2090 phy_data.energy_b = desc->v3.energy_b;
2092 phy_data.d0 = desc->v3.phy_data0;
2093 phy_data.d1 = desc->v3.phy_data1;
2094 phy_data.d2 = desc->v3.phy_data2;
2095 phy_data.d3 = desc->v3.phy_data3;
2096 phy_data.eht_d4 = desc->phy_eht_data4;
2097 phy_data.d5 = desc->v3.phy_data5;
2099 phy_data.rate_n_flags = le32_to_cpu(desc->v1.rate_n_flags);
2100 phy_data.channel = desc->v1.channel;
2101 phy_data.gp2_on_air_rise = le32_to_cpu(desc->v1.gp2_on_air_rise);
2102 phy_data.energy_a = desc->v1.energy_a;
2103 phy_data.energy_b = desc->v1.energy_b;
2105 phy_data.d0 = desc->v1.phy_data0;
2106 phy_data.d1 = desc->v1.phy_data1;
2107 phy_data.d2 = desc->v1.phy_data2;
2108 phy_data.d3 = desc->v1.phy_data3;
2113 phy_data.rate_n_flags = iwl_new_rate_from_v1(phy_data.rate_n_flags);
2115 phy_data.rate_n_flags);
2118 format = phy_data.rate_n_flags & RATE_MCS_MOD_TYPE_MSK;
2127 phy_data.with_data = true;
2128 phy_data.phy_info = le16_to_cpu(desc->phy_info);
2129 phy_data.d4 = desc->phy_data4;
2166 phy_data.phy_info & IWL_RX_MPDU_PHY_SHORT_PREAMBLE)
2169 if (likely(!(phy_data.phy_info & IWL_RX_MPDU_PHY_TSF_OVERLOAD))) {
2188 rx_status->band = phy_data.channel > 14 ? NL80211_BAND_5GHZ :
2193 if (!queue && (phy_data.phy_info & IWL_RX_MPDU_PHY_AMPDU)) {
2196 toggle_bit = phy_data.phy_info & IWL_RX_MPDU_PHY_AMPDU_TOGGLE;
2208 phy_data.first_subframe = true;
2237 if (iwl_mvm_rx_crypto(mvm, sta, hdr, rx_status, phy_data.phy_info, desc,
2244 iwl_mvm_rx_fill_status(mvm, skb, &phy_data, queue);
2400 struct iwl_mvm_rx_phy_data phy_data;
2410 phy_data.d0 = desc->phy_info[0];
2411 phy_data.d1 = desc->phy_info[1];
2412 phy_data.phy_info = IWL_RX_MPDU_PHY_TSF_OVERLOAD;
2413 phy_data.gp2_on_air_rise = le32_to_cpu(desc->on_air_rise_time);
2414 phy_data.rate_n_flags = le32_to_cpu(desc->rate);
2415 phy_data.energy_a = u32_get_bits(rssi, RX_NO_DATA_CHAIN_A_MSK);
2416 phy_data.energy_b = u32_get_bits(rssi, RX_NO_DATA_CHAIN_B_MSK);
2417 phy_data.channel = u32_get_bits(rssi, RX_NO_DATA_CHANNEL_MSK);
2418 phy_data.with_data = false;
2419 phy_data.rx_vec[0] = desc->rx_vec[0];
2420 phy_data.rx_vec[1] = desc->rx_vec[1];
2425 phy_data.rate_n_flags);
2426 phy_data.rate_n_flags = iwl_new_rate_from_v1(phy_data.rate_n_flags);
2428 phy_data.rate_n_flags);
2431 format = phy_data.rate_n_flags & RATE_MCS_MOD_TYPE_MSK;
2439 phy_data.rx_vec[2] = desc->rx_vec[2];
2440 phy_data.rx_vec[3] = desc->rx_vec[3];
2482 rx_status->band = phy_data.channel > 14 ? NL80211_BAND_5GHZ :
2485 iwl_mvm_rx_fill_status(mvm, skb, &phy_data, queue);