Lines Matching refs:u32
27 * read with u32-sized accesses, any members with a different size
31 u32 valid; /* (nonzero) valid, (0) log is empty */
32 u32 error_id; /* type of error */
33 u32 trm_hw_status0; /* TRM HW status */
34 u32 trm_hw_status1; /* TRM HW status */
35 u32 blink2; /* branch link */
36 u32 ilink1; /* interrupt link */
37 u32 ilink2; /* interrupt link */
38 u32 data1; /* error-specific data */
39 u32 data2; /* error-specific data */
40 u32 data3; /* error-specific data */
41 u32 bcon_time; /* beacon timer */
42 u32 tsf_low; /* network timestamp function timer */
43 u32 tsf_hi; /* network timestamp function timer */
44 u32 gp1; /* GP1 timer register */
45 u32 gp2; /* GP2 timer register */
46 u32 fw_rev_type; /* firmware revision type */
47 u32 major; /* uCode version major */
48 u32 minor; /* uCode version minor */
49 u32 hw_ver; /* HW Silicon version */
50 u32 brd_ver; /* HW board version */
51 u32 log_pc; /* log program counter */
52 u32 frame_ptr; /* frame pointer */
53 u32 stack_ptr; /* stack pointer */
54 u32 hcmd; /* last host command header */
55 u32 isr0; /* isr status register LMPM_NIC_ISR0:
57 u32 isr1; /* isr status register LMPM_NIC_ISR1:
59 u32 isr2; /* isr status register LMPM_NIC_ISR2:
61 u32 isr3; /* isr status register LMPM_NIC_ISR3:
63 u32 isr4; /* isr status register LMPM_NIC_ISR4:
65 u32 last_cmd_id; /* last HCMD id handled by the firmware */
66 u32 wait_event; /* wait event() caller address */
67 u32 l2p_control; /* L2pControlField */
68 u32 l2p_duration; /* L2pDurationField */
69 u32 l2p_mhvalid; /* L2pMhValidBits */
70 u32 l2p_addr_match; /* L2pAddrMatchStat */
71 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
73 u32 u_timestamp; /* indicate when the date and time of the
75 u32 flow_handler; /* FH read/write pointers, RX credit */
82 * read with u32-sized accesses, any members with a different size
86 u32 valid; /* (nonzero) valid, (0) log is empty */
87 u32 error_id; /* type of error */
88 u32 blink1; /* branch link */
89 u32 blink2; /* branch link */
90 u32 ilink1; /* interrupt link */
91 u32 ilink2; /* interrupt link */
92 u32 data1; /* error-specific data */
93 u32 data2; /* error-specific data */
94 u32 data3; /* error-specific data */
95 u32 umac_major;
96 u32 umac_minor;
97 u32 frame_pointer; /* core register 27*/
98 u32 stack_pointer; /* core register 28 */
99 u32 cmd_header; /* latest host cmd sent to UMAC */
100 u32 nic_isr_pref; /* ISR status register */
103 #define ERROR_START_OFFSET (1 * sizeof(u32))
104 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
106 static bool iwl_fwrt_if_errorid_other_cpu(u32 err_id)
121 u32 base = fwrt->trans->dbg.umac_error_event_table;
175 u32 val, base = fwrt->trans->dbg.lmac_error_event_table[lmac_num];
274 * read with u32-sized accesses, any members with a different size
278 u32 valid;
279 u32 error_id;
280 u32 blink2;
281 u32 ilink1;
282 u32 ilink2;
283 u32 data1, data2, data3;
284 u32 logpc;
285 u32 frame_pointer;
286 u32 stack_pointer;
287 u32 msgid;
288 u32 isr;
289 u32 hw_status[5];
290 u32 sw_status[1];
291 u32 reserved[4];
298 u32 base = fwrt->trans->dbg.tcm_error_event_table[idx];
300 u32 flag = idx ? IWL_ERROR_EVENT_TABLE_TCM2 :
343 * read with u32-sized accesses, any members with a different size
347 u32 valid;
348 u32 error_id;
349 u32 blink2;
350 u32 ilink1;
351 u32 ilink2;
352 u32 data1, data2, data3;
353 u32 logpc;
354 u32 frame_pointer;
355 u32 stack_pointer;
356 u32 msgid;
357 u32 isr;
358 u32 frame_hw_status;
359 u32 mbx_lmac_to_rcm_req;
360 u32 mbx_rcm_to_lmac_req;
361 u32 mh_ctl;
362 u32 mh_addr1_lo;
363 u32 mh_info;
364 u32 mh_err;
365 u32 reserved[3];
372 u32 base = fwrt->trans->dbg.rcm_error_event_table[idx];
373 u32 flag = idx ? IWL_ERROR_EVENT_TABLE_RCM2 :
418 u32 error, data1;
454 u32 addr;
526 u32 scratch = iwl_read32(fwrt->trans, CSR_FUNC_SCRATCH);