Lines Matching refs:trans
42 if (!iwl_trans_grab_nic_access(fwrt->trans))
52 iwl_write_prph_no_grab(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
53 *pos = (u8)iwl_read_prph_no_grab(fwrt->trans, RSP_RADIO_RDDAT);
60 iwl_trans_release_nic_access(fwrt->trans);
86 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
89 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
92 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
95 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
98 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
102 iwl_trans_write_prph(fwrt->trans, RXF_SET_FENCE_MODE + offset, 0x1);
104 iwl_trans_write_prph(fwrt->trans, RXF_LD_WR2FENCE + offset, 0x1);
106 iwl_trans_write_prph(fwrt->trans,
112 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
141 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
144 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
147 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
150 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
153 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
157 iwl_trans_write_prph(fwrt->trans, TXF_READ_MODIFY_ADDR + offset,
161 iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offset);
165 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
183 if (!iwl_trans_grab_nic_access(fwrt->trans))
193 fwrt->trans->trans_cfg->umac_prph_offset, 1);
201 iwl_trans_release_nic_access(fwrt->trans);
215 if (!iwl_trans_grab_nic_access(fwrt->trans))
222 iwl_trans_write_prph(fwrt->trans, TXF_LARC_NUM, i);
232 iwl_trans_write_prph(fwrt->trans,
267 iwl_trans_write_prph(fwrt->trans, TXF_CPU2_NUM, i +
271 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
274 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
277 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
280 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
283 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
287 iwl_trans_write_prph(fwrt->trans,
292 iwl_trans_read_prph(fwrt->trans,
299 iwl_trans_read_prph(fwrt->trans,
305 iwl_trans_release_nic_access(fwrt->trans);
513 static void iwl_read_prph_block(struct iwl_trans *trans, u32 start,
519 *data++ = cpu_to_le32(iwl_read_prph_no_grab(trans, start + i));
527 struct iwl_trans *trans = fwrt->trans;
535 IWL_DEBUG_INFO(trans, "WRT PRPH dump\n");
537 if (!iwl_trans_grab_nic_access(trans))
551 iwl_read_prph_block(trans, iwl_prph_dump_addr[i].start,
560 iwl_trans_release_nic_access(trans);
630 if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
633 } else if (fwrt->trans->trans_cfg->device_family >=
641 if (fwrt->trans->trans_cfg->mq_rx_supported) {
662 iwl_trans_read_mem_bytes(fwrt->trans, ofs, dump_mem->data, len);
753 dma_sync_single_for_cpu(fwrt->trans->dev, addr,
758 dma_sync_single_for_device(fwrt->trans->dev, addr,
785 u32 smem_len = fwrt->fw->dbg.n_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
787 0 : fwrt->trans->cfg->dccm2_len;
791 if (!fwrt->trans->cfg->dccm_offset || !fwrt->trans->cfg->dccm_len) {
800 sram_ofs = fwrt->trans->cfg->dccm_offset;
801 sram_len = fwrt->trans->cfg->dccm_len;
805 if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) {
814 if (fwrt->trans->trans_cfg->device_family ==
852 fwrt->trans->cfg->d3_debug_data_length * 2;
880 cpu_to_le32(CSR_HW_REV_TYPE(fwrt->trans->hw_rev));
882 cpu_to_le32(fwrt->trans->hw_rev_step);
885 strscpy_pad(dump_info->dev_human_readable, fwrt->trans->name,
977 fwrt->trans->cfg->smem_offset,
981 fwrt->trans->cfg->dccm2_offset,
986 u32 addr = fwrt->trans->cfg->d3_debug_data_base_addr;
987 size_t data_size = fwrt->trans->cfg->d3_debug_data_length;
997 iwl_trans_read_mem_bytes(fwrt->trans, addr,
1042 *val++ = cpu_to_le32(iwl_read_prph(fwrt->trans, addr + i));
1090 if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
1096 if (!iwl_trans_grab_nic_access(fwrt->trans))
1100 dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
1110 iwl_write_prph_no_grab(fwrt->trans, indirect_wr_addr,
1112 prph_val = iwl_read_prph_no_grab(fwrt->trans,
1117 iwl_trans_release_nic_access(fwrt->trans);
1162 *val++ = cpu_to_le32(iwl_trans_read32(fwrt->trans, addr + i));
1171 struct iwl_trans *trans = fwrt->trans;
1185 ret = iwl_trans_read_config32(trans, addr + i, &tmp);
1206 iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1228 dma_sync_single_for_cpu(fwrt->trans->dev, addr, page_size,
1231 dma_sync_single_for_device(fwrt->trans->dev, addr, page_size,
1247 if (!fwrt->trans->trans_cfg->gen2)
1251 page_size = fwrt->trans->init_dram.paging[idx].size;
1255 memcpy(range->data, fwrt->trans->init_dram.paging[idx].block,
1271 frag = &fwrt->trans->dbg.fw_mon_ini[alloc_id].frags[idx];
1291 iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1366 if (!iwl_trans_grab_nic_access(fwrt->trans))
1373 iwl_write_prph_no_grab(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
1383 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1395 iwl_write_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_ADDR + offs,
1399 iwl_read_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_DATA + offs);
1405 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1412 iwl_trans_release_nic_access(fwrt->trans);
1434 if (!iwl_trans_grab_nic_access(fwrt->trans))
1440 dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
1450 iwl_write_prph_no_grab(fwrt->trans, indirect_rd_wr_addr,
1454 prph_val = iwl_read_prph_no_grab(fwrt->trans,
1460 iwl_trans_release_nic_access(fwrt->trans);
1519 data->offset = iwl_umac_prph(fwrt->trans,
1524 data->offset = iwl_umac_prph(fwrt->trans,
1552 if (!iwl_trans_grab_nic_access(fwrt->trans))
1567 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1581 iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
1583 iwl_write_prph_no_grab(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
1585 iwl_write_prph_no_grab(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs,
1592 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1595 iwl_trans_release_nic_access(fwrt->trans);
1613 iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1634 iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1651 if (!iwl_trans_grab_nic_access(fwrt->trans))
1656 prph_data = iwl_read_prph_no_grab(fwrt->trans, (i % 2) ?
1660 iwl_trans_release_nic_access(fwrt->trans);
1665 iwl_trans_release_nic_access(fwrt->trans);
1696 u64 imr_curr_addr = fwrt->trans->dbg.imr_data.imr_curr_addr;
1697 u32 imr_rem_bytes = fwrt->trans->dbg.imr_data.imr2sram_remainbyte;
1698 u32 sram_addr = fwrt->trans->dbg.imr_data.sram_addr;
1699 u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
1703 if (iwl_trans_write_imr_mem(fwrt->trans, sram_addr,
1709 fwrt->trans->dbg.imr_data.imr_curr_addr = imr_curr_addr + size_to_dump;
1710 fwrt->trans->dbg.imr_data.imr2sram_remainbyte -= size_to_dump;
1712 iwl_trans_read_mem_bytes(fwrt->trans, sram_addr, range->data,
1757 val = iwl_read_prph_no_grab(fwrt->trans, reg_info->addr + offs);
1767 if (!iwl_trans_grab_nic_access(fwrt->trans)) {
1774 if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
1784 iwl_trans_release_nic_access(fwrt->trans);
1801 &fwrt->trans->cfg->mon_dram_regs);
1814 &fwrt->trans->cfg->mon_smem_regs);
1828 &fwrt->trans->cfg->mon_dbgi_regs);
1893 if (fwrt->trans->trans_cfg->gen2) {
1894 if (fwrt->trans->init_dram.paging_cnt)
1895 return fwrt->trans->init_dram.paging_cnt - 1;
1912 fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
1947 u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
1948 u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
1949 u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
2005 if (fwrt->trans->trans_cfg->gen2)
2006 size += fwrt->trans->init_dram.paging[i].size;
2023 fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
2166 u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
2167 u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
2168 u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
2369 list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2390 cpu_to_le32(fwrt->trans->dbg.external_ini_cfg);
2395 dump->hw_step = cpu_to_le32(fwrt->trans->hw_rev_step);
2401 hw_type = CSR_HW_REV_TYPE(fwrt->trans->hw_rev);
2403 u32 prph_val = iwl_read_umac_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR);
2418 cpu_to_le32(CSR_HW_RFID_FLAVOR(fwrt->trans->hw_rf_id));
2419 dump->rf_id_dash = cpu_to_le32(CSR_HW_RFID_DASH(fwrt->trans->hw_rf_id));
2420 dump->rf_id_step = cpu_to_le32(CSR_HW_RFID_STEP(fwrt->trans->hw_rf_id));
2421 dump->rf_id_type = cpu_to_le32(CSR_HW_RFID_TYPE(fwrt->trans->hw_rf_id));
2428 dump->fw_mon_mode = cpu_to_le32(fwrt->trans->dbg.ini_dest);
2430 ~cpu_to_le64(fwrt->trans->dbg.unsupported_region_msk);
2438 list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2466 u32 len = strnlen(fwrt->trans->dbg.dump_file_name_ext,
2469 if (!fwrt->trans->dbg.dump_file_name_ext_valid)
2481 memcpy(tlv->data, fwrt->trans->dbg.dump_file_name_ext, len);
2486 fwrt->trans->dbg.dump_file_name_ext_valid = false;
2625 ~(fwrt->trans->dbg.unsupported_region_msk);
2629 ARRAY_SIZE(fwrt->trans->dbg.active_regions));
2631 for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions); i++) {
2638 reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2668 imr_reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2700 if (!iwl_trans_dbg_ini_valid(fwrt->trans) ||
2771 fw_error_dump.trans_ptr = iwl_trans_dump_data(fwrt->trans, dump_mask,
2794 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2844 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2865 if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2905 if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status))
2908 if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2937 iwl_trans_sync_nmi(fwrt->trans);
2961 iwl_force_nmi(fwrt->trans);
2992 if (iwl_trans_dbg_ini_valid(fwrt->trans))
3054 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
3079 if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status))
3086 iwl_trans_send_cmd(fwrt->trans, &hcmd);
3107 if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status)) {
3113 if (test_bit(STATUS_TRANS_DEAD, &fwrt->trans->status)) {
3121 if (iwl_trans_dbg_ini_valid(fwrt->trans))
3129 if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
3139 if (fwrt->trans->dbg.last_tp_resetfw == IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY)
3140 iwl_force_nmi(fwrt->trans);
3143 if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
3228 const struct iwl_cfg *cfg = fwrt->trans->cfg;
3244 iwl_trans_read_mem_bytes(fwrt->trans, cfg->d3_debug_data_base_addr,
3260 iwl_dbg_tlv_del_timers(fwrt->trans);
3268 static int iwl_fw_dbg_suspend_resume_hcmd(struct iwl_trans *trans, bool suspend)
3281 return iwl_trans_send_cmd(trans, &hcmd);
3284 static void iwl_fw_dbg_stop_recording(struct iwl_trans *trans,
3287 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
3288 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
3293 params->in_sample = iwl_read_umac_prph(trans, DBGC_IN_SAMPLE);
3294 params->out_ctrl = iwl_read_umac_prph(trans, DBGC_OUT_CTRL);
3297 iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, 0);
3302 iwl_write_umac_prph(trans, DBGC_OUT_CTRL, 0);
3305 static int iwl_fw_dbg_restart_recording(struct iwl_trans *trans,
3311 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
3312 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
3313 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
3314 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
3316 iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, params->in_sample);
3317 iwl_write_umac_prph(trans, DBGC_OUT_CTRL, params->out_ctrl);
3357 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
3374 if (!iwl_trans_fw_running(fwrt->trans))
3381 ret = iwl_fw_dbg_suspend_resume_hcmd(fwrt->trans, stop);
3383 iwl_fw_dbg_stop_recording(fwrt->trans, params);
3385 ret = iwl_fw_dbg_restart_recording(fwrt->trans, params);
3390 fwrt->trans->dbg.rec_on = false;
3409 u32 preset = u32_get_bits(fwrt->trans->dbg.domains_bitmap,
3413 if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_9000)
3416 if (fwrt->trans->dbg.yoyo_bin_loaded || (preset && preset != 1))
3419 iwl_trans_send_cmd(fwrt->trans, &hcmd);
3434 iwl_trans_send_cmd(fwrt->trans, &hcmd);