Lines Matching +full:8 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2015-2017 Intel Deutschland GmbH
10 /* API for pre-9000 hardware */
12 #define IWL_RX_INFO_PHY_CNT 8
17 #define IWL_RX_INFO_ENERGY_ANT_B_POS 8
26 * struct iwl_rx_phy_info - phy info
34 * @beacon_time_stamp: beacon at on-air rise
39 * @byte_count: frame's byte-count
70 * bits 0:3 - reserved
71 * bits 4:7 - MIC CRC length
72 * bits 8:12 - MAC header length
73 * bit 13 - Padding indication
74 * bit 14 - A-AMSDU indication
75 * bit 15 - Offload enabled
81 CSUM_RXA_PADD = BIT(13),
82 CSUM_RXA_AMSDU = BIT(14),
83 CSUM_RXA_ENA = BIT(15)
87 * struct iwl_rx_mpdu_res_start - phy info
97 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
103 * @RX_RES_PHY_FLAGS_ANTENNA_POS: antenna bit position
104 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
110 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
111 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
112 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
113 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
116 RX_RES_PHY_FLAGS_AGG = BIT(7),
117 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
118 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
119 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
123 * enum iwl_mvm_rx_status - written by fw for each Rx packet
148 * @RX_MDPU_RES_STATUS_STA_ID_SHIFT: station ID bit shift
151 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
152 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
153 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
154 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
155 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
156 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
157 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
158 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
159 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
160 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
161 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
162 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
163 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
164 RX_MPDU_RES_STATUS_SEC_CMAC_GMAC_ENC = (6 << 8),
165 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
166 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
167 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
168 RX_MPDU_RES_STATUS_CSUM_DONE = BIT(16),
169 RX_MPDU_RES_STATUS_CSUM_OK = BIT(17),
178 /* shift should be 4, but the length is measured in 2-byte
185 /* in 2-byte words */
218 IWL_RX_L3L4_IP_HDR_CSUM_OK = BIT(0),
219 IWL_RX_L3L4_TCP_UDP_CSUM_OK = BIT(1),
220 IWL_RX_L3L4_TCP_FIN_SYN_RST_PSH = BIT(2),
221 IWL_RX_L3L4_TCP_ACK = BIT(3),
223 IWL_RX_L3L4_L4_PROTO_MASK = 0xf << 8,
228 IWL_RX_MPDU_STATUS_CRC_OK = BIT(0),
229 IWL_RX_MPDU_STATUS_OVERRUN_OK = BIT(1),
230 IWL_RX_MPDU_STATUS_SRC_STA_FOUND = BIT(2),
231 IWL_RX_MPDU_STATUS_KEY_VALID = BIT(3),
232 IWL_RX_MPDU_STATUS_ICV_OK = BIT(5),
233 IWL_RX_MPDU_STATUS_MIC_OK = BIT(6),
234 IWL_RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
236 IWL_RX_MPDU_STATUS_REPLAY_ERROR = BIT(7),
237 IWL_RX_MPDU_STATUS_SEC_MASK = 0x7 << 8,
239 IWL_RX_MPDU_STATUS_SEC_NONE = 0x0 << 8,
240 IWL_RX_MPDU_STATUS_SEC_WEP = 0x1 << 8,
241 IWL_RX_MPDU_STATUS_SEC_CCM = 0x2 << 8,
242 IWL_RX_MPDU_STATUS_SEC_TKIP = 0x3 << 8,
243 IWL_RX_MPDU_STATUS_SEC_EXT_ENC = 0x4 << 8,
244 IWL_RX_MPDU_STATUS_SEC_GCM = 0x5 << 8,
246 IWL_RX_MPDU_STATUS_SEC_ENC_ERR = 0x7 << 8,
248 IWL_RX_MPDU_STATUS_DECRYPTED = BIT(11),
249 IWL_RX_MPDU_STATUS_ROBUST_MNG_FRAME = BIT(15),
251 IWL_RX_MPDU_STATUS_DUPLICATE = BIT(22),
268 IWL_RX_MPDU_PHY_AMPDU = BIT(5),
269 IWL_RX_MPDU_PHY_AMPDU_TOGGLE = BIT(6),
270 IWL_RX_MPDU_PHY_SHORT_PREAMBLE = BIT(7),
271 /* short preamble is only for CCK, for non-CCK overridden by this */
272 IWL_RX_MPDU_PHY_NCCK_ADDTL_NTFY = BIT(7),
273 IWL_RX_MPDU_PHY_TSF_OVERLOAD = BIT(8),
288 /* 1 bit reserved */
301 IWL_RX_PHY_DATA0_EHT_VALIDATE = BIT(0),
302 IWL_RX_PHY_DATA0_EHT_UPLINK = BIT(1),
305 IWL_RX_PHY_DATA0_EHT_PS160 = BIT(12),
307 IWL_RX_PHY_DATA0_EHT_LDPC_EXT_SYM = BIT(20),
309 IWL_RX_PHY_DATA0_EHT_PE_DISAMBIG = BIT(23),
310 IWL_RX_PHY_DATA0_EHT_BW320_SLOT = BIT(24),
311 IWL_RX_PHY_DATA0_EHT_SIGA_CRC_OK = BIT(25),
314 IWL_RX_PHY_DATA0_EHT_DELIM_EOF = BIT(31),
326 IWL_RX_PHY_INFO_TYPE_HE_TB = 8,
338 * check this first - if TSF overload is set,
349 /* info type: HE MU/MU-EXT */
359 /* info type: HE TB/TX-EXT */
364 /* TSF overload high dword For EHT-MU/TB rates*/
366 /* info type: EHT-MU */
368 /* info type: EHT-TB */
369 IWL_RX_PHY_DATA1_EHT_TB_PILOT_TYPE = BIT(0),
373 /* number of EHT-LTF symbols 0 - 1 EHT-LTF, 1 - 2 EHT-LTFs, 2 - 4 EHT-LTFs,
374 * 3 - 6 EHT-LTFs, 4 - 8 EHT-LTFs */
380 /* goes into Metadata DW 7 (Qu) or 8 (So or higher) */
382 /* info type: HE MU-EXT */
389 /* info type: HE TB-EXT */
396 /* goes into Metadata DW 8 (Qu) or 7 (So or higher) */
398 /* info type: HE MU-EXT */
407 /* info type: HE MU-EXT */
417 /* goes into Metadata DW 8 (Qu has no EHT) */
419 /* info type: EHT-MU-EXT */
424 /* info type: EHT-TB-EXT */
430 /* note: low 8 bits cannot be used */
431 /* info type: EHT-MU-EXT */
438 /* info type: EHT-MU-EXT */
449 /* info type: EHT-TB */
452 /* info type: EHT-MU */
460 * struct iwl_rx_mpdu_desc_v1 - RX MPDU descriptor
463 /* DW7 - carries rss_hash only when rpa_en == 1 */
476 /* DW8 - carries filter_match only when rpa_en == 1 */
543 * struct iwl_rx_mpdu_desc_v3 - RX MPDU descriptor
546 /* DW7 - carries filter_match only when rpa_en == 1 */
559 /* DW8 - carries rss_hash only when rpa_en == 1 */
653 * struct iwl_rx_mpdu_desc - RX MPDU descriptor
743 #define RX_NO_DATA_CHAIN_B_POS 8
756 #define RX_NO_DATA_INFO_ERR_POS 8
802 * struct iwl_rx_no_data - RX no data descriptor
803 * @info: 7:0 frame type, 15:8 RX error type
804 * @rssi: 7:0 energy chain-A,
805 * 15:8 chain-B, measured at FINA time (FINA_ENERGY), 16:23 channel
811 * @rx_vec: DW-12:9 raw RX vectors from DSP according to modulation type.
827 * struct iwl_rx_no_data_ver_3 - RX no data descriptor
828 * @info: 7:0 frame type, 15:8 RX error type
829 * @rssi: 7:0 energy chain-A,
830 * 15:8 chain-B, measured at FINA time (FINA_ENERGY), 16:23 channel
835 * @rx_vec: DW-12:9 raw RX vectors from DSP according to modulation type.
858 * enum iwl_bar_frame_release_sta_tid - STA/TID information for BAR release
868 * enum iwl_bar_frame_release_ba_info - BA information for BAR release
880 * struct iwl_bar_frame_release - frame release from BAR info
903 * struct iwl_rss_config_cmd - RSS (Receive Side Scaling) configuration
905 * @flags: 1 - enable, 0 - disable
908 * @secret_key: 320 bit input of random key configuration from driver
923 * struct iwl_rxq_sync_cmd - RXQ notification trigger
925 * @flags: flags of the notification. bit 0:3 are the sender queue
942 * struct iwl_rxq_sync_notification - Notification triggered by RXQ
958 * enum iwl_mvm_pm_event - type of station PM event
962 * @IWL_MVM_PM_EVENT_PS_POLL: station sent PS-Poll
972 * struct iwl_mvm_pm_state_notification - station PM state notification
987 #define BA_WINDOW_STATUS_VALID_MSK BIT(9)
990 * struct iwl_ba_window_status_notif - reordering window's status notification
992 * @ra_tid: bit 3:0 - TID, bit 8:4 - STA_ID, bit 9 - valid
1004 * struct iwl_rfh_queue_data - RX queue configuration
1024 * struct iwl_rfh_queue_config - RX queue configuration
1027 * @data: DMA addresses per-queue
1040 * struct iwl_beacon_filter_notif_v1 - beacon filter notification
1050 * struct iwl_beacon_filter_notif - beacon filter notification