Lines Matching +full:2 +full:mhz
16 * bandwidths <= 80MHz
18 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
24 * for BPSK (MCS 0) with 2 spatial
31 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2),
39 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
40 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
41 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
42 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
43 * @IWL_TLC_MNG_CH_WIDTH_320MHZ: 320MHZ channel
124 * @IWL_TLC_MCS_PER_BW_160: mcs for bw - 160Mhz
125 * @IWL_TLC_MCS_PER_BW_320: mcs for bw - 320Mhz
148 * <nss, channel-width> pair (0 - 80mhz width and below, 1 - 160mhz).
184 * pair (0 - 80mhz width and below, 1 - 160mhz, 2 - 320mhz).
390 * 2-0: MCS rate base
393 * 2) 18 Mbps
401 * 2) Triple stream (MIMO)
408 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
428 * 2) Triple stream (MIMO)
431 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
452 * 20) 2 Mbps
464 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
465 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
474 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
477 #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS)
482 /* Bit 17: (0) SS, (1) SS*2 */
498 * 1 2xLTF+0.8us
499 * 2 2xLTF+1.6us
504 * 1 2xLTF+0.8us
505 * 2 2xLTF+1.6us
509 * 1 2xLTF+1.6us
510 * 2 4xLTF+3.2us
513 * 0 2xLTF+0.8us
514 * 1 2xLTF+1.6us
515 * 2 4xLTF+0.8us
521 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
525 #define RATE_MCS_HE_TYPE_MU_V1 (2 << RATE_MCS_HE_TYPE_POS_V1)
529 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
537 /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
541 /* Bit 30-31: (1) RTS, (2) CTS */
548 /* rate_n_flags bit field version 2 and 3
557 * (0) Legacy CCK (1) Legacy OFDM (2) High-throughput (HT)
566 #define RATE_MCS_MOD_TYPE_HT (2 << RATE_MCS_MOD_TYPE_POS)
576 * (1) 2 Mbps
577 * (2) 5.5 Mbps
584 * (2) 12 Mbps
596 * Version 2: (not applicable for UHR)
598 * 4: NSS==2 indicator
601 * 5: NSS==2 indicator
607 #define RATE_HT_MCS_INDEX(r) ((((r) & RATE_MCS_NSS_MSK) >> 2) | \
613 * Bits 13-11: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz, (4) 320MHz
620 #define RATE_MCS_CHAN_WIDTH_80_VAL 2
638 /* Bit 17: (0) SS, (1) SS*2 (same as v1) */
654 * 1 2xLTF+0.8us
655 * 2 2xLTF+1.6us
660 * 1 2xLTF+0.8us
661 * 2 2xLTF+1.6us
665 * 1 2xLTF+1.6us
666 * 2 4xLTF+3.2us
674 /* Bit 24-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
678 #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS)
686 * CCK: 2x 20MHz
687 * OFDM Legacy: N x 20Mhz, (N = BW \ 2 , either 2, 4, 8, 16)
688 * EHT: 2 x BW/2, (80 - 2x40, 160 - 2x80, 320 - 2x160)
693 /* Bit 26: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
698 * instead of 1 LTF for SISO use 2 LTFs,
699 * instead of 2 LTFs for NSTS=2 use 4 LTFs*/
728 * (2) Dynamic BW signalling
733 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS)
748 * (1) - 2x1 STBC allowed (HT/VHT)
749 * (2) - 4x2 STBC allowed (HT/VHT)
751 * All our chips are at most 2 antennas so only (1) is valid for now.
756 /* 2x1 STBC is allowed */
759 /* Bit 2: Beamformer (VHT only) is allowed */
760 #define LQ_SS_BFER_ALLOWED_POS 2
797 * 2 - 0x3f: maximal number of frames (up to 3f == 63)