Lines Matching +full:control +full:- +full:channel
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018, 2020-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
15 /* Supported channel width, vary if there is VHT support */
24 * Control channel position:
25 * For legacy set bit means upper channel, otherwise lower.
26 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
27 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
28 * For EHT - bit-3 is used for extended distance
42 * struct iwl_fw_channel_info_v1 - channel information
45 * @channel: channel number
47 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
51 u8 channel; member
57 * struct iwl_fw_channel_info - channel information
59 * @channel: channel number
62 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
66 __le32 channel; member
100 * struct iwl_phy_context_cmd_tail - tail of iwl_phy_ctx_cmd for alignment with
101 * various channel structures.
116 * struct iwl_phy_context_cmd_v1 - config of the PHY context
123 * @ci: channel info
138 * struct iwl_phy_context_cmd - config of the PHY context
143 * @ci: channel info
145 * @sbb_bandwidth: 0 disabled, 1 - 40Mhz ... 4 - 320MHz
146 * @sbb_ctrl_channel_loc: location of the control channel
149 * @secondary_ctrl_chnl_loc: location of secondary control channel