Lines Matching +full:control +full:- +full:bit
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
27 #define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7)
28 #define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8)
29 #define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9)
30 #define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10)
33 #define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17)
34 #define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18)
35 #define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN BIT(19)
36 #define RX_MPDU_START_INFO0_USE_PPE BIT(20)
37 #define RX_MPDU_START_INFO0_PPE_ROUTING_EN BIT(21)
41 #define RX_MPDU_START_INFO1_PRE_DELIM_ERR_WARN BIT(24)
42 #define RX_MPDU_START_INFO1_FIRST_DELIM_ERR BIT(25)
44 #define RX_MPDU_START_INFO2_EPD_EN BIT(0)
45 #define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD BIT(1)
49 #define RX_MPDU_START_INFO2_BSSID_HIT BIT(10)
55 #define RX_MPDU_START_INFO3_NDP_FRAME BIT(9)
56 #define RX_MPDU_START_INFO3_PHY_ERR BIT(10)
57 #define RX_MPDU_START_INFO3_PHY_ERR_MPDU_HDR BIT(11)
58 #define RX_MPDU_START_INFO3_PROTO_VER_ERR BIT(12)
59 #define RX_MPDU_START_INFO3_AST_LOOKUP_VALID BIT(13)
60 #define RX_MPDU_START_INFO3_RANGING BIT(14)
62 #define RX_MPDU_START_INFO4_MPDU_FCTRL_VALID BIT(0)
63 #define RX_MPDU_START_INFO4_MPDU_DUR_VALID BIT(1)
64 #define RX_MPDU_START_INFO4_MAC_ADDR1_VALID BIT(2)
65 #define RX_MPDU_START_INFO4_MAC_ADDR2_VALID BIT(3)
66 #define RX_MPDU_START_INFO4_MAC_ADDR3_VALID BIT(4)
67 #define RX_MPDU_START_INFO4_MAC_ADDR4_VALID BIT(5)
68 #define RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID BIT(6)
69 #define RX_MPDU_START_INFO4_MPDU_QOS_CTRL_VALID BIT(7)
70 #define RX_MPDU_START_INFO4_MPDU_HT_CTRL_VALID BIT(8)
71 #define RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID BIT(9)
73 #define RX_MPDU_START_INFO4_MORE_FRAG_FLAG BIT(14)
74 #define RX_MPDU_START_INFO4_FROM_DS BIT(16)
75 #define RX_MPDU_START_INFO4_TO_DS BIT(17)
76 #define RX_MPDU_START_INFO4_ENCRYPTED BIT(18)
77 #define RX_MPDU_START_INFO4_MPDU_RETRY BIT(19)
81 #define RX_MPDU_START_INFO5_NEW_PEER_ENTRY BIT(8)
82 #define RX_MPDU_START_INFO5_DECRYPT_NEEDED BIT(9)
84 #define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING BIT(12)
85 #define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING BIT(13)
86 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C BIT(14)
87 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S BIT(15)
89 #define RX_MPDU_START_INFO5_AMPDU_FLAG BIT(28)
90 #define RX_MPDU_START_INFO5_BAR_FRAME BIT(29)
91 #define RX_MPDU_START_INFO5_RAW_MPDU BIT(30)
94 #define RX_MPDU_START_INFO6_FIRST_MPDU BIT(14)
95 #define RX_MPDU_START_INFO6_MCAST_BCAST BIT(15)
96 #define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND BIT(16)
97 #define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT BIT(17)
98 #define RX_MPDU_START_INFO6_POWER_MGMT BIT(18)
99 #define RX_MPDU_START_INFO6_NON_QOS BIT(19)
100 #define RX_MPDU_START_INFO6_NULL_DATA BIT(20)
101 #define RX_MPDU_START_INFO6_MGMT_TYPE BIT(21)
102 #define RX_MPDU_START_INFO6_CTRL_TYPE BIT(22)
103 #define RX_MPDU_START_INFO6_MORE_DATA BIT(23)
104 #define RX_MPDU_START_INFO6_EOSP BIT(24)
105 #define RX_MPDU_START_INFO6_FRAGMENT BIT(25)
106 #define RX_MPDU_START_INFO6_ORDER BIT(26)
107 #define RX_MPDU_START_INFO6_UAPSD_TRIGGER BIT(27)
108 #define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED BIT(28)
109 #define RX_MPDU_START_INFO6_DIRECTED BIT(29)
110 #define RX_MPDU_START_INFO6_AMSDU_PRESENT BIT(30)
114 #define RX_MPDU_START_INFO7_PRIORITY_VALID BIT(17)
117 #define RX_MPDU_START_INFO8_AUTH_TO_SEND_WDS BIT(0)
187 * pkt_selection_fp_... bit is set
191 * pkt_selection_fp_... bit is set
202 * field in address search failure cache-only entry should
206 * If set, intra-BSS routing detection is enabled
220 * Global enable/disable bit for routing to PPE, used to disable
224 * uffer management for WiFi-to-PPE routing.
227 * by a different subsystem, completely disabling WiFi-to-PPE
291 * The TID field in the QoS control field
318 * Set when RXPCU detected a version error in the Frame control
359 * For MPDUs without a sequence control field, this field will
365 * information, For MPDUs without a QoS,HT control field, this field
381 * The More Fragment bit setting from the MPDU header of the
387 * Set if the from DS bit is set in the frame control.
392 * Set if the to DS bit is set in the frame control.
397 * Protected bit from the frame control.
401 * Retry bit from the frame control. Only valid when first_msdu is set
417 * When RXPCU sets bit 'ast_index_not_found or ast_index_timeout',
418 * RXPCU will also ensure that this bit is NOT set. CRYPTO for that
419 * reason only needs to evaluate this bit and non of the other ones
437 * received MPDU in the PPDU and this MPDU gets filtered-in,
446 * Received frame was part of an A-MPDU.
460 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
461 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
462 * 0. The PPDU start status will only be valid when this bit
467 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
480 * Power management bit set in the 802.11 header. Only set
484 * Set if packet is not a non-QoS data frame. Only set when
496 * Set if packet is a control packet. Only set when first_msdu
500 * Set if more bit in frame control is set. Only set when
504 * Set if the EOSP (end of service period) bit in the QoS
505 * control field is set. Only set when first_msdu is set.
512 * Set if the order bit in the frame control is set. Only
516 * U-APSD trigger frame
527 * 'no_ack' bit is the address search entry cleared.
532 * Frame control field in header. Only valid when the field is marked valid.
539 * address valid bit is set
542 * QoS/HT control fields from header. Valid only when corresponding fields
547 * RXOLE uses this to determine intra-BSS routing.
550 * Opaque service code between PPE and Wi-Fi
566 * data frames to multi-link addresses during decapsulation to eth/nwifi
569 * Multi-link receiver address1,2. Only valid when corresponding
570 * valid bit is set
573 * If not set, RXDMA shall perform error-routing for WDS packets
617 #define RX_MSDU_END_INFO2_CCND_TRUNCATE BIT(14)
618 #define RX_MSDU_END_INFO2_CCND_CCE_DIS BIT(15)
622 #define RX_MSDU_END_INFO3_DA_OFFSET_VALID BIT(12)
623 #define RX_MSDU_END_INFO3_SA_OFFSET_VALID BIT(13)
626 #define RX_MSDU_END_INFO4_LRO_ELIGIBLE BIT(9)
628 #define RX_MSDU_END_INFO5_SA_IDX_TIMEOUT BIT(0)
629 #define RX_MSDU_END_INFO5_DA_IDX_TIMEOUT BIT(1)
630 #define RX_MSDU_END_INFO5_TO_DS BIT(2)
632 #define RX_MSDU_END_INFO5_SA_IS_VALID BIT(7)
633 #define RX_MSDU_END_INFO5_DA_IS_VALID BIT(8)
634 #define RX_MSDU_END_INFO5_DA_IS_MCBC BIT(9)
636 #define RX_MSDU_END_INFO5_FIRST_MSDU BIT(12)
637 #define RX_MSDU_END_INFO5_LAST_MSDU BIT(13)
638 #define RX_MSDU_END_INFO5_FROM_DS BIT(14)
639 #define RX_MSDU_END_INFO5_IP_CHKSUM_FAIL_COPY BIT(15)
641 #define RX_MSDU_END_INFO6_MSDU_DROP BIT(0)
644 #define RX_MSDU_END_INFO6_USE_PPE BIT(26)
646 #define RX_MSDU_END_INFO6_VLAN_CTAG_STRIPPED BIT(29)
647 #define RX_MSDU_END_INFO6_VLAN_STAG_STRIPPED BIT(30)
648 #define RX_MSDU_END_INFO6_FRAGMENT_FLAG BIT(31)
651 #define RX_MSDU_END_INFO7_FLOW_AGGR_CONTN BIT(8)
652 #define RX_MSDU_END_INFO7_FISA_TIMEOUT BIT(9)
653 #define RX_MSDU_END_INFO7_TCPUDP_CSUM_FAIL_CPY BIT(10)
654 #define RX_MSDU_END_INFO7_MSDU_LIMIT_ERROR BIT(11)
655 #define RX_MSDU_END_INFO7_FLOW_IDX_TIMEOUT BIT(12)
656 #define RX_MSDU_END_INFO7_FLOW_IDX_INVALID BIT(13)
657 #define RX_MSDU_END_INFO7_CCE_MATCH BIT(14)
658 #define RX_MSDU_END_INFO7_AMSDU_PARSER_ERR BIT(15)
663 #define RX_MSDU_END_INFO9_PRIORITY_VALID BIT(15)
664 #define RX_MSDU_END_INFO9_INRA_BSS BIT(16)
666 #define RX_MSDU_END_INFO9_MCAST_ECHO BIT(19)
667 #define RX_MSDU_END_INFO9_WDS_LEARN_EVENT BIT(20)
668 #define RX_MSDU_END_INFO9_WDS_ROAM_EVENT BIT(21)
669 #define RX_MSDU_END_INFO9_WDS_KEEP_ALIVE_EVENT BIT(22)
672 #define RX_MSDU_END_INFO10_STBC BIT(14)
673 #define RX_MSDU_END_INFO10_IPSEC_ESP BIT(15)
675 #define RX_MSDU_END_INFO10_IPSEC_AH BIT(23)
680 #define RX_MSDU_END_INFO11_IPV4 BIT(10)
681 #define RX_MSDU_END_INFO11_IPV6 BIT(11)
682 #define RX_MSDU_END_INFO11_TCP BIT(12)
683 #define RX_MSDU_END_INFO11_UDP BIT(13)
684 #define RX_MSDU_END_INFO11_IP_FRAG BIT(14)
685 #define RX_MSDU_END_INFO11_TCP_ONLY_ACK BIT(15)
686 #define RX_MSDU_END_INFO11_DA_IS_BCAST_MCAST BIT(16)
688 #define RX_MSDU_END_INFO11_IP_FIXED_HDR_VALID BIT(19)
689 #define RX_MSDU_END_INFO11_IP_EXTN_HDR_VALID BIT(20)
690 #define RX_MSDU_END_INFO11_IP_TCP_UDP_HDR_VALID BIT(21)
691 #define RX_MSDU_END_INFO11_MESH_CTRL_PRESENT BIT(22)
692 #define RX_MSDU_END_INFO11_LDPC BIT(23)
702 #define RX_MSDU_END_INFO12_MIMO_DONE_COPY BIT(31)
704 #define RX_MSDU_END_INFO13_FIRST_MPDU BIT(0)
705 #define RX_MSDU_END_INFO13_MCAST_BCAST BIT(2)
706 #define RX_MSDU_END_INFO13_AST_IDX_NOT_FOUND BIT(3)
707 #define RX_MSDU_END_INFO13_AST_IDX_TIMEDOUT BIT(4)
708 #define RX_MSDU_END_INFO13_POWER_MGMT BIT(5)
709 #define RX_MSDU_END_INFO13_NON_QOS BIT(6)
710 #define RX_MSDU_END_INFO13_NULL_DATA BIT(7)
711 #define RX_MSDU_END_INFO13_MGMT_TYPE BIT(8)
712 #define RX_MSDU_END_INFO13_CTRL_TYPE BIT(9)
713 #define RX_MSDU_END_INFO13_MORE_DATA BIT(10)
714 #define RX_MSDU_END_INFO13_EOSP BIT(11)
715 #define RX_MSDU_END_INFO13_A_MSDU_ERROR BIT(12)
716 #define RX_MSDU_END_INFO13_ORDER BIT(14)
717 #define RX_MSDU_END_INFO13_WIFI_PARSER_ERR BIT(15)
718 #define RX_MSDU_END_INFO13_OVERFLOW_ERR BIT(16)
719 #define RX_MSDU_END_INFO13_MSDU_LEN_ERR BIT(17)
720 #define RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL BIT(18)
721 #define RX_MSDU_END_INFO13_IP_CKSUM_FAIL BIT(19)
722 #define RX_MSDU_END_INFO13_SA_IDX_INVALID BIT(20)
723 #define RX_MSDU_END_INFO13_DA_IDX_INVALID BIT(21)
724 #define RX_MSDU_END_INFO13_AMSDU_ADDR_MISMATCH BIT(22)
725 #define RX_MSDU_END_INFO13_RX_IN_TX_DECRYPT_BYP BIT(23)
726 #define RX_MSDU_END_INFO13_ENCRYPT_REQUIRED BIT(24)
727 #define RX_MSDU_END_INFO13_DIRECTED BIT(25)
728 #define RX_MSDU_END_INFO13_BUFFER_FRAGMENT BIT(26)
729 #define RX_MSDU_END_INFO13_MPDU_LEN_ERR BIT(27)
730 #define RX_MSDU_END_INFO13_TKIP_MIC_ERR BIT(28)
731 #define RX_MSDU_END_INFO13_DECRYPT_ERR BIT(29)
732 #define RX_MSDU_END_INFO13_UNDECRYPT_FRAME_ERR BIT(30)
733 #define RX_MSDU_END_INFO13_FCS_ERR BIT(31)
736 #define RX_MSDU_END_INFO14_RX_BITMAP_NOT_UPDED BIT(13)
737 #define RX_MSDU_END_INFO14_MSDU_DONE BIT(31)
807 * A-MPDU delimiter or the preamble length field for non-A-MPDU
828 * 32 bit CRC computed out of IP v6 extension headers.
838 * of a dynamic A-MSDU when DA is compressed.
842 * of a dynamic A-MSDU when SA is compressed.
845 * The 16-bit type value indicating the type of L3 later
878 * Set if the to DS bit is set in the frame control.
881 * TID field in the QoS control field
898 * Indicates the first MSDU of A-MSDU. If both first_msdu and
899 * last_msdu are set in the MSDU then this is a non-aggregated MSDU
900 * frame: normal MPDU. Interior MSDU in an A-MSDU shall have both
904 * Indicates the last MSDU of the A-MSDU. MPDU end status is only
908 * Set if the from DS bit is set in the frame control.
946 * Set by RXOLE if it stripped 4-bytes of C-VLAN Tag from the
950 * Set by RXOLE if it stripped 4-bytes of S-VLAN Tag from the
955 * set when either the more_frag bit is set in the frame control
966 * The value of the computed TCP/UDP checksum. A mode bit
1004 * A-MSDU could not be properly de-agregated.
1014 * Opaque service code between PPE and Wi-Fi
1020 * This packet needs intra-BSS routing by SW as the 'vdev_id'
1026 * to support intra-BSS routing with multi-chip multi-link
1054 * This field is still valid for MPDU frames without A-MSDU.
1064 * Depending upon mode bit, this field either indicates the
1074 * Depending upon mode bit, this field either indicates the
1106 * Indicates that either the IP More frag bit is set or IP frag
1107 * number is non-zero. If set indicates that this is a fragmented
1111 * Set if only the TCP Ack bit is set in the TCP flags and if
1119 * 0 - Toeplitz hash of 2-tuple (IP source address, IP
1121 * 1 - Toeplitz hash of 4-tuple (IP source address,
1124 * 2 - Toeplitz of flow_id
1125 * 3 - Zero is used
1128 * Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
1137 * Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
1141 * When set, this MSDU includes the 'Mesh Control' field
1146 * For IPv4, this is the 8 bit protocol field set). For IPv6 this
1147 * is the 8 bit next_header field.
1151 * 2 bytes of C-VLAN Tag Control Information from WHO_L2_LLC
1154 * 2 bytes of S-VLAN Tag Control Information from WHO_L2_LLC
1187 * Bitmap, with each bit indicating if the related spatial
1192 * 0 - spatial stream not used for this reception
1193 * 1 - spatial stream used for this reception
1199 * are all valid. This bit is in the last 64-bit of the descriptor
1203 * Toeplitz hash of 5-tuple
1205 * destination port, L4 protocol} in case of non-IPSec.
1207 * In case of IPSec - Toeplitz hash of 4-tuple
1226 * IPv4/IPv6 - Either, Toeplitz hash computed over 2-tuple
1228 * hash computed over 4-tuple IPv4 or IPv6 src/dest addresses
1231 * is the one used for hash-based REO routing (see use_flow_id_toeplitz_clfy
1240 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
1241 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
1242 * 0. The PPDU start status will only be valid when this bit
1247 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
1260 * Power management bit set in the 802.11 header. Only set
1264 * Set if packet is not a non-QoS data frame. Only set when
1276 * Set if packet is a control packet. Only set when first_msdu
1280 * Set if more bit in frame control is set. Only set when
1284 * Set if the EOSP (end of service period) bit in the QoS
1285 * control field is set. Only set when first_msdu is set.
1288 * Set if number of MSDUs in A-MSDU is above a threshold or if the
1293 * Set if the order bit in the frame control is set. Only
1329 * Indicates that an A-MSDU with 'from DS = 0' had an SA mismatching
1330 * TA or an A-MDU with 'to DS = 0' had a DA mismatching RA
1345 * 'no_ack' bit is the address search entry cleared.
1353 * Indicates that the MPDU was pre-maturely terminated
1385 * valid. This bit must be in the last octet of the